2015-04-17 16:11:38 -04:00
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##
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## Copyright (c) 2015 The WebM project authors. All Rights Reserved.
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##
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## Use of this source code is governed by a BSD-style license
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## that can be found in the LICENSE file in the root of the source
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## tree. An additional intellectual property rights grant can be found
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## in the file PATENTS. All contributing project authors may
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## be found in the AUTHORS file in the root of the source tree.
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##
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DSP_SRCS-yes += vpx_dsp.mk
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2015-07-15 13:02:01 -07:00
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DSP_SRCS-yes += vpx_dsp_common.h
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2015-04-17 16:11:38 -04:00
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2015-06-05 09:54:19 -07:00
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DSP_SRCS-$(HAVE_MSA) += mips/macros_msa.h
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2015-07-17 13:38:54 -07:00
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# bit reader
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2015-07-17 14:09:05 -07:00
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DSP_SRCS-yes += prob.h
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DSP_SRCS-yes += prob.c
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2015-07-17 13:38:54 -07:00
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2015-07-20 11:05:04 -07:00
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ifeq ($(CONFIG_ENCODERS),yes)
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2015-07-20 11:18:57 -07:00
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DSP_SRCS-yes += bitwriter.h
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DSP_SRCS-yes += bitwriter.c
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DSP_SRCS-yes += bitwriter_buffer.c
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DSP_SRCS-yes += bitwriter_buffer.h
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2016-06-24 12:44:23 -07:00
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DSP_SRCS-yes += psnr.c
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DSP_SRCS-yes += psnr.h
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2015-08-06 12:53:59 -07:00
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DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.c
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DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.h
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DSP_SRCS-$(CONFIG_INTERNAL_STATS) += psnrhvs.c
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DSP_SRCS-$(CONFIG_INTERNAL_STATS) += fastssim.c
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2015-07-20 11:05:04 -07:00
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endif
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2015-07-17 13:38:54 -07:00
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ifeq ($(CONFIG_DECODERS),yes)
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2015-07-17 14:09:05 -07:00
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DSP_SRCS-yes += bitreader.h
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DSP_SRCS-yes += bitreader.c
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DSP_SRCS-yes += bitreader_buffer.c
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DSP_SRCS-yes += bitreader_buffer.h
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2015-07-17 13:38:54 -07:00
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endif
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2015-07-19 15:02:56 -07:00
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# intra predictions
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DSP_SRCS-yes += intrapred.c
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2015-08-10 17:42:09 -07:00
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DSP_SRCS-$(HAVE_SSE) += x86/intrapred_sse2.asm
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2015-07-19 15:02:56 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/intrapred_sse2.asm
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DSP_SRCS-$(HAVE_SSSE3) += x86/intrapred_ssse3.asm
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2015-09-02 13:15:52 -07:00
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DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm
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2015-07-19 15:02:56 -07:00
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ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
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2015-08-10 17:42:09 -07:00
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DSP_SRCS-$(HAVE_SSE) += x86/highbd_intrapred_sse2.asm
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2015-07-19 15:02:56 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_sse2.asm
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2015-07-29 19:43:29 -07:00
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endif # CONFIG_VP9_HIGHBITDEPTH
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2015-07-19 15:02:56 -07:00
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2016-05-02 12:17:39 -07:00
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ifneq ($(filter yes,$(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),)
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2016-05-10 06:52:58 -07:00
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DSP_SRCS-yes += add_noise.c
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2016-07-08 10:06:54 -07:00
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DSP_SRCS-yes += deblock.c
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2016-07-13 07:35:25 -07:00
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DSP_SRCS-yes += postproc.h
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2016-05-10 06:52:58 -07:00
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DSP_SRCS-$(HAVE_MSA) += mips/add_noise_msa.c
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2016-07-08 10:06:54 -07:00
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DSP_SRCS-$(HAVE_MSA) += mips/deblock_msa.c
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2016-05-10 06:52:58 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/add_noise_sse2.asm
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2016-07-08 10:06:54 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/deblock_sse2.asm
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2016-05-02 12:17:39 -07:00
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endif # CONFIG_POSTPROC
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2015-07-19 15:02:56 -07:00
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DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM)
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DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c
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DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred4_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred8_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred16_dspr2.c
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2015-08-03 10:17:45 -07:00
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DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.h
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DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.c
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2015-07-22 10:40:42 -07:00
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# interpolation filters
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DSP_SRCS-yes += vpx_convolve.c
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DSP_SRCS-yes += vpx_convolve.h
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DSP_SRCS-yes += vpx_filter.h
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DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h
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DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/vpx_asm_stubs.c
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DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_8t_sse2.asm
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DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_bilinear_sse2.asm
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DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm
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DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_bilinear_ssse3.asm
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DSP_SRCS-$(HAVE_AVX2) += x86/vpx_subpixel_8t_intrin_avx2.c
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DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_intrin_ssse3.c
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ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
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DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_8t_sse2.asm
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DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_bilinear_sse2.asm
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endif
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2016-06-29 18:15:49 -07:00
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2015-07-22 10:40:42 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/vpx_convolve_copy_sse2.asm
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ifeq ($(HAVE_NEON_ASM),yes)
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DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM)
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DSP_SRCS-yes += arm/vpx_convolve8_avg_neon_asm$(ASM)
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DSP_SRCS-yes += arm/vpx_convolve8_neon_asm$(ASM)
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DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM)
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DSP_SRCS-yes += arm/vpx_convolve_neon.c
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else
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ifeq ($(HAVE_NEON),yes)
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DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c
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DSP_SRCS-yes += arm/vpx_convolve8_neon.c
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DSP_SRCS-yes += arm/vpx_convolve_avg_neon.c
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DSP_SRCS-yes += arm/vpx_convolve_neon.c
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endif # HAVE_NEON
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endif # HAVE_NEON_ASM
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# common (msa)
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_vert_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_horiz_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_vert_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_avg_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_copy_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_msa.h
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2015-07-28 10:52:24 -07:00
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# common (dspr2)
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2015-08-03 09:54:13 -07:00
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve_common_dspr2.h
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_horiz_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_horiz_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_vert_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_horiz_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_horiz_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_vert_dspr2.c
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2015-07-28 10:52:24 -07:00
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2015-07-15 19:14:54 -07:00
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# loop filters
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DSP_SRCS-yes += loopfilter.c
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DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/loopfilter_sse2.c
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DSP_SRCS-$(HAVE_AVX2) += x86/loopfilter_avx2.c
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ifeq ($(HAVE_NEON_ASM),yes)
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2016-09-30 09:48:54 -07:00
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DSP_SRCS-yes += arm/loopfilter_vertical_4_dual_neon.c
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2016-09-30 09:56:28 -07:00
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DSP_SRCS-yes += arm/loopfilter_16_neon$(ASM)
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2015-07-15 19:14:54 -07:00
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DSP_SRCS-yes += arm/loopfilter_8_neon$(ASM)
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DSP_SRCS-yes += arm/loopfilter_4_neon$(ASM)
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else
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ifeq ($(HAVE_NEON),yes)
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2016-09-30 09:56:28 -07:00
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DSP_SRCS-yes += arm/loopfilter_neon.c
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2015-07-15 19:14:54 -07:00
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endif # HAVE_NEON
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endif # HAVE_NEON_ASM
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DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_msa.h
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DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_16_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_8_msa.c
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DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_4_msa.c
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2015-08-17 16:14:24 -07:00
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DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.h
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DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_macros_dspr2.h
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DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_masks_dspr2.h
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DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_horiz_dspr2.c
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DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_vert_dspr2.c
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2015-07-15 19:14:54 -07:00
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ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
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DSP_SRCS-$(HAVE_SSE2) += x86/highbd_loopfilter_sse2.c
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endif # CONFIG_VP9_HIGHBITDEPTH
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2015-07-23 16:35:44 -07:00
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DSP_SRCS-yes += txfm_common.h
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DSP_SRCS-$(HAVE_SSE2) += x86/txfm_common_sse2.h
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2015-07-22 11:53:21 -07:00
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DSP_SRCS-$(HAVE_MSA) += mips/txfm_macros_msa.h
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2015-07-21 11:56:36 -07:00
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# forward transform
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2016-06-17 15:22:11 -07:00
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ifeq ($(CONFIG_VP9_ENCODER),yes)
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2015-07-21 11:56:36 -07:00
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DSP_SRCS-yes += fwd_txfm.c
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DSP_SRCS-yes += fwd_txfm.h
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2015-07-27 14:56:43 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.h
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2015-07-21 11:56:36 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.c
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DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_impl_sse2.h
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2015-07-27 16:05:15 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/fwd_dct32x32_impl_sse2.h
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2015-07-23 11:03:55 -07:00
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ifeq ($(ARCH_X86_64),yes)
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DSP_SRCS-$(HAVE_SSSE3) += x86/fwd_txfm_ssse3_x86_64.asm
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endif
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2015-07-27 16:05:15 -07:00
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DSP_SRCS-$(HAVE_AVX2) += x86/fwd_txfm_avx2.c
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DSP_SRCS-$(HAVE_AVX2) += x86/fwd_dct32x32_impl_avx2.h
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2015-07-21 11:56:36 -07:00
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DSP_SRCS-$(HAVE_NEON) += arm/fwd_txfm_neon.c
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2015-07-22 11:53:21 -07:00
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DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.h
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DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.c
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2015-07-27 16:05:15 -07:00
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DSP_SRCS-$(HAVE_MSA) += mips/fwd_dct32x32_msa.c
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2016-06-17 15:22:11 -07:00
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endif # CONFIG_VP9_ENCODER
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2015-07-21 11:56:36 -07:00
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2015-07-30 18:53:18 -07:00
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# inverse transform
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2016-06-17 15:22:11 -07:00
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ifeq ($(CONFIG_VP9),yes)
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2015-07-30 18:53:18 -07:00
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DSP_SRCS-yes += inv_txfm.h
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DSP_SRCS-yes += inv_txfm.c
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DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.h
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DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.c
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2015-08-19 09:14:21 -07:00
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DSP_SRCS-$(HAVE_SSE2) += x86/inv_wht_sse2.asm
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2015-07-30 18:53:18 -07:00
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ifeq ($(ARCH_X86_64),yes)
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DSP_SRCS-$(HAVE_SSSE3) += x86/inv_txfm_ssse3_x86_64.asm
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endif # ARCH_X86_64
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2016-09-30 00:43:49 -07:00
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DSP_SRCS-$(HAVE_NEON_ASM) += arm/save_reg_neon$(ASM)
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ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
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2015-07-30 18:53:18 -07:00
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ifeq ($(HAVE_NEON_ASM),yes)
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DSP_SRCS-yes += arm/idct4x4_1_add_neon$(ASM)
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DSP_SRCS-yes += arm/idct4x4_add_neon$(ASM)
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DSP_SRCS-yes += arm/idct8x8_1_add_neon$(ASM)
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DSP_SRCS-yes += arm/idct8x8_add_neon$(ASM)
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DSP_SRCS-yes += arm/idct16x16_1_add_neon$(ASM)
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DSP_SRCS-yes += arm/idct16x16_add_neon$(ASM)
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DSP_SRCS-yes += arm/idct32x32_1_add_neon$(ASM)
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DSP_SRCS-yes += arm/idct32x32_add_neon$(ASM)
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else
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ifeq ($(HAVE_NEON),yes)
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DSP_SRCS-yes += arm/idct4x4_1_add_neon.c
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DSP_SRCS-yes += arm/idct4x4_add_neon.c
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DSP_SRCS-yes += arm/idct8x8_1_add_neon.c
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DSP_SRCS-yes += arm/idct8x8_add_neon.c
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DSP_SRCS-yes += arm/idct16x16_1_add_neon.c
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DSP_SRCS-yes += arm/idct16x16_add_neon.c
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DSP_SRCS-yes += arm/idct32x32_1_add_neon.c
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DSP_SRCS-yes += arm/idct32x32_add_neon.c
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endif # HAVE_NEON
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endif # HAVE_NEON_ASM
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DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_neon.c
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2015-07-31 11:15:55 -07:00
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DSP_SRCS-$(HAVE_MSA) += mips/inv_txfm_msa.h
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DSP_SRCS-$(HAVE_MSA) += mips/idct4x4_msa.c
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|
|
|
DSP_SRCS-$(HAVE_MSA) += mips/idct8x8_msa.c
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|
|
|
DSP_SRCS-$(HAVE_MSA) += mips/idct16x16_msa.c
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|
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DSP_SRCS-$(HAVE_MSA) += mips/idct32x32_msa.c
|
2015-08-03 10:50:32 -07:00
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|
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|
|
DSP_SRCS-$(HAVE_DSPR2) += mips/inv_txfm_dspr2.h
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|
|
|
DSP_SRCS-$(HAVE_DSPR2) += mips/itrans4_dspr2.c
|
|
|
|
DSP_SRCS-$(HAVE_DSPR2) += mips/itrans8_dspr2.c
|
|
|
|
DSP_SRCS-$(HAVE_DSPR2) += mips/itrans16_dspr2.c
|
|
|
|
DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_dspr2.c
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|
|
|
DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_cols_dspr2.c
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2015-08-04 09:44:26 -07:00
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|
|
endif # CONFIG_VP9_HIGHBITDEPTH
|
2016-06-17 15:22:11 -07:00
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|
|
endif # CONFIG_VP9
|
2015-07-30 18:53:18 -07:00
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2015-07-21 11:56:36 -07:00
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|
|
# quantization
|
2016-06-17 15:22:11 -07:00
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|
|
ifeq ($(CONFIG_VP9_ENCODER),yes)
|
2015-07-17 12:05:42 -07:00
|
|
|
DSP_SRCS-yes += quantize.c
|
|
|
|
DSP_SRCS-yes += quantize.h
|
|
|
|
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/quantize_sse2.c
|
|
|
|
ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/highbd_quantize_intrin_sse2.c
|
|
|
|
endif
|
|
|
|
ifeq ($(ARCH_X86_64),yes)
|
2015-10-19 14:05:35 +01:00
|
|
|
DSP_SRCS-$(HAVE_SSSE3) += x86/quantize_ssse3_x86_64.asm
|
|
|
|
DSP_SRCS-$(HAVE_AVX) += x86/quantize_avx_x86_64.asm
|
2015-07-17 12:05:42 -07:00
|
|
|
endif
|
2015-12-11 12:40:53 -08:00
|
|
|
|
|
|
|
# avg
|
|
|
|
DSP_SRCS-yes += avg.c
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/avg_intrin_sse2.c
|
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/avg_neon.c
|
|
|
|
DSP_SRCS-$(HAVE_MSA) += mips/avg_msa.c
|
2016-05-11 13:26:19 -07:00
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/hadamard_neon.c
|
2015-12-11 12:40:53 -08:00
|
|
|
ifeq ($(ARCH_X86_64),yes)
|
|
|
|
DSP_SRCS-$(HAVE_SSSE3) += x86/avg_ssse3_x86_64.asm
|
|
|
|
endif
|
|
|
|
|
2016-06-17 15:22:11 -07:00
|
|
|
endif # CONFIG_VP9_ENCODER
|
2015-07-17 12:05:42 -07:00
|
|
|
|
2015-04-17 16:11:38 -04:00
|
|
|
ifeq ($(CONFIG_ENCODERS),yes)
|
|
|
|
DSP_SRCS-yes += sad.c
|
2015-07-06 09:33:27 -07:00
|
|
|
DSP_SRCS-yes += subtract.c
|
2016-07-01 16:02:41 -07:00
|
|
|
DSP_SRCS-yes += sum_squares.c
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/sum_squares_sse2.c
|
2015-04-17 16:11:38 -04:00
|
|
|
|
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/sad4d_neon.c
|
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/sad_neon.c
|
2015-07-06 09:33:27 -07:00
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/subtract_neon.c
|
2015-04-17 16:11:38 -04:00
|
|
|
|
2015-06-29 16:44:30 -07:00
|
|
|
DSP_SRCS-$(HAVE_MSA) += mips/sad_msa.c
|
2015-07-06 09:33:27 -07:00
|
|
|
DSP_SRCS-$(HAVE_MSA) += mips/subtract_msa.c
|
2015-05-15 11:52:03 -07:00
|
|
|
|
2015-04-17 16:11:38 -04:00
|
|
|
DSP_SRCS-$(HAVE_SSE3) += x86/sad_sse3.asm
|
|
|
|
DSP_SRCS-$(HAVE_SSSE3) += x86/sad_ssse3.asm
|
|
|
|
DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm
|
|
|
|
DSP_SRCS-$(HAVE_AVX2) += x86/sad4d_avx2.c
|
|
|
|
DSP_SRCS-$(HAVE_AVX2) += x86/sad_avx2.c
|
|
|
|
|
2015-08-10 17:42:09 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE) += x86/sad4d_sse2.asm
|
|
|
|
DSP_SRCS-$(HAVE_SSE) += x86/sad_sse2.asm
|
2015-06-29 16:44:30 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/sad4d_sse2.asm
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/sad_sse2.asm
|
2015-07-06 09:33:27 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/subtract_sse2.asm
|
2015-06-26 14:02:16 +05:30
|
|
|
|
2015-04-17 16:11:38 -04:00
|
|
|
ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad4d_sse2.asm
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad_sse2.asm
|
|
|
|
endif # CONFIG_VP9_HIGHBITDEPTH
|
2015-06-29 16:44:30 -07:00
|
|
|
|
2015-04-17 16:11:38 -04:00
|
|
|
endif # CONFIG_ENCODERS
|
|
|
|
|
2015-05-15 11:52:03 -07:00
|
|
|
ifneq ($(filter yes,$(CONFIG_ENCODERS) $(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),)
|
|
|
|
DSP_SRCS-yes += variance.c
|
2015-06-05 09:54:19 -07:00
|
|
|
DSP_SRCS-yes += variance.h
|
2015-05-15 11:52:03 -07:00
|
|
|
|
2015-06-05 09:54:19 -07:00
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/subpel_variance_neon.c
|
2015-05-15 11:52:03 -07:00
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/variance_neon.c
|
|
|
|
|
2015-06-29 16:44:30 -07:00
|
|
|
DSP_SRCS-$(HAVE_MSA) += mips/variance_msa.c
|
2015-06-05 09:54:19 -07:00
|
|
|
DSP_SRCS-$(HAVE_MSA) += mips/sub_pixel_variance_msa.c
|
2015-06-29 16:44:30 -07:00
|
|
|
|
2015-08-10 17:42:09 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE) += x86/variance_sse2.c
|
2015-06-05 09:54:19 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/variance_sse2.c # Contains SSE2 and SSSE3
|
2015-05-15 11:52:03 -07:00
|
|
|
DSP_SRCS-$(HAVE_AVX2) += x86/variance_avx2.c
|
|
|
|
DSP_SRCS-$(HAVE_AVX2) += x86/variance_impl_avx2.c
|
|
|
|
|
2015-08-06 12:53:59 -07:00
|
|
|
ifeq ($(ARCH_X86_64),yes)
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/ssim_opt_x86_64.asm
|
|
|
|
endif # ARCH_X86_64
|
|
|
|
|
2015-08-10 17:42:09 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE) += x86/subpel_variance_sse2.asm
|
2015-06-05 09:54:19 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/subpel_variance_sse2.asm # Contains SSE2 and SSSE3
|
|
|
|
|
2015-05-15 11:52:03 -07:00
|
|
|
ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_sse2.c
|
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_impl_sse2.asm
|
2015-06-05 09:54:19 -07:00
|
|
|
DSP_SRCS-$(HAVE_SSE2) += x86/highbd_subpel_variance_impl_sse2.asm
|
2015-05-15 11:52:03 -07:00
|
|
|
endif # CONFIG_VP9_HIGHBITDEPTH
|
|
|
|
endif # CONFIG_ENCODERS || CONFIG_POSTPROC || CONFIG_VP9_POSTPROC
|
|
|
|
|
2016-07-28 15:47:53 -07:00
|
|
|
# Neon utilities
|
|
|
|
DSP_SRCS-$(HAVE_NEON) += arm/transpose_neon.h
|
|
|
|
|
2015-04-17 16:11:38 -04:00
|
|
|
DSP_SRCS-no += $(DSP_SRCS_REMOVE-yes)
|
|
|
|
|
|
|
|
DSP_SRCS-yes += vpx_dsp_rtcd.c
|
|
|
|
DSP_SRCS-yes += vpx_dsp_rtcd_defs.pl
|
|
|
|
|
|
|
|
$(eval $(call rtcd_h_template,vpx_dsp_rtcd,vpx_dsp/vpx_dsp_rtcd_defs.pl))
|