2015-07-13 20:12:45 +02:00
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;
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; Copyright (c) 2015 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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2015-08-03 23:51:10 +02:00
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2015-07-13 20:12:45 +02:00
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%include "third_party/x86inc/x86inc.asm"
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2017-02-02 23:17:26 +01:00
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%include "vpx_dsp/x86/bitdepth_conversion_sse2.asm"
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2015-07-13 20:12:45 +02:00
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SECTION .text
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%macro REORDER_INPUTS 0
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; a c d b to a b c d
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SWAP 1, 3, 2
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%endmacro
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%macro TRANSFORM_COLS 0
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; input:
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; m0 a
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; m1 b
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; m2 c
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; m3 d
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paddw m0, m2
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psubw m3, m1
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; wide subtract
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punpcklwd m4, m0
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punpcklwd m5, m3
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psrad m4, 16
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psrad m5, 16
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psubd m4, m5
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psrad m4, 1
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packssdw m4, m4 ; e
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psubw m5, m4, m1 ; b
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psubw m4, m2 ; c
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psubw m0, m5
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paddw m3, m4
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; m0 a
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SWAP 1, 5 ; m1 b
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SWAP 2, 4 ; m2 c
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; m3 d
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%endmacro
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%macro TRANSPOSE_4X4 0
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punpcklwd m0, m2
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punpcklwd m1, m3
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mova m2, m0
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punpcklwd m0, m1
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punpckhwd m2, m1
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pshufd m1, m0, 0x0e
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pshufd m3, m2, 0x0e
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%endmacro
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; transpose a 4x4 int16 matrix in xmm0 and xmm1 to the bottom half of xmm0-xmm3
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%macro TRANSPOSE_4X4_WIDE 0
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mova m3, m0
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punpcklwd m0, m1
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punpckhwd m3, m1
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mova m2, m0
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punpcklwd m0, m3
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punpckhwd m2, m3
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pshufd m1, m0, 0x0e
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pshufd m3, m2, 0x0e
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%endmacro
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%macro ADD_STORE_4P_2X 5 ; src1, src2, tmp1, tmp2, zero
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2015-08-05 21:16:12 +02:00
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movd m%3, [outputq]
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movd m%4, [outputq + strideq]
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2015-07-13 20:12:45 +02:00
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punpcklbw m%3, m%5
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punpcklbw m%4, m%5
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paddw m%1, m%3
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paddw m%2, m%4
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packuswb m%1, m%5
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packuswb m%2, m%5
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movd [outputq], m%1
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movd [outputq + strideq], m%2
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%endmacro
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INIT_XMM sse2
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cglobal iwht4x4_16_add, 3, 3, 7, input, output, stride
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2017-02-02 23:17:26 +01:00
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LOAD_TRAN_LOW 0, inputq, 0
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LOAD_TRAN_LOW 1, inputq, 1
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2015-07-13 20:12:45 +02:00
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psraw m0, 2
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psraw m1, 2
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TRANSPOSE_4X4_WIDE
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REORDER_INPUTS
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TRANSFORM_COLS
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TRANSPOSE_4X4
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REORDER_INPUTS
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TRANSFORM_COLS
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pxor m4, m4
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ADD_STORE_4P_2X 0, 1, 5, 6, 4
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lea outputq, [outputq + 2 * strideq]
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ADD_STORE_4P_2X 2, 3, 5, 6, 4
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RET
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