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vpx/vp8/common/asm_com_offsets.c

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clarify *_offsets.asm differences it's difficult to mux the *_offsets.c files because of header conflicts. make three instead, name them consistently and partititon the contents to allow building them as required. Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
2011-02-04 23:44:31 +01:00
/*
* Copyright (c) 2011 The WebM project authors. All Rights Reserved.
*
* Use of this source code is governed by a BSD-style license
* that can be found in the LICENSE file in the root of the source
* tree. An additional intellectual property rights grant can be found
* in the file PATENTS. All contributing project authors may
* be found in the AUTHORS file in the root of the source tree.
*/
update extend frame borders the neon code made several assumptions which were broken by a recent change: https://review.webmproject.org/2676 update the code with new assumptions and guard them with a compile time assert Change-Id: I32a8378030759966068f34618d7b4b1b02e101a0
2011-08-03 01:20:27 +02:00
#include "vpx_config.h"
#include "vpx/vpx_codec.h"
use GCC inline magic Better fix for #326. ICC happens to support the inline magic Change-Id: Ic367eea608c88d89475cb7b05d73500d2a1bc42b
2011-06-08 20:43:34 +02:00
#include "vpx_ports/asm_offsets.h"
clarify *_offsets.asm differences it's difficult to mux the *_offsets.c files because of header conflicts. make three instead, name them consistently and partititon the contents to allow building them as required. Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
2011-02-04 23:44:31 +01:00
#include "vpx_scale/yv12config.h"
ARMv6 optimized Intra4x4 prediction Added ARM optimized intra 4x4 prediction - 2x faster on Profiler compared to C-code compiled with -O3 - Function interface changed a little to improve BLOCKD structure access Change-Id: I9bc2b723155943fe0cf03dd9ca5f1760f7a81f54
2011-11-07 12:40:01 +01:00
#include "vp8/common/blockd.h"
clarify *_offsets.asm differences it's difficult to mux the *_offsets.c files because of header conflicts. make three instead, name them consistently and partititon the contents to allow building them as required. Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
2011-02-04 23:44:31 +01:00
RFC: Reorganize MFQE loops Break MFQE code into it's own file. It is currently only valid for 16x16 and 8x8 Y blocks. It also filters 4x4 U/V blocks. Refactor filtering and add associated assembly. Limited test cases show --mfqe introduces a penalty of ~20% with HD content. The assembly reduces the penalty to ~15% Change-Id: I4b8de6b5cdff5413037de5b6c42f437033ee55bf
2012-01-27 19:23:52 +01:00
#if CONFIG_POSTPROC
#include "postproc.h"
#endif /* CONFIG_POSTPROC */
use GCC inline magic Better fix for #326. ICC happens to support the inline magic Change-Id: Ic367eea608c88d89475cb7b05d73500d2a1bc42b
2011-06-08 20:43:34 +02:00
BEGIN
clarify *_offsets.asm differences it's difficult to mux the *_offsets.c files because of header conflicts. make three instead, name them consistently and partititon the contents to allow building them as required. Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
2011-02-04 23:44:31 +01:00
use GCC inline magic Better fix for #326. ICC happens to support the inline magic Change-Id: Ic367eea608c88d89475cb7b05d73500d2a1bc42b
2011-06-08 20:43:34 +02:00
/* vpx_scale */
clarify *_offsets.asm differences it's difficult to mux the *_offsets.c files because of header conflicts. make three instead, name them consistently and partititon the contents to allow building them as required. Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
2011-02-04 23:44:31 +01:00
DEFINE(yv12_buffer_config_y_width, offsetof(YV12_BUFFER_CONFIG, y_width));
DEFINE(yv12_buffer_config_y_height, offsetof(YV12_BUFFER_CONFIG, y_height));
DEFINE(yv12_buffer_config_y_stride, offsetof(YV12_BUFFER_CONFIG, y_stride));
DEFINE(yv12_buffer_config_uv_width, offsetof(YV12_BUFFER_CONFIG, uv_width));
DEFINE(yv12_buffer_config_uv_height, offsetof(YV12_BUFFER_CONFIG, uv_height));
DEFINE(yv12_buffer_config_uv_stride, offsetof(YV12_BUFFER_CONFIG, uv_stride));
DEFINE(yv12_buffer_config_y_buffer, offsetof(YV12_BUFFER_CONFIG, y_buffer));
DEFINE(yv12_buffer_config_u_buffer, offsetof(YV12_BUFFER_CONFIG, u_buffer));
DEFINE(yv12_buffer_config_v_buffer, offsetof(YV12_BUFFER_CONFIG, v_buffer));
DEFINE(yv12_buffer_config_border, offsetof(YV12_BUFFER_CONFIG, border));
update extend frame borders the neon code made several assumptions which were broken by a recent change: https://review.webmproject.org/2676 update the code with new assumptions and guard them with a compile time assert Change-Id: I32a8378030759966068f34618d7b4b1b02e101a0
2011-08-03 01:20:27 +02:00
DEFINE(VP8BORDERINPIXELS_VAL, VP8BORDERINPIXELS);
clarify *_offsets.asm differences it's difficult to mux the *_offsets.c files because of header conflicts. make three instead, name them consistently and partititon the contents to allow building them as required. Change-Id: I8f9768c09279f934f44b6c5b0ec363f7943bb796
2011-02-04 23:44:31 +01:00
RFC: Reorganize MFQE loops Break MFQE code into it's own file. It is currently only valid for 16x16 and 8x8 Y blocks. It also filters 4x4 U/V blocks. Refactor filtering and add associated assembly. Limited test cases show --mfqe introduces a penalty of ~20% with HD content. The assembly reduces the penalty to ~15% Change-Id: I4b8de6b5cdff5413037de5b6c42f437033ee55bf
2012-01-27 19:23:52 +01:00
#if CONFIG_POSTPROC
/* mfqe.c / filter_by_weight */
DEFINE(MFQE_PRECISION_VAL, MFQE_PRECISION);
#endif /* CONFIG_POSTPROC */
use GCC inline magic Better fix for #326. ICC happens to support the inline magic Change-Id: Ic367eea608c88d89475cb7b05d73500d2a1bc42b
2011-06-08 20:43:34 +02:00
END
/* add asserts for any offset that is not supported by assembly code */
/* add asserts for any size that is not supported by assembly code */
update extend frame borders the neon code made several assumptions which were broken by a recent change: https://review.webmproject.org/2676 update the code with new assumptions and guard them with a compile time assert Change-Id: I32a8378030759966068f34618d7b4b1b02e101a0
2011-08-03 01:20:27 +02:00
Disconnect ARM tgt_isa from dsp extensions A processor with ARMv7 instructions does not necessarily have NEON dsp extensions. This CL has the added side effect of allowing the ability to enable/disable the dsp extensions cleanly. Change-Id: Ie1e879b8fe131885bc3d4138a0acc9ffe73a36df
2012-01-20 00:18:31 +01:00
#if HAVE_MEDIA
ARMv6 optimized Intra4x4 prediction Added ARM optimized intra 4x4 prediction - 2x faster on Profiler compared to C-code compiled with -O3 - Function interface changed a little to improve BLOCKD structure access Change-Id: I9bc2b723155943fe0cf03dd9ca5f1760f7a81f54
2011-11-07 12:40:01 +01:00
/* switch case in vp8_intra4x4_predict_armv6 is based on these enumerated values */
ct_assert(B_DC_PRED, B_DC_PRED == 0);
ct_assert(B_TM_PRED, B_TM_PRED == 1);
ct_assert(B_VE_PRED, B_VE_PRED == 2);
ct_assert(B_HE_PRED, B_HE_PRED == 3);
ct_assert(B_LD_PRED, B_LD_PRED == 4);
ct_assert(B_RD_PRED, B_RD_PRED == 5);
ct_assert(B_VR_PRED, B_VR_PRED == 6);
ct_assert(B_VL_PRED, B_VL_PRED == 7);
ct_assert(B_HD_PRED, B_HD_PRED == 8);
ct_assert(B_HU_PRED, B_HU_PRED == 9);
#endif
Disconnect ARM tgt_isa from dsp extensions A processor with ARMv7 instructions does not necessarily have NEON dsp extensions. This CL has the added side effect of allowing the ability to enable/disable the dsp extensions cleanly. Change-Id: Ie1e879b8fe131885bc3d4138a0acc9ffe73a36df
2012-01-20 00:18:31 +01:00
#if HAVE_NEON
update extend frame borders the neon code made several assumptions which were broken by a recent change: https://review.webmproject.org/2676 update the code with new assumptions and guard them with a compile time assert Change-Id: I32a8378030759966068f34618d7b4b1b02e101a0
2011-08-03 01:20:27 +02:00
/* vp8_yv12_extend_frame_borders_neon makes several assumptions based on this */
ct_assert(VP8BORDERINPIXELS_VAL, VP8BORDERINPIXELS == 32)
#endif
RFC: Reorganize MFQE loops Break MFQE code into it's own file. It is currently only valid for 16x16 and 8x8 Y blocks. It also filters 4x4 U/V blocks. Refactor filtering and add associated assembly. Limited test cases show --mfqe introduces a penalty of ~20% with HD content. The assembly reduces the penalty to ~15% Change-Id: I4b8de6b5cdff5413037de5b6c42f437033ee55bf
2012-01-27 19:23:52 +01:00
#if HAVE_SSE2
#if CONFIG_POSTPROC
/* vp8_filter_by_weight16x16 and 8x8 */
ct_assert(MFQE_PRECISION_VAL, MFQE_PRECISION == 4)
#endif /* CONFIG_POSTPROC */
#endif /* HAVE_SSE2 */
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