2011-03-29 15:52:00 +02:00
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;
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; Copyright (c) 2011 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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EXPORT |vp8_subtract_mby_armv6|
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EXPORT |vp8_subtract_mbuv_armv6|
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EXPORT |vp8_subtract_b_armv6|
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INCLUDE asm_enc_offsets.asm
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ARM
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REQUIRE8
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PRESERVE8
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AREA ||.text||, CODE, READONLY, ALIGN=2
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; r0 BLOCK *be
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; r1 BLOCKD *bd
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; r2 int pitch
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|vp8_subtract_b_armv6| PROC
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stmfd sp!, {r4-r9}
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ldr r4, [r0, #vp8_block_base_src]
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ldr r5, [r0, #vp8_block_src]
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ldr r6, [r0, #vp8_block_src_diff]
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ldr r3, [r4]
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ldr r7, [r0, #vp8_block_src_stride]
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add r3, r3, r5 ; src = *base_src + src
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ldr r8, [r1, #vp8_blockd_predictor]
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mov r9, #4 ; loop count
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loop_block
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ldr r0, [r3], r7 ; src
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ldr r1, [r8], r2 ; pred
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uxtb16 r4, r0 ; [s2 | s0]
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uxtb16 r5, r1 ; [p2 | p0]
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uxtb16 r0, r0, ror #8 ; [s3 | s1]
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uxtb16 r1, r1, ror #8 ; [p3 | p1]
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usub16 r4, r4, r5 ; [d2 | d0]
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usub16 r5, r0, r1 ; [d3 | d1]
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subs r9, r9, #1 ; decrement loop counter
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pkhbt r0, r4, r5, lsl #16 ; [d1 | d0]
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pkhtb r1, r5, r4, asr #16 ; [d3 | d2]
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str r0, [r6, #0] ; diff
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str r1, [r6, #4] ; diff
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add r6, r6, r2, lsl #1 ; update diff pointer
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bne loop_block
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ldmfd sp!, {r4-r9}
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mov pc, lr
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ENDP
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; r0 short *diff
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; r1 unsigned char *usrc
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; r2 unsigned char *vsrc
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2011-11-15 18:53:01 +01:00
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; r3 int src_stride
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; sp unsigned char *upred
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; sp unsigned char *vpred
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; sp int pred_stride
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2011-03-29 15:52:00 +02:00
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|vp8_subtract_mbuv_armv6| PROC
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2011-11-15 18:53:01 +01:00
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stmfd sp!, {r4-r11}
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2011-03-29 15:52:00 +02:00
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add r0, r0, #512 ; set *diff point to Cb
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mov r4, #8 ; loop count
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2011-11-15 18:53:01 +01:00
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ldr r5, [sp, #32] ; upred
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ldr r12, [sp, #40] ; pred_stride
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2011-03-29 15:52:00 +02:00
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; Subtract U block
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loop_u
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2011-11-15 18:53:01 +01:00
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ldr r6, [r1] ; usrc (A)
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ldr r7, [r5] ; upred (A)
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2011-03-29 15:52:00 +02:00
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uxtb16 r8, r6 ; [s2 | s0] (A)
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uxtb16 r9, r7 ; [p2 | p0] (A)
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uxtb16 r10, r6, ror #8 ; [s3 | s1] (A)
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uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
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usub16 r6, r8, r9 ; [d2 | d0] (A)
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usub16 r7, r10, r11 ; [d3 | d1] (A)
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2011-11-15 18:53:01 +01:00
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ldr r10, [r1, #4] ; usrc (B)
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ldr r11, [r5, #4] ; upred (B)
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2011-03-29 15:52:00 +02:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (A)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (A)
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str r8, [r0], #4 ; diff (A)
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uxtb16 r8, r10 ; [s2 | s0] (B)
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str r9, [r0], #4 ; diff (A)
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uxtb16 r9, r11 ; [p2 | p0] (B)
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uxtb16 r10, r10, ror #8 ; [s3 | s1] (B)
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uxtb16 r11, r11, ror #8 ; [p3 | p1] (B)
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usub16 r6, r8, r9 ; [d2 | d0] (B)
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usub16 r7, r10, r11 ; [d3 | d1] (B)
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2011-11-15 18:53:01 +01:00
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add r1, r1, r3 ; update usrc pointer
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add r5, r5, r12 ; update upred pointer
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2011-03-29 15:52:00 +02:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (B)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (B)
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str r8, [r0], #4 ; diff (B)
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subs r4, r4, #1 ; update loop counter
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str r9, [r0], #4 ; diff (B)
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bne loop_u
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2011-11-15 18:53:01 +01:00
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ldr r5, [sp, #36] ; vpred
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2011-03-29 15:52:00 +02:00
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mov r4, #8 ; loop count
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; Subtract V block
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loop_v
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2011-11-15 18:53:01 +01:00
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ldr r6, [r2] ; vsrc (A)
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ldr r7, [r5] ; vpred (A)
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2011-03-29 15:52:00 +02:00
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uxtb16 r8, r6 ; [s2 | s0] (A)
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uxtb16 r9, r7 ; [p2 | p0] (A)
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uxtb16 r10, r6, ror #8 ; [s3 | s1] (A)
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uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
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usub16 r6, r8, r9 ; [d2 | d0] (A)
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usub16 r7, r10, r11 ; [d3 | d1] (A)
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2011-11-15 18:53:01 +01:00
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ldr r10, [r2, #4] ; vsrc (B)
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ldr r11, [r5, #4] ; vpred (B)
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2011-03-29 15:52:00 +02:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (A)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (A)
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str r8, [r0], #4 ; diff (A)
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uxtb16 r8, r10 ; [s2 | s0] (B)
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str r9, [r0], #4 ; diff (A)
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uxtb16 r9, r11 ; [p2 | p0] (B)
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uxtb16 r10, r10, ror #8 ; [s3 | s1] (B)
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uxtb16 r11, r11, ror #8 ; [p3 | p1] (B)
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usub16 r6, r8, r9 ; [d2 | d0] (B)
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usub16 r7, r10, r11 ; [d3 | d1] (B)
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2011-11-15 18:53:01 +01:00
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add r2, r2, r3 ; update vsrc pointer
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add r5, r5, r12 ; update vpred pointer
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2011-03-29 15:52:00 +02:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (B)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (B)
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str r8, [r0], #4 ; diff (B)
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subs r4, r4, #1 ; update loop counter
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str r9, [r0], #4 ; diff (B)
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bne loop_v
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2011-11-15 18:53:01 +01:00
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ldmfd sp!, {r4-r11}
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bx lr
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2011-03-29 15:52:00 +02:00
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ENDP
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; r0 short *diff
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; r1 unsigned char *src
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2011-11-15 18:53:01 +01:00
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; r2 int src_stride
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; r3 unsigned char *pred
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; sp int pred_stride
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2011-03-29 15:52:00 +02:00
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|vp8_subtract_mby_armv6| PROC
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stmfd sp!, {r4-r11}
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2011-11-15 18:53:01 +01:00
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ldr r12, [sp, #32] ; pred_stride
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2011-03-29 15:52:00 +02:00
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mov r4, #16
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loop
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ldr r6, [r1] ; src (A)
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2011-11-15 18:53:01 +01:00
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ldr r7, [r3] ; pred (A)
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2011-03-29 15:52:00 +02:00
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uxtb16 r8, r6 ; [s2 | s0] (A)
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uxtb16 r9, r7 ; [p2 | p0] (A)
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uxtb16 r10, r6, ror #8 ; [s3 | s1] (A)
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uxtb16 r11, r7, ror #8 ; [p3 | p1] (A)
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usub16 r6, r8, r9 ; [d2 | d0] (A)
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usub16 r7, r10, r11 ; [d3 | d1] (A)
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ldr r10, [r1, #4] ; src (B)
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2011-11-15 18:53:01 +01:00
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ldr r11, [r3, #4] ; pred (B)
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2011-03-29 15:52:00 +02:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (A)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (A)
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str r8, [r0], #4 ; diff (A)
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uxtb16 r8, r10 ; [s2 | s0] (B)
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str r9, [r0], #4 ; diff (A)
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uxtb16 r9, r11 ; [p2 | p0] (B)
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uxtb16 r10, r10, ror #8 ; [s3 | s1] (B)
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uxtb16 r11, r11, ror #8 ; [p3 | p1] (B)
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usub16 r6, r8, r9 ; [d2 | d0] (B)
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usub16 r7, r10, r11 ; [d3 | d1] (B)
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ldr r10, [r1, #8] ; src (C)
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2011-11-15 18:53:01 +01:00
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ldr r11, [r3, #8] ; pred (C)
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2011-03-29 15:52:00 +02:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (B)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (B)
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str r8, [r0], #4 ; diff (B)
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uxtb16 r8, r10 ; [s2 | s0] (C)
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str r9, [r0], #4 ; diff (B)
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uxtb16 r9, r11 ; [p2 | p0] (C)
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uxtb16 r10, r10, ror #8 ; [s3 | s1] (C)
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uxtb16 r11, r11, ror #8 ; [p3 | p1] (C)
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usub16 r6, r8, r9 ; [d2 | d0] (C)
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usub16 r7, r10, r11 ; [d3 | d1] (C)
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ldr r10, [r1, #12] ; src (D)
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2011-11-15 18:53:01 +01:00
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ldr r11, [r3, #12] ; pred (D)
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2011-03-29 15:52:00 +02:00
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2011-11-15 18:53:01 +01:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (C)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (C)
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2011-03-29 15:52:00 +02:00
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str r8, [r0], #4 ; diff (C)
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uxtb16 r8, r10 ; [s2 | s0] (D)
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str r9, [r0], #4 ; diff (C)
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uxtb16 r9, r11 ; [p2 | p0] (D)
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uxtb16 r10, r10, ror #8 ; [s3 | s1] (D)
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uxtb16 r11, r11, ror #8 ; [p3 | p1] (D)
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usub16 r6, r8, r9 ; [d2 | d0] (D)
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usub16 r7, r10, r11 ; [d3 | d1] (D)
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2011-11-15 18:53:01 +01:00
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add r1, r1, r2 ; update src pointer
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add r3, r3, r12 ; update pred pointer
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2011-03-29 15:52:00 +02:00
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pkhbt r8, r6, r7, lsl #16 ; [d1 | d0] (D)
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pkhtb r9, r7, r6, asr #16 ; [d3 | d2] (D)
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str r8, [r0], #4 ; diff (D)
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subs r4, r4, #1 ; update loop counter
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str r9, [r0], #4 ; diff (D)
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bne loop
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ldmfd sp!, {r4-r11}
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2011-11-15 18:53:01 +01:00
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bx lr
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2011-03-29 15:52:00 +02:00
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ENDP
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END
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