439 lines
16 KiB
C
439 lines
16 KiB
C
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/*
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* Copyright (c) 2013 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#include <assert.h>
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#include <stdio.h>
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#include "./vpx_config.h"
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#include "./vp9_rtcd.h"
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#include "vp9/common/vp9_common.h"
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#include "vp9/common/vp9_blockd.h"
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#include "vp9/common/vp9_idct.h"
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#include "vp9/common/mips/dspr2/vp9_common_dspr2.h"
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#if HAVE_DSPR2
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static void vp9_idct4_1d_rows_dspr2(const int16_t *input, int16_t *output) {
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int16_t step_0, step_1, step_2, step_3;
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int Temp0, Temp1, Temp2, Temp3;
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const int const_2_power_13 = 8192;
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int i;
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for (i = 4; i--; ) {
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__asm__ __volatile__ (
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/*
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temp_1 = (input[0] + input[2]) * cospi_16_64;
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step_0 = dct_const_round_shift(temp_1);
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temp_2 = (input[0] - input[2]) * cospi_16_64;
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step_1 = dct_const_round_shift(temp_2);
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*/
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"lh %[Temp0], 0(%[input]) \n\t"
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"lh %[Temp1], 4(%[input]) \n\t"
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"mtlo %[const_2_power_13], $ac0 \n\t"
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"mthi $zero, $ac0 \n\t"
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"mtlo %[const_2_power_13], $ac1 \n\t"
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"mthi $zero, $ac1 \n\t"
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"add %[Temp2], %[Temp0], %[Temp1] \n\t"
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"sub %[Temp3], %[Temp0], %[Temp1] \n\t"
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"madd $ac0, %[Temp2], %[cospi_16_64] \n\t"
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"lh %[Temp0], 2(%[input]) \n\t"
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"lh %[Temp1], 6(%[input]) \n\t"
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"extp %[step_0], $ac0, 31 \n\t"
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"mtlo %[const_2_power_13], $ac0 \n\t"
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"mthi $zero, $ac0 \n\t"
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"madd $ac1, %[Temp3], %[cospi_16_64] \n\t"
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"extp %[step_1], $ac1, 31 \n\t"
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"mtlo %[const_2_power_13], $ac1 \n\t"
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"mthi $zero, $ac1 \n\t"
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/*
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temp1 = input[1] * cospi_24_64 - input[3] * cospi_8_64;
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step_2 = dct_const_round_shift(temp1);
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*/
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"madd $ac0, %[Temp0], %[cospi_24_64] \n\t"
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"msub $ac0, %[Temp1], %[cospi_8_64] \n\t"
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"extp %[step_2], $ac0, 31 \n\t"
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/*
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temp2 = input[1] * cospi_8_64 + input[3] * cospi_24_64;
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step_3 = dct_const_round_shift(temp2);
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*/
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"madd $ac1, %[Temp0], %[cospi_8_64] \n\t"
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"madd $ac1, %[Temp1], %[cospi_24_64] \n\t"
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"extp %[step_3], $ac1, 31 \n\t"
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/*
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output[0] = step_0 + step_3;
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output[4] = step_1 + step_2;
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output[8] = step_1 - step_2;
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output[12] = step_0 - step_3;
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*/
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"add %[Temp0], %[step_0], %[step_3] \n\t"
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"sh %[Temp0], 0(%[output]) \n\t"
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"add %[Temp1], %[step_1], %[step_2] \n\t"
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"sh %[Temp1], 8(%[output]) \n\t"
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"sub %[Temp2], %[step_1], %[step_2] \n\t"
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"sh %[Temp2], 16(%[output]) \n\t"
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"sub %[Temp3], %[step_0], %[step_3] \n\t"
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"sh %[Temp3], 24(%[output]) \n\t"
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: [Temp0] "=&r" (Temp0), [Temp1] "=&r" (Temp1),
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[Temp2] "=&r" (Temp2), [Temp3] "=&r" (Temp3),
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[step_0] "=&r" (step_0), [step_1] "=&r" (step_1),
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[step_2] "=&r" (step_2), [step_3] "=&r" (step_3),
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[output] "+r" (output)
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: [const_2_power_13] "r" (const_2_power_13),
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[cospi_8_64] "r" (cospi_8_64), [cospi_16_64] "r" (cospi_16_64),
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[cospi_24_64] "r" (cospi_24_64),
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[input] "r" (input)
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);
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input += 4;
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output += 1;
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}
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}
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static void vp9_idct4_1d_columns_add_blk_dspr2(int16_t *input, uint8_t *dest,
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int dest_stride) {
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int16_t step_0, step_1, step_2, step_3;
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int Temp0, Temp1, Temp2, Temp3;
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const int const_2_power_13 = 8192;
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int i;
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uint8_t *dest_pix;
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uint8_t *cm = vp9_ff_cropTbl;
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/* prefetch vp9_ff_cropTbl */
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vp9_prefetch_load(vp9_ff_cropTbl);
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vp9_prefetch_load(vp9_ff_cropTbl + 32);
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vp9_prefetch_load(vp9_ff_cropTbl + 64);
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vp9_prefetch_load(vp9_ff_cropTbl + 96);
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vp9_prefetch_load(vp9_ff_cropTbl + 128);
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vp9_prefetch_load(vp9_ff_cropTbl + 160);
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vp9_prefetch_load(vp9_ff_cropTbl + 192);
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vp9_prefetch_load(vp9_ff_cropTbl + 224);
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for (i = 0; i < 4; ++i) {
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dest_pix = (dest + i);
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__asm__ __volatile__ (
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/*
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temp_1 = (input[0] + input[2]) * cospi_16_64;
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step_0 = dct_const_round_shift(temp_1);
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temp_2 = (input[0] - input[2]) * cospi_16_64;
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step_1 = dct_const_round_shift(temp_2);
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*/
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"lh %[Temp0], 0(%[input]) \n\t"
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"lh %[Temp1], 4(%[input]) \n\t"
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"mtlo %[const_2_power_13], $ac0 \n\t"
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"mthi $zero, $ac0 \n\t"
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"mtlo %[const_2_power_13], $ac1 \n\t"
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"mthi $zero, $ac1 \n\t"
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"add %[Temp2], %[Temp0], %[Temp1] \n\t"
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"sub %[Temp3], %[Temp0], %[Temp1] \n\t"
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"madd $ac0, %[Temp2], %[cospi_16_64] \n\t"
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"lh %[Temp0], 2(%[input]) \n\t"
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"lh %[Temp1], 6(%[input]) \n\t"
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"extp %[step_0], $ac0, 31 \n\t"
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"mtlo %[const_2_power_13], $ac0 \n\t"
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"mthi $zero, $ac0 \n\t"
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"madd $ac1, %[Temp3], %[cospi_16_64] \n\t"
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"extp %[step_1], $ac1, 31 \n\t"
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"mtlo %[const_2_power_13], $ac1 \n\t"
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"mthi $zero, $ac1 \n\t"
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/*
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temp1 = input[1] * cospi_24_64 - input[3] * cospi_8_64;
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step_2 = dct_const_round_shift(temp1);
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*/
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"madd $ac0, %[Temp0], %[cospi_24_64] \n\t"
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"msub $ac0, %[Temp1], %[cospi_8_64] \n\t"
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"extp %[step_2], $ac0, 31 \n\t"
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/*
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temp2 = input[1] * cospi_8_64 + input[3] * cospi_24_64;
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step_3 = dct_const_round_shift(temp2);
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*/
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"madd $ac1, %[Temp0], %[cospi_8_64] \n\t"
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"madd $ac1, %[Temp1], %[cospi_24_64] \n\t"
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"extp %[step_3], $ac1, 31 \n\t"
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/*
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output[0] = step_0 + step_3;
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output[4] = step_1 + step_2;
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output[8] = step_1 - step_2;
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output[12] = step_0 - step_3;
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*/
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"add %[Temp0], %[step_0], %[step_3] \n\t"
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"addi %[Temp0], %[Temp0], 8 \n\t"
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"sra %[Temp0], %[Temp0], 4 \n\t"
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"lbu %[Temp1], 0(%[dest_pix]) \n\t"
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"add %[Temp1], %[Temp1], %[Temp0] \n\t"
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"add %[Temp0], %[step_1], %[step_2] \n\t"
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"lbux %[Temp2], %[Temp1](%[cm]) \n\t"
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"sb %[Temp2], 0(%[dest_pix]) \n\t"
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"addu %[dest_pix], %[dest_pix], %[dest_stride] \n\t"
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"addi %[Temp0], %[Temp0], 8 \n\t"
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"sra %[Temp0], %[Temp0], 4 \n\t"
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"lbu %[Temp1], 0(%[dest_pix]) \n\t"
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"add %[Temp1], %[Temp1], %[Temp0] \n\t"
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"sub %[Temp0], %[step_1], %[step_2] \n\t"
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"lbux %[Temp2], %[Temp1](%[cm]) \n\t"
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"sb %[Temp2], 0(%[dest_pix]) \n\t"
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"addu %[dest_pix], %[dest_pix], %[dest_stride] \n\t"
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"addi %[Temp0], %[Temp0], 8 \n\t"
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"sra %[Temp0], %[Temp0], 4 \n\t"
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"lbu %[Temp1], 0(%[dest_pix]) \n\t"
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"add %[Temp1], %[Temp1], %[Temp0] \n\t"
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"sub %[Temp0], %[step_0], %[step_3] \n\t"
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"lbux %[Temp2], %[Temp1](%[cm]) \n\t"
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"sb %[Temp2], 0(%[dest_pix]) \n\t"
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"addu %[dest_pix], %[dest_pix], %[dest_stride] \n\t"
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"addi %[Temp0], %[Temp0], 8 \n\t"
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"sra %[Temp0], %[Temp0], 4 \n\t"
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"lbu %[Temp1], 0(%[dest_pix]) \n\t"
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"add %[Temp1], %[Temp1], %[Temp0] \n\t"
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"lbux %[Temp2], %[Temp1](%[cm]) \n\t"
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"sb %[Temp2], 0(%[dest_pix]) \n\t"
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: [Temp0] "=&r" (Temp0), [Temp1] "=&r" (Temp1),
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[Temp2] "=&r" (Temp2), [Temp3] "=&r" (Temp3),
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[step_0] "=&r" (step_0), [step_1] "=&r" (step_1),
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[step_2] "=&r" (step_2), [step_3] "=&r" (step_3),
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[dest_pix] "+r" (dest_pix)
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: [const_2_power_13] "r" (const_2_power_13),
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[cospi_8_64] "r" (cospi_8_64), [cospi_16_64] "r" (cospi_16_64),
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[cospi_24_64] "r" (cospi_24_64),
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[input] "r" (input), [cm] "r" (cm), [dest_stride] "r" (dest_stride)
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);
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input += 4;
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}
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}
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void vp9_idct4x4_16_add_dspr2(const int16_t *input, uint8_t *dest,
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int dest_stride) {
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DECLARE_ALIGNED(32, int16_t, out[4 * 4]);
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int16_t *outptr = out;
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uint32_t pos = 45;
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/* bit positon for extract from acc */
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__asm__ __volatile__ (
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"wrdsp %[pos], 1 \n\t"
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:
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: [pos] "r" (pos)
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);
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// Rows
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vp9_idct4_1d_rows_dspr2(input, outptr);
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// Columns
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vp9_idct4_1d_columns_add_blk_dspr2(&out[0], dest, dest_stride);
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}
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void vp9_idct4x4_1_add_dspr2(const int16_t *input, uint8_t *dest,
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int dest_stride) {
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int a1, absa1;
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int r;
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int32_t out;
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int t2, vector_a1, vector_a;
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uint32_t pos = 45;
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int16_t input_dc = input[0];
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/* bit positon for extract from acc */
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__asm__ __volatile__ (
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"wrdsp %[pos], 1 \n\t"
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:
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: [pos] "r" (pos)
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);
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out = DCT_CONST_ROUND_SHIFT_TWICE_COSPI_16_64(input_dc);
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__asm__ __volatile__ (
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"addi %[out], %[out], 8 \n\t"
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"sra %[a1], %[out], 4 \n\t"
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: [out] "+r" (out), [a1] "=r" (a1)
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:
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);
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if (a1 < 0) {
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/* use quad-byte
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* input and output memory are four byte aligned */
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__asm__ __volatile__ (
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"abs %[absa1], %[a1] \n\t"
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"replv.qb %[vector_a1], %[absa1] \n\t"
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: [absa1] "=r" (absa1), [vector_a1] "=r" (vector_a1)
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: [a1] "r" (a1)
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);
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for (r = 4; r--;) {
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__asm__ __volatile__ (
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"lw %[t2], 0(%[dest]) \n\t"
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"subu_s.qb %[vector_a], %[t2], %[vector_a1] \n\t"
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"sw %[vector_a], 0(%[dest]) \n\t"
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"add %[dest], %[dest], %[dest_stride] \n\t"
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: [t2] "=&r" (t2), [vector_a] "=&r" (vector_a),
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[dest] "+&r" (dest)
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: [dest_stride] "r" (dest_stride), [vector_a1] "r" (vector_a1)
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);
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}
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} else {
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/* use quad-byte
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* input and output memory are four byte aligned */
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__asm__ __volatile__ (
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|
|
"replv.qb %[vector_a1], %[a1] \n\t"
|
||
|
|
: [vector_a1] "=r" (vector_a1)
|
||
|
|
: [a1] "r" (a1)
|
||
|
|
);
|
||
|
|
|
||
|
|
for (r = 4; r--;) {
|
||
|
|
__asm__ __volatile__ (
|
||
|
|
"lw %[t2], 0(%[dest]) \n\t"
|
||
|
|
"addu_s.qb %[vector_a], %[t2], %[vector_a1] \n\t"
|
||
|
|
"sw %[vector_a], 0(%[dest]) \n\t"
|
||
|
|
"add %[dest], %[dest], %[dest_stride] \n\t"
|
||
|
|
|
||
|
|
: [t2] "=&r" (t2), [vector_a] "=&r" (vector_a),
|
||
|
|
[dest] "+&r" (dest)
|
||
|
|
: [dest_stride] "r" (dest_stride), [vector_a1] "r" (vector_a1)
|
||
|
|
);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void iadst4_1d_dspr2(const int16_t *input, int16_t *output) {
|
||
|
|
int s0, s1, s2, s3, s4, s5, s6, s7;
|
||
|
|
int x0, x1, x2, x3;
|
||
|
|
|
||
|
|
x0 = input[0];
|
||
|
|
x1 = input[1];
|
||
|
|
x2 = input[2];
|
||
|
|
x3 = input[3];
|
||
|
|
|
||
|
|
if (!(x0 | x1 | x2 | x3)) {
|
||
|
|
output[0] = output[1] = output[2] = output[3] = 0;
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
s0 = sinpi_1_9 * x0;
|
||
|
|
s1 = sinpi_2_9 * x0;
|
||
|
|
s2 = sinpi_3_9 * x1;
|
||
|
|
s3 = sinpi_4_9 * x2;
|
||
|
|
s4 = sinpi_1_9 * x2;
|
||
|
|
s5 = sinpi_2_9 * x3;
|
||
|
|
s6 = sinpi_4_9 * x3;
|
||
|
|
s7 = x0 - x2 + x3;
|
||
|
|
|
||
|
|
x0 = s0 + s3 + s5;
|
||
|
|
x1 = s1 - s4 - s6;
|
||
|
|
x2 = sinpi_3_9 * s7;
|
||
|
|
x3 = s2;
|
||
|
|
|
||
|
|
s0 = x0 + x3;
|
||
|
|
s1 = x1 + x3;
|
||
|
|
s2 = x2;
|
||
|
|
s3 = x0 + x1 - x3;
|
||
|
|
|
||
|
|
// 1-D transform scaling factor is sqrt(2).
|
||
|
|
// The overall dynamic range is 14b (input) + 14b (multiplication scaling)
|
||
|
|
// + 1b (addition) = 29b.
|
||
|
|
// Hence the output bit depth is 15b.
|
||
|
|
output[0] = dct_const_round_shift(s0);
|
||
|
|
output[1] = dct_const_round_shift(s1);
|
||
|
|
output[2] = dct_const_round_shift(s2);
|
||
|
|
output[3] = dct_const_round_shift(s3);
|
||
|
|
}
|
||
|
|
|
||
|
|
void vp9_iht4x4_16_add_dspr2(const int16_t *input, uint8_t *dest,
|
||
|
|
int dest_stride, int tx_type) {
|
||
|
|
int i, j;
|
||
|
|
DECLARE_ALIGNED(32, int16_t, out[4 * 4]);
|
||
|
|
int16_t *outptr = out;
|
||
|
|
int16_t temp_in[4 * 4], temp_out[4];
|
||
|
|
uint32_t pos = 45;
|
||
|
|
|
||
|
|
/* bit positon for extract from acc */
|
||
|
|
__asm__ __volatile__ (
|
||
|
|
"wrdsp %[pos], 1 \n\t"
|
||
|
|
:
|
||
|
|
: [pos] "r" (pos)
|
||
|
|
);
|
||
|
|
|
||
|
|
switch (tx_type) {
|
||
|
|
case DCT_DCT: // DCT in both horizontal and vertical
|
||
|
|
vp9_idct4_1d_rows_dspr2(input, outptr);
|
||
|
|
vp9_idct4_1d_columns_add_blk_dspr2(&out[0], dest, dest_stride);
|
||
|
|
break;
|
||
|
|
case ADST_DCT: // ADST in vertical, DCT in horizontal
|
||
|
|
vp9_idct4_1d_rows_dspr2(input, outptr);
|
||
|
|
|
||
|
|
outptr = out;
|
||
|
|
|
||
|
|
for (i = 0; i < 4; ++i) {
|
||
|
|
iadst4_1d_dspr2(outptr, temp_out);
|
||
|
|
|
||
|
|
for (j = 0; j < 4; ++j)
|
||
|
|
dest[j * dest_stride + i] =
|
||
|
|
clip_pixel(ROUND_POWER_OF_TWO(temp_out[j], 4)
|
||
|
|
+ dest[j * dest_stride + i]);
|
||
|
|
|
||
|
|
outptr += 4;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case DCT_ADST: // DCT in vertical, ADST in horizontal
|
||
|
|
for (i = 0; i < 4; ++i) {
|
||
|
|
iadst4_1d_dspr2(input, outptr);
|
||
|
|
input += 4;
|
||
|
|
outptr += 4;
|
||
|
|
}
|
||
|
|
|
||
|
|
for (i = 0; i < 4; ++i) {
|
||
|
|
for (j = 0; j < 4; ++j) {
|
||
|
|
temp_in[i * 4 + j] = out[j * 4 + i];
|
||
|
|
}
|
||
|
|
}
|
||
|
|
vp9_idct4_1d_columns_add_blk_dspr2(&temp_in[0], dest, dest_stride);
|
||
|
|
break;
|
||
|
|
case ADST_ADST: // ADST in both directions
|
||
|
|
for (i = 0; i < 4; ++i) {
|
||
|
|
iadst4_1d_dspr2(input, outptr);
|
||
|
|
input += 4;
|
||
|
|
outptr += 4;
|
||
|
|
}
|
||
|
|
|
||
|
|
for (i = 0; i < 4; ++i) {
|
||
|
|
for (j = 0; j < 4; ++j)
|
||
|
|
temp_in[j] = out[j * 4 + i];
|
||
|
|
iadst4_1d_dspr2(temp_in, temp_out);
|
||
|
|
|
||
|
|
for (j = 0; j < 4; ++j)
|
||
|
|
dest[j * dest_stride + i] =
|
||
|
|
clip_pixel(ROUND_POWER_OF_TWO(temp_out[j], 4)
|
||
|
|
+ dest[j * dest_stride + i]);
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
printf("vp9_short_iht4x4_add_dspr2 : Invalid tx_type\n");
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif // #if HAVE_DSPR2
|