66 lines
2.5 KiB
Batchfile
66 lines
2.5 KiB
Batchfile
/* Copyright (C) 2005 Psi Systems, Inc.
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File: speex_C55_test.cmd
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Linker command file with memory allocation for TI TMS320VC5509A processor
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for use with TI Code Composer (TM) DSP development tools.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of the Xiph.org Foundation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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-c
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-stack 0x1c00
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-heap 0x1000 /* If private memory allocation is used for Speex */
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/*-heap 0x6000 / * If calloc is used for Speex */
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-sysstack 0x200
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-lrts55.lib
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MEMORY
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{
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DARAM: origin = 0x200, len = 0x7e00
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DARAM_B: origin = 0x8000, len = 0x8000
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VECT: origin = 0x100, len = 0x100
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SARAM_A: origin = 0x10000, len = 0x10000
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SARAM_B: origin = 0x20000, len = 0x20000
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}
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SECTIONS
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{
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.vectors: {} > VECT
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.bootmem: {} > DARAM
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.text: {} > SARAM_B
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.cinit: {} > SARAM_B
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.switch: {} > SARAM_B
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.bss: {} > DARAM
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/* .far: {} > DARAM*/
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.const: {} > DARAM
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.sysmem: {} > DARAM_B
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.cio: {} > DARAM
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.stack: {} > DARAM
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.sysstack: {} > DARAM
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.myheap: {} > SARAM_A
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}
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