161 lines
3.9 KiB
Raku
Executable File
161 lines
3.9 KiB
Raku
Executable File
#!/usr/bin/env perl
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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# project. Rights for redistribution and usage in source and binary
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# forms are granted according to the OpenSSL license.
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# ====================================================================
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#
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# 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
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# "hand-coded assembler"] doesn't stand for the whole improvement
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# coefficient. It turned out that eliminating RC4_CHAR from config
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# line results in ~40% improvement (yes, even for C implementation).
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# Presumably it has everything to do with AMD cache architecture and
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# RAW or whatever penalties. Once again! The module *requires* config
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# line *without* RC4_CHAR! As for coding "secret," I bet on partial
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# register arithmetics. For example instead of 'inc %r8; and $255,%r8'
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# I simply 'inc %r8b'. Even though optimization manual discourages
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# to operate on partial registers, it turned out to be the best bet.
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# At least for AMD... How IA32E would perform remains to be seen...
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# As was shown by Marc Bevand reordering of couple of load operations
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# results in even higher performance gain of 3.3x:-) At least on
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# Opteron... For reference, 1x in this case is RC4_CHAR C-code
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# compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
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# Latter means that if you want to *estimate* what to expect from
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# *your* CPU, then multiply 54 by 3.3 and clock frequency in GHz.
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# Intel P4 EM64T core was found to run the AMD64 code really slow...
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# The only way to achieve comparable performance on P4 is to keep
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# RC4_CHAR. Kind of ironic, huh? As it's apparently impossible to
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# compose blended code, which would perform even within 30% marginal
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# on either AMD and Intel platforms, I implement both cases. See
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# rc4_skey.c for further details... This applies to 0.9.8 and later.
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# In 0.9.7 context RC4_CHAR codepath is never engaged and ~70 bytes
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# of code remain redundant.
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$output=shift;
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open STDOUT,"| $^X ../perlasm/x86_64-xlate.pl $output";
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$dat="%rdi"; # arg1
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$len="%rsi"; # arg2
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$inp="%rdx"; # arg3
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$out="%rcx"; # arg4
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$XX="%r10";
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$TX="%r8";
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$YY="%r11";
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$TY="%r9";
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$code=<<___;
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.text
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.globl RC4
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.type RC4,\@function,4
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.align 16
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RC4: or $len,$len
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jne .Lentry
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ret
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.Lentry:
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add \$8,$dat
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movl -8($dat),$XX#d
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movl -4($dat),$YY#d
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cmpl \$-1,256($dat)
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je .LRC4_CHAR
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test \$-8,$len
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jz .Lloop1
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.align 16
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.Lloop8:
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inc $XX#b
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movl ($dat,$XX,4),$TX#d
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add $TX#b,$YY#b
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movl ($dat,$YY,4),$TY#d
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movl $TX#d,($dat,$YY,4)
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movl $TY#d,($dat,$XX,4)
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add $TX#b,$TY#b
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inc $XX#b
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movl ($dat,$XX,4),$TX#d
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movb ($dat,$TY,4),%al
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___
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for ($i=1;$i<=6;$i++) {
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$code.=<<___;
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add $TX#b,$YY#b
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ror \$8,%rax
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movl ($dat,$YY,4),$TY#d
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movl $TX#d,($dat,$YY,4)
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movl $TY#d,($dat,$XX,4)
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add $TX#b,$TY#b
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inc $XX#b
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movl ($dat,$XX,4),$TX#d
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movb ($dat,$TY,4),%al
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___
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}
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$code.=<<___;
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add $TX#b,$YY#b
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ror \$8,%rax
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movl ($dat,$YY,4),$TY#d
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movl $TX#d,($dat,$YY,4)
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movl $TY#d,($dat,$XX,4)
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sub \$8,$len
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add $TY#b,$TX#b
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movb ($dat,$TX,4),%al
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ror \$8,%rax
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add \$8,$inp
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add \$8,$out
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xor -8($inp),%rax
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mov %rax,-8($out)
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test \$-8,$len
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jnz .Lloop8
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cmp \$0,$len
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jne .Lloop1
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.Lexit:
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movl $XX#d,-8($dat)
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movl $YY#d,-4($dat)
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ret
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.align 16
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.Lloop1:
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movzb ($inp),%eax
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inc $XX#b
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movl ($dat,$XX,4),$TX#d
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add $TX#b,$YY#b
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movl ($dat,$YY,4),$TY#d
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movl $TX#d,($dat,$YY,4)
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movl $TY#d,($dat,$XX,4)
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add $TY#b,$TX#b
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movl ($dat,$TX,4),$TY#d
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xor $TY,%rax
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inc $inp
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movb %al,($out)
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inc $out
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dec $len
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jnz .Lloop1
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jmp .Lexit
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.align 16
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.LRC4_CHAR:
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add \$1,$XX#b
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movzb ($dat,$XX),$TX#d
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add $TX#b,$YY#b
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movzb ($dat,$YY),$TY#d
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movb $TX#b,($dat,$YY)
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movb $TY#b,($dat,$XX)
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add $TX#b,$TY#b
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movzb ($dat,$TY),$TY#d
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xorb ($inp),$TY#b
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movb $TY#b,($out)
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lea 1($inp),$inp
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lea 1($out),$out
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sub \$1,$len
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jnz .LRC4_CHAR
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jmp .Lexit
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.size RC4,.-RC4
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___
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$code =~ s/#([bwd])/$1/gm;
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print $code;
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close STDOUT;
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