bb98f6bef6
This is achieved by filtering perlasm output through arm-xlate.pl. But note that it's done only if "flavour" argument is not 'void'. As 'void' is default value for other ARM targets, permasm output is not actually filtered on previously validated platforms. Reviewed-by: Dr. Stephen Henson <steve@openssl.org> (cherry picked from commit 874faf2ffb22187ad5483d9691a3a2eb7112f161)
261 lines
6.6 KiB
Prolog
261 lines
6.6 KiB
Prolog
#!/usr/bin/env perl
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# ====================================================================
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# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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# sha1_block procedure for ARMv4.
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#
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# January 2007.
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# Size/performance trade-off
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# ====================================================================
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# impl size in bytes comp cycles[*] measured performance
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# ====================================================================
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# thumb 304 3212 4420
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# armv4-small 392/+29% 1958/+64% 2250/+96%
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# armv4-compact 740/+89% 1552/+26% 1840/+22%
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# armv4-large 1420/+92% 1307/+19% 1370/+34%[***]
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# full unroll ~5100/+260% ~1260/+4% ~1300/+5%
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# ====================================================================
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# thumb = same as 'small' but in Thumb instructions[**] and
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# with recurring code in two private functions;
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# small = detached Xload/update, loops are folded;
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# compact = detached Xload/update, 5x unroll;
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# large = interleaved Xload/update, 5x unroll;
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# full unroll = interleaved Xload/update, full unroll, estimated[!];
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#
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# [*] Manually counted instructions in "grand" loop body. Measured
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# performance is affected by prologue and epilogue overhead,
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# i-cache availability, branch penalties, etc.
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# [**] While each Thumb instruction is twice smaller, they are not as
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# diverse as ARM ones: e.g., there are only two arithmetic
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# instructions with 3 arguments, no [fixed] rotate, addressing
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# modes are limited. As result it takes more instructions to do
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# the same job in Thumb, therefore the code is never twice as
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# small and always slower.
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# [***] which is also ~35% better than compiler generated code. Dual-
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# issue Cortex A8 core was measured to process input block in
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# ~990 cycles.
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# August 2010.
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#
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# Rescheduling for dual-issue pipeline resulted in 13% improvement on
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# Cortex A8 core and in absolute terms ~870 cycles per input block
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# [or 13.6 cycles per byte].
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# February 2011.
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#
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# Profiler-assisted and platform-specific optimization resulted in 10%
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# improvement on Cortex A8 core and 12.2 cycles per byte.
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$flavour = shift;
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if ($flavour=~/^\w[\w\-]*\.\w+$/) { $output=$flavour; undef $flavour; }
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else { while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {} }
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if ($flavour && $flavour ne "void") {
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
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( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
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die "can't locate arm-xlate.pl";
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open STDOUT,"| \"$^X\" $xlate $flavour $output";
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} else {
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open STDOUT,">$output";
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}
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$ctx="r0";
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$inp="r1";
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$len="r2";
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$a="r3";
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$b="r4";
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$c="r5";
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$d="r6";
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$e="r7";
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$K="r8";
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$t0="r9";
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$t1="r10";
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$t2="r11";
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$t3="r12";
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$Xi="r14";
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@V=($a,$b,$c,$d,$e);
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sub Xupdate {
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my ($a,$b,$c,$d,$e,$opt1,$opt2)=@_;
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$code.=<<___;
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ldr $t0,[$Xi,#15*4]
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ldr $t1,[$Xi,#13*4]
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ldr $t2,[$Xi,#7*4]
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add $e,$K,$e,ror#2 @ E+=K_xx_xx
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ldr $t3,[$Xi,#2*4]
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eor $t0,$t0,$t1
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eor $t2,$t2,$t3 @ 1 cycle stall
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eor $t1,$c,$d @ F_xx_xx
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mov $t0,$t0,ror#31
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add $e,$e,$a,ror#27 @ E+=ROR(A,27)
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eor $t0,$t0,$t2,ror#31
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str $t0,[$Xi,#-4]!
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$opt1 @ F_xx_xx
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$opt2 @ F_xx_xx
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add $e,$e,$t0 @ E+=X[i]
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___
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}
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sub BODY_00_15 {
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my ($a,$b,$c,$d,$e)=@_;
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$code.=<<___;
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#if __ARM_ARCH__<7
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ldrb $t1,[$inp,#2]
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ldrb $t0,[$inp,#3]
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ldrb $t2,[$inp,#1]
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add $e,$K,$e,ror#2 @ E+=K_00_19
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ldrb $t3,[$inp],#4
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orr $t0,$t0,$t1,lsl#8
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eor $t1,$c,$d @ F_xx_xx
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orr $t0,$t0,$t2,lsl#16
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add $e,$e,$a,ror#27 @ E+=ROR(A,27)
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orr $t0,$t0,$t3,lsl#24
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#else
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ldr $t0,[$inp],#4 @ handles unaligned
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add $e,$K,$e,ror#2 @ E+=K_00_19
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eor $t1,$c,$d @ F_xx_xx
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add $e,$e,$a,ror#27 @ E+=ROR(A,27)
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#ifdef __ARMEL__
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rev $t0,$t0 @ byte swap
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#endif
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#endif
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and $t1,$b,$t1,ror#2
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add $e,$e,$t0 @ E+=X[i]
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eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
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str $t0,[$Xi,#-4]!
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add $e,$e,$t1 @ E+=F_00_19(B,C,D)
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___
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}
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sub BODY_16_19 {
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my ($a,$b,$c,$d,$e)=@_;
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&Xupdate(@_,"and $t1,$b,$t1,ror#2");
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$code.=<<___;
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eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D)
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add $e,$e,$t1 @ E+=F_00_19(B,C,D)
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___
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}
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sub BODY_20_39 {
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my ($a,$b,$c,$d,$e)=@_;
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&Xupdate(@_,"eor $t1,$b,$t1,ror#2");
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$code.=<<___;
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add $e,$e,$t1 @ E+=F_20_39(B,C,D)
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___
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}
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sub BODY_40_59 {
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my ($a,$b,$c,$d,$e)=@_;
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&Xupdate(@_,"and $t1,$b,$t1,ror#2","and $t2,$c,$d");
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$code.=<<___;
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add $e,$e,$t1 @ E+=F_40_59(B,C,D)
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add $e,$e,$t2,ror#2
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___
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}
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$code=<<___;
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#include "arm_arch.h"
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.text
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.global sha1_block_data_order
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.type sha1_block_data_order,%function
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.align 2
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sha1_block_data_order:
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stmdb sp!,{r4-r12,lr}
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add $len,$inp,$len,lsl#6 @ $len to point at the end of $inp
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ldmia $ctx,{$a,$b,$c,$d,$e}
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.Lloop:
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ldr $K,.LK_00_19
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mov $Xi,sp
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sub sp,sp,#15*4
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mov $c,$c,ror#30
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mov $d,$d,ror#30
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mov $e,$e,ror#30 @ [6]
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.L_00_15:
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___
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for($i=0;$i<5;$i++) {
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&BODY_00_15(@V); unshift(@V,pop(@V));
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}
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$code.=<<___;
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teq $Xi,sp
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bne .L_00_15 @ [((11+4)*5+2)*3]
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sub sp,sp,#25*4
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___
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&BODY_00_15(@V); unshift(@V,pop(@V));
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&BODY_16_19(@V); unshift(@V,pop(@V));
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&BODY_16_19(@V); unshift(@V,pop(@V));
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&BODY_16_19(@V); unshift(@V,pop(@V));
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&BODY_16_19(@V); unshift(@V,pop(@V));
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$code.=<<___;
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ldr $K,.LK_20_39 @ [+15+16*4]
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cmn sp,#0 @ [+3], clear carry to denote 20_39
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.L_20_39_or_60_79:
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___
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for($i=0;$i<5;$i++) {
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&BODY_20_39(@V); unshift(@V,pop(@V));
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}
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$code.=<<___;
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teq $Xi,sp @ preserve carry
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bne .L_20_39_or_60_79 @ [+((12+3)*5+2)*4]
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bcs .L_done @ [+((12+3)*5+2)*4], spare 300 bytes
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ldr $K,.LK_40_59
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sub sp,sp,#20*4 @ [+2]
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.L_40_59:
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___
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for($i=0;$i<5;$i++) {
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&BODY_40_59(@V); unshift(@V,pop(@V));
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}
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$code.=<<___;
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teq $Xi,sp
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bne .L_40_59 @ [+((12+5)*5+2)*4]
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ldr $K,.LK_60_79
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sub sp,sp,#20*4
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cmp sp,#0 @ set carry to denote 60_79
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b .L_20_39_or_60_79 @ [+4], spare 300 bytes
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.L_done:
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add sp,sp,#80*4 @ "deallocate" stack frame
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ldmia $ctx,{$K,$t0,$t1,$t2,$t3}
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add $a,$K,$a
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add $b,$t0,$b
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add $c,$t1,$c,ror#2
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add $d,$t2,$d,ror#2
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add $e,$t3,$e,ror#2
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stmia $ctx,{$a,$b,$c,$d,$e}
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teq $inp,$len
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bne .Lloop @ [+18], total 1307
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#if __ARM_ARCH__>=5
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ldmia sp!,{r4-r12,pc}
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#else
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ldmia sp!,{r4-r12,lr}
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tst lr,#1
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moveq pc,lr @ be binary compatible with V4, yet
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bx lr @ interoperable with Thumb ISA:-)
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#endif
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.align 2
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.LK_00_19: .word 0x5a827999
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.LK_20_39: .word 0x6ed9eba1
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.LK_40_59: .word 0x8f1bbcdc
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.LK_60_79: .word 0xca62c1d6
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.size sha1_block_data_order,.-sha1_block_data_order
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.asciz "SHA1 block transform for ARMv4, CRYPTOGAMS by <appro\@openssl.org>"
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.align 2
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___
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$code =~ s/\bbx\s+lr\b/.word\t0xe12fff1e/gm; # make it possible to compile with -march=armv4
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print $code;
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close STDOUT; # enforce flush
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