Add linux-aarch64 taget.
armcap.c is shared between 32- and 64-bit builds and features link-time detection of getauxval. Submitted by: Ard Biesheuvel.
This commit is contained in:
Andy Polyakov
parent
992bba11d5
commit
e8d93e342b
@ -137,6 +137,7 @@ my $mips64_asm=":bn-mips.o mips-mont.o::aes_cbc.o aes-mips.o:::sha1-mips.o sha25
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my $mips32_asm=$mips64_asm; $mips32_asm =~ s/\s*sha512\-mips\.o//;
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my $s390x_asm="s390xcap.o s390xcpuid.o:bn-s390x.o s390x-mont.o s390x-gf2m.o::aes-s390x.o aes-ctr.o aes-xts.o:::sha1-s390x.o sha256-s390x.o sha512-s390x.o::rc4-s390x.o:::::ghash-s390x.o:";
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my $armv4_asm="armcap.o armv4cpuid.o:bn_asm.o armv4-mont.o armv4-gf2m.o::aes_cbc.o aes-armv4.o bsaes-armv7.o:::sha1-armv4-large.o sha256-armv4.o sha512-armv4.o:::::::ghash-armv4.o::void";
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my $aarch64_asm="armcap.o arm64cpuid.o mem_clr.o::::::::::::::";
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my $parisc11_asm="pariscid.o:bn_asm.o parisc-mont.o::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o::32";
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my $parisc20_asm="pariscid.o:pa-risc2W.o parisc-mont.o::aes_core.o aes_cbc.o aes-parisc.o:::sha1-parisc.o sha256-parisc.o sha512-parisc.o::rc4-parisc.o:::::ghash-parisc.o::64";
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my $ppc64_asm="ppccpuid.o ppccap.o:bn-ppc.o ppc-mont.o ppc64-mont.o::aes_core.o aes_cbc.o aes-ppc.o vpaes-ppc.o:::sha1-ppc.o sha256-ppc.o sha512-ppc.o::::::::";
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@ -352,6 +353,7 @@ my %table=(
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# It's believed that majority of ARM toolchains predefine appropriate -march.
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# If you compiler does not, do complement config command line with one!
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"linux-armv4", "gcc:-DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR:${armv4_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
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"linux-aarch64","gcc:-DTERMIO -O3 -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR:${aarch64_asm}:linux64:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
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# Configure script adds minimally required -march for assembly support,
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# if no -march was specified at command line. mips32 and mips64 below
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# refer to contemporary MIPS Architecture specifications, MIPS32 and
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@ -1592,7 +1594,7 @@ if ($rmd160_obj =~ /\.o$/)
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}
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if ($aes_obj =~ /\.o$/)
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{
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$cflags.=" -DAES_ASM";
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$cflags.=" -DAES_ASM" if ($aes_obj =~ m/\baes\-/);;
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# aes-ctr.o is not a real file, only indication that assembler
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# module implements AES_ctr32_encrypt...
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$cflags.=" -DAES_CTR_ASM" if ($aes_obj =~ s/\s*aes\-ctr\.o//);
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35
TABLE
35
TABLE
@ -1883,7 +1883,7 @@ $multilib =
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*** debug-ben-debug-64-clang
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$cc = clang
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$cflags = -Wall -pedantic -DPEDANTIC -Wno-long-long -Wsign-compare -Wmissing-prototypes -Wshadow -Wformat -Werror -DCRYPTO_MDEBUG_ALL -DCRYPTO_MDEBUG_ABORT -DREF_CHECK -DOPENSSL_NO_DEPRECATED -Wno-error=overlength-strings -Wno-error=extended-offsetof -Qunused-arguments -DBN_DEBUG -DCONF_DEBUG -DDEBUG_SAFESTACK -DDEBUG_UNUSED -g3 -O3 -pipe
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$cflags = -Wall -pedantic -DPEDANTIC -Wno-long-long -Wsign-compare -Wmissing-prototypes -Wshadow -Wformat -Werror -DCRYPTO_MDEBUG_ALL -DCRYPTO_MDEBUG_ABORT -DREF_CHECK -DOPENSSL_NO_DEPRECATED -fsanitize=undefined -Wno-error=overlength-strings -Wno-error=extended-offsetof -Wno-error=language-extension-token -Wstrict-overflow -Qunused-arguments -DBN_DEBUG -DCONF_DEBUG -DDEBUG_SAFESTACK -DDEBUG_UNUSED -g3 -O3 -pipe
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$unistd =
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$thread_cflag = -pthread -D_THREAD_SAFE -D_REENTRANT
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$sys_id =
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@ -3960,6 +3960,39 @@ $ranlib =
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$arflags =
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$multilib = 64
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*** linux-aarch64
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$cc = gcc
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$cflags = -DTERMIO -O3 -Wall
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$unistd =
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$thread_cflag = -D_REENTRANT
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$sys_id =
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$lflags = -ldl
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$bn_ops = SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL BF_PTR
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$cpuid_obj = armcap.o arm64cpuid.o mem_clr.o
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$bn_obj =
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$des_obj =
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$aes_obj =
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$bf_obj =
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$md5_obj =
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$sha1_obj =
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$cast_obj =
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$rc4_obj =
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$rmd160_obj =
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$rc5_obj =
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$wp_obj =
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$cmll_obj =
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$modes_obj =
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$engines_obj =
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$perlasm_scheme = linux64
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$dso_scheme = dlfcn
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$shared_target= linux-shared
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$shared_cflag = -fPIC
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$shared_ldflag =
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$shared_extension = .so.$(SHLIB_MAJOR).$(SHLIB_MINOR)
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$ranlib =
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$arflags =
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$multilib =
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*** linux-alpha+bwx-ccc
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$cc = ccc
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$cflags = -fast -readonly_strings -DL_ENDIAN -DTERMIO
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2
config
2
config
@ -662,7 +662,7 @@ case "$GUESSOS" in
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armv[1-3]*-*-linux2) OUT="linux-generic32" ;;
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armv[7-9]*-*-linux2) OUT="linux-armv4"; options="$options -march=armv7-a" ;;
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arm*-*-linux2) OUT="linux-armv4" ;;
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aarch64-*-linux2) OUT="linux-generic64" ;;
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aarch64-*-linux2) OUT="linux-aarch64" ;;
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sh*b-*-linux2) OUT="linux-generic32"; options="$options -DB_ENDIAN" ;;
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sh*-*-linux2) OUT="linux-generic32"; options="$options -DL_ENDIAN" ;;
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m68k*-*-linux2) OUT="linux-generic32"; options="$options -DB_ENDIAN" ;;
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46
crypto/arm64cpuid.S
Normal file
46
crypto/arm64cpuid.S
Normal file
@ -0,0 +1,46 @@
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#include "arm_arch.h"
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.text
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.arch armv8-a+crypto
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.align 5
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.global _armv7_neon_probe
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.type _armv7_neon_probe,%function
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_armv7_neon_probe:
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orr v15.16b, v15.16b, v15.16b
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ret
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.size _armv7_neon_probe,.-_armv7_neon_probe
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.global _armv7_tick
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.type _armv7_tick,%function
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_armv7_tick:
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mrs x0, CNTVCT_EL0
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ret
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.size _armv7_tick,.-_armv7_tick
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.global _armv8_aes_probe
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.type _armv8_aes_probe,%function
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_armv8_aes_probe:
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aese v0.16b, v0.16b
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ret
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.size _armv8_aes_probe,.-_armv8_aes_probe
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.global _armv8_sha1_probe
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.type _armv8_sha1_probe,%function
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_armv8_sha1_probe:
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sha1h s0, s0
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ret
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.size _armv8_sha1_probe,.-_armv8_sha1_probe
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.global _armv8_sha256_probe
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.type _armv8_sha256_probe,%function
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_armv8_sha256_probe:
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sha256su0 v0.4s, v0.4s
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ret
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.size _armv8_sha256_probe,.-_armv8_sha256_probe
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.global _armv8_pmull_probe
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.type _armv8_pmull_probe,%function
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_armv8_pmull_probe:
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pmull v0.1q, v0.1d, v0.1d
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ret
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.size _armv8_pmull_probe,.-_armv8_pmull_probe
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@ -10,13 +10,24 @@
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# define __ARMEL__
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# endif
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# elif defined(__GNUC__)
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# if defined(__aarch64__)
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# define __ARM_ARCH__ 8
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# if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
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# define __ARMEB__
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# else
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# define __ARMEL__
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# endif
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/*
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* Why doesn't gcc define __ARM_ARCH__? Instead it defines
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* bunch of below macros. See all_architectires[] table in
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* gcc/config/arm/arm.c. On a side note it defines
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* __ARMEL__/__ARMEB__ for little-/big-endian.
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*/
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# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \
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# elif defined(__ARM_ARCH)
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# define __ARM_ARCH__ __ARM_ARCH
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# elif defined(__ARM_ARCH_8A__)
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# define __ARM_ARCH__ 8
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# elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \
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defined(__ARM_ARCH_7R__)|| defined(__ARM_ARCH_7M__) || \
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defined(__ARM_ARCH_7EM__)
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# define __ARM_ARCH__ 7
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@ -43,6 +54,7 @@
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#if !__ASSEMBLER__
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extern unsigned int OPENSSL_armcap_P;
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#endif
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#define ARMV7_NEON (1<<0)
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#define ARMV7_TICK (1<<1)
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@ -50,6 +62,5 @@ extern unsigned int OPENSSL_armcap_P;
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#define ARMV8_SHA1 (1<<3)
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#define ARMV8_SHA256 (1<<4)
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#define ARMV8_PMULL (1<<5)
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#endif
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#endif
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@ -23,9 +23,9 @@ void _armv8_aes_probe(void);
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void _armv8_sha1_probe(void);
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void _armv8_sha256_probe(void);
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void _armv8_pmull_probe(void);
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unsigned int _armv7_tick(void);
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unsigned long _armv7_tick(void);
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unsigned int OPENSSL_rdtsc(void)
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unsigned long OPENSSL_rdtsc(void)
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{
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if (OPENSSL_armcap_P & ARMV7_TICK)
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return _armv7_tick();
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@ -33,9 +33,41 @@ unsigned int OPENSSL_rdtsc(void)
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return 0;
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}
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/*
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* Use a weak reference to getauxval() so we can use it if it is available but
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* don't break the build if it is not.
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*/
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#if defined(__GNUC__) && __GNUC__>=2
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void OPENSSL_cpuid_setup(void) __attribute__((constructor));
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extern unsigned long getauxval(unsigned long type) __attribute__((weak));
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#else
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static unsigned long (*getauxval)(unsigned long) = NULL;
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#endif
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/*
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* ARM puts the the feature bits for Crypto Extensions in AT_HWCAP2, whereas
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* AArch64 used AT_HWCAP.
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*/
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#if defined(__arm__) || defined (__arm)
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# define HWCAP 16 /* AT_HWCAP */
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# define HWCAP_NEON (1 << 12)
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# define HWCAP_CE 26 /* AT_HWCAP2 */
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# define HWCAP_CE_AES (1 << 0)
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# define HWCAP_CE_PMULL (1 << 1)
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# define HWCAP_CE_SHA1 (1 << 2)
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# define HWCAP_CE_SHA256 (1 << 3)
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#elif defined(__aarch64__)
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# define HWCAP 16 /* AT_HWCAP */
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# define HWCAP_NEON (1 << 1)
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# define HWCAP_CE HWCAP
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# define HWCAP_CE_AES (1 << 3)
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# define HWCAP_CE_PMULL (1 << 4)
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# define HWCAP_CE_SHA1 (1 << 5)
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# define HWCAP_CE_SHA256 (1 << 6)
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#endif
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void OPENSSL_cpuid_setup(void)
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{
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char *e;
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@ -48,7 +80,7 @@ void OPENSSL_cpuid_setup(void)
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if ((e=getenv("OPENSSL_armcap")))
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{
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OPENSSL_armcap_P=strtoul(e,NULL,0);
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OPENSSL_armcap_P=(unsigned int)strtoul(e,NULL,0);
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return;
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}
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@ -68,11 +100,37 @@ void OPENSSL_cpuid_setup(void)
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sigprocmask(SIG_SETMASK,&ill_act.sa_mask,&oset);
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sigaction(SIGILL,&ill_act,&ill_oact);
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if (sigsetjmp(ill_jmp,1) == 0)
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if (getauxval != NULL)
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{
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if (getauxval(HWCAP) & HWCAP_NEON)
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{
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unsigned long hwcap = getauxval(HWCAP_CE);
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OPENSSL_armcap_P |= ARMV7_NEON;
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if (hwcap & HWCAP_CE_AES)
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OPENSSL_armcap_P |= ARMV8_AES;
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if (hwcap & HWCAP_CE_PMULL)
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OPENSSL_armcap_P |= ARMV8_PMULL;
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if (hwcap & HWCAP_CE_SHA1)
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OPENSSL_armcap_P |= ARMV8_SHA1;
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if (hwcap & HWCAP_CE_SHA256)
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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}
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else if (sigsetjmp(ill_jmp,1) == 0)
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{
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_armv7_neon_probe();
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OPENSSL_armcap_P |= ARMV7_NEON;
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if (sigsetjmp(ill_jmp,1) == 0)
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{
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_armv8_pmull_probe();
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OPENSSL_armcap_P |= ARMV8_PMULL|ARMV8_AES;
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}
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else if (sigsetjmp(ill_jmp,1) == 0)
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{
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_armv8_aes_probe();
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OPENSSL_armcap_P |= ARMV8_AES;
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@ -87,11 +145,6 @@ void OPENSSL_cpuid_setup(void)
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_armv8_sha256_probe();
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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if (sigsetjmp(ill_jmp,1) == 0)
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{
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_armv8_pmull_probe();
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OPENSSL_armcap_P |= ARMV8_PMULL;
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}
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}
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if (sigsetjmp(ill_jmp,1) == 0)
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{
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