MIPS assembler pack update from HEAD.
This commit is contained in:
parent
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1611
crypto/aes/asm/aes-mips.pl
Normal file
1611
crypto/aes/asm/aes-mips.pl
Normal file
File diff suppressed because it is too large
Load Diff
426
crypto/bn/asm/mips-mont.pl
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426
crypto/bn/asm/mips-mont.pl
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#!/usr/bin/env perl
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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# This module doesn't present direct interest for OpenSSL, because it
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# doesn't provide better performance for longer keys, at least not on
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# in-order-execution cores. While 512-bit RSA sign operations can be
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# 65% faster in 64-bit mode, 1024-bit ones are only 15% faster, and
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# 4096-bit ones are up to 15% slower. In 32-bit mode it varies from
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# 16% improvement for 512-bit RSA sign to -33% for 4096-bit RSA
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# verify:-( All comparisons are against bn_mul_mont-free assembler.
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# The module might be of interest to embedded system developers, as
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# the code is smaller than 1KB, yet offers >3x improvement on MIPS64
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# and 75-30% [less for longer keys] on MIPS32 over compiler-generated
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# code.
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######################################################################
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# There is a number of MIPS ABI in use, O32 and N32/64 are most
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# widely used. Then there is a new contender: NUBI. It appears that if
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# one picks the latter, it's possible to arrange code in ABI neutral
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# manner. Therefore let's stick to NUBI register layout:
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#
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($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));
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($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
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($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
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($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));
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#
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# The return value is placed in $a0. Following coding rules facilitate
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# interoperability:
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#
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# - never ever touch $tp, "thread pointer", former $gp;
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# - copy return value to $t0, former $v0 [or to $a0 if you're adapting
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# old code];
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# - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
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#
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# For reference here is register layout for N32/64 MIPS ABIs:
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#
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# ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
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# ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
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# ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));
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# ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));
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# ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));
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#
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$flavour = shift; # supported flavours are o32,n32,64,nubi32,nubi64
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if ($flavour =~ /64|n32/i) {
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$PTR_ADD="dadd"; # incidentally works even on n32
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$PTR_SUB="dsub"; # incidentally works even on n32
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$REG_S="sd";
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$REG_L="ld";
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$SZREG=8;
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} else {
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$PTR_ADD="add";
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$PTR_SUB="sub";
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$REG_S="sw";
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$REG_L="lw";
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$SZREG=4;
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}
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$SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? 0x00fff000 : 0x00ff0000;
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#
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# <appro@openssl.org>
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#
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######################################################################
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while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {}
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open STDOUT,">$output";
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if ($flavour =~ /64|n32/i) {
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$LD="ld";
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$ST="sd";
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$MULTU="dmultu";
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$ADDU="daddu";
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$SUBU="dsubu";
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$BNSZ=8;
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} else {
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$LD="lw";
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$ST="sw";
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$MULTU="multu";
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$ADDU="addu";
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$SUBU="subu";
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$BNSZ=4;
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}
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# int bn_mul_mont(
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$rp=$a0; # BN_ULONG *rp,
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$ap=$a1; # const BN_ULONG *ap,
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$bp=$a2; # const BN_ULONG *bp,
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$np=$a3; # const BN_ULONG *np,
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$n0=$a4; # const BN_ULONG *n0,
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$num=$a5; # int num);
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$lo0=$a6;
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$hi0=$a7;
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$lo1=$t1;
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$hi1=$t2;
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$aj=$s0;
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$bi=$s1;
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$nj=$s2;
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$tp=$s3;
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$alo=$s4;
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$ahi=$s5;
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$nlo=$s6;
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$nhi=$s7;
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$tj=$s8;
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$i=$s9;
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$j=$s10;
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$m1=$s11;
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$FRAMESIZE=14;
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$code=<<___;
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.text
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.set noat
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.set noreorder
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.align 5
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.globl bn_mul_mont
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.ent bn_mul_mont
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bn_mul_mont:
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___
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$code.=<<___ if ($flavour =~ /o32/i);
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lw $n0,16($sp)
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lw $num,20($sp)
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___
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$code.=<<___;
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slt $at,$num,4
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bnez $at,1f
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li $t0,0
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slt $at,$num,17 # on in-order CPU
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bnezl $at,bn_mul_mont_internal
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nop
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1: jr $ra
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li $a0,0
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.end bn_mul_mont
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.align 5
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.ent bn_mul_mont_internal
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bn_mul_mont_internal:
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.frame $fp,$FRAMESIZE*$SZREG,$ra
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.mask 0x40000000|$SAVED_REGS_MASK,-$SZREG
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$PTR_SUB $sp,$FRAMESIZE*$SZREG
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$REG_S $fp,($FRAMESIZE-1)*$SZREG($sp)
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$REG_S $s11,($FRAMESIZE-2)*$SZREG($sp)
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$REG_S $s10,($FRAMESIZE-3)*$SZREG($sp)
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$REG_S $s9,($FRAMESIZE-4)*$SZREG($sp)
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$REG_S $s8,($FRAMESIZE-5)*$SZREG($sp)
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$REG_S $s7,($FRAMESIZE-6)*$SZREG($sp)
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$REG_S $s6,($FRAMESIZE-7)*$SZREG($sp)
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$REG_S $s5,($FRAMESIZE-8)*$SZREG($sp)
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$REG_S $s4,($FRAMESIZE-9)*$SZREG($sp)
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___
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$code.=<<___ if ($flavour =~ /nubi/i);
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$REG_S $s3,($FRAMESIZE-10)*$SZREG($sp)
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$REG_S $s2,($FRAMESIZE-11)*$SZREG($sp)
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$REG_S $s1,($FRAMESIZE-12)*$SZREG($sp)
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$REG_S $s0,($FRAMESIZE-13)*$SZREG($sp)
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___
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$code.=<<___;
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move $fp,$sp
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.set reorder
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$LD $n0,0($n0)
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$LD $bi,0($bp) # bp[0]
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$LD $aj,0($ap) # ap[0]
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$LD $nj,0($np) # np[0]
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$PTR_SUB $sp,2*$BNSZ # place for two extra words
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sll $num,`log($BNSZ)/log(2)`
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li $at,-4096
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$PTR_SUB $sp,$num
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and $sp,$at
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$MULTU $aj,$bi
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$LD $alo,$BNSZ($ap)
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$LD $nlo,$BNSZ($np)
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mflo $lo0
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mfhi $hi0
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$MULTU $lo0,$n0
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mflo $m1
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$MULTU $alo,$bi
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mflo $alo
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mfhi $ahi
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$MULTU $nj,$m1
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mflo $lo1
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mfhi $hi1
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$MULTU $nlo,$m1
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$ADDU $lo1,$lo0
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sltu $at,$lo1,$lo0
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$ADDU $hi1,$at
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mflo $nlo
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mfhi $nhi
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move $tp,$sp
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li $j,2*$BNSZ
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.align 4
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.L1st:
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.set noreorder
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$PTR_ADD $aj,$ap,$j
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$PTR_ADD $nj,$np,$j
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$LD $aj,($aj)
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$LD $nj,($nj)
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$MULTU $aj,$bi
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$ADDU $lo0,$alo,$hi0
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$ADDU $lo1,$nlo,$hi1
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sltu $at,$lo0,$hi0
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sltu $t0,$lo1,$hi1
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$ADDU $hi0,$ahi,$at
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$ADDU $hi1,$nhi,$t0
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mflo $alo
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mfhi $ahi
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$ADDU $lo1,$lo0
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sltu $at,$lo1,$lo0
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$MULTU $nj,$m1
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$ADDU $hi1,$at
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addu $j,$BNSZ
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$ST $lo1,($tp)
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sltu $t0,$j,$num
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mflo $nlo
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mfhi $nhi
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bnez $t0,.L1st
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$PTR_ADD $tp,$BNSZ
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.set reorder
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$ADDU $lo0,$alo,$hi0
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sltu $at,$lo0,$hi0
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$ADDU $hi0,$ahi,$at
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$ADDU $lo1,$nlo,$hi1
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sltu $t0,$lo1,$hi1
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$ADDU $hi1,$nhi,$t0
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$ADDU $lo1,$lo0
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sltu $at,$lo1,$lo0
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$ADDU $hi1,$at
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$ST $lo1,($tp)
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$ADDU $hi1,$hi0
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sltu $at,$hi1,$hi0
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$ST $hi1,$BNSZ($tp)
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$ST $at,2*$BNSZ($tp)
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li $i,$BNSZ
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.align 4
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.Louter:
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$PTR_ADD $bi,$bp,$i
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$LD $bi,($bi)
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$LD $aj,($ap)
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$LD $alo,$BNSZ($ap)
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$LD $tj,($sp)
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$MULTU $aj,$bi
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$LD $nj,($np)
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$LD $nlo,$BNSZ($np)
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mflo $lo0
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mfhi $hi0
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$ADDU $lo0,$tj
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$MULTU $lo0,$n0
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sltu $at,$lo0,$tj
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$ADDU $hi0,$at
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mflo $m1
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$MULTU $alo,$bi
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mflo $alo
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mfhi $ahi
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$MULTU $nj,$m1
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mflo $lo1
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mfhi $hi1
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$MULTU $nlo,$m1
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$ADDU $lo1,$lo0
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sltu $at,$lo1,$lo0
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$ADDU $hi1,$at
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mflo $nlo
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mfhi $nhi
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move $tp,$sp
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li $j,2*$BNSZ
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$LD $tj,$BNSZ($tp)
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.align 4
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.Linner:
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.set noreorder
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$PTR_ADD $aj,$ap,$j
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$PTR_ADD $nj,$np,$j
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$LD $aj,($aj)
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$LD $nj,($nj)
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$MULTU $aj,$bi
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$ADDU $lo0,$alo,$hi0
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$ADDU $lo1,$nlo,$hi1
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sltu $at,$lo0,$hi0
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sltu $t0,$lo1,$hi1
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$ADDU $hi0,$ahi,$at
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$ADDU $hi1,$nhi,$t0
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mflo $alo
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mfhi $ahi
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$ADDU $lo0,$tj
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addu $j,$BNSZ
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$MULTU $nj,$m1
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sltu $at,$lo0,$tj
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$ADDU $lo1,$lo0
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$ADDU $hi0,$at
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sltu $t0,$lo1,$lo0
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$LD $tj,2*$BNSZ($tp)
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$ADDU $hi1,$t0
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sltu $at,$j,$num
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mflo $nlo
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mfhi $nhi
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$ST $lo1,($tp)
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bnez $at,.Linner
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$PTR_ADD $tp,$BNSZ
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.set reorder
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$ADDU $lo0,$alo,$hi0
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sltu $at,$lo0,$hi0
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$ADDU $hi0,$ahi,$at
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$ADDU $lo0,$tj
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sltu $t0,$lo0,$tj
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$ADDU $hi0,$t0
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$LD $tj,2*$BNSZ($tp)
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$ADDU $lo1,$nlo,$hi1
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sltu $at,$lo1,$hi1
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$ADDU $hi1,$nhi,$at
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$ADDU $lo1,$lo0
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sltu $t0,$lo1,$lo0
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$ADDU $hi1,$t0
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$ST $lo1,($tp)
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$ADDU $lo1,$hi1,$hi0
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sltu $hi1,$lo1,$hi0
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$ADDU $lo1,$tj
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sltu $at,$lo1,$tj
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$ADDU $hi1,$at
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$ST $lo1,$BNSZ($tp)
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$ST $hi1,2*$BNSZ($tp)
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addu $i,$BNSZ
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sltu $t0,$i,$num
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bnez $t0,.Louter
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.set noreorder
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$PTR_ADD $tj,$sp,$num # &tp[num]
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move $tp,$sp
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move $ap,$sp
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li $hi0,0 # clear borrow bit
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.align 4
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.Lsub: $LD $lo0,($tp)
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$LD $lo1,($np)
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$PTR_ADD $tp,$BNSZ
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$PTR_ADD $np,$BNSZ
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$SUBU $lo1,$lo0,$lo1 # tp[i]-np[i]
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sgtu $at,$lo1,$lo0
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$SUBU $lo0,$lo1,$hi0
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sgtu $hi0,$lo0,$lo1
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$ST $lo0,($rp)
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or $hi0,$at
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sltu $at,$tp,$tj
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bnez $at,.Lsub
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$PTR_ADD $rp,$BNSZ
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$SUBU $hi0,$hi1,$hi0 # handle upmost overflow bit
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move $tp,$sp
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$PTR_SUB $rp,$num # restore rp
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not $hi1,$hi0
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and $ap,$hi0,$sp
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and $bp,$hi1,$rp
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or $ap,$ap,$bp # ap=borrow?tp:rp
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.align 4
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.Lcopy: $LD $aj,($ap)
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$PTR_ADD $ap,$BNSZ
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$ST $zero,($tp)
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$PTR_ADD $tp,$BNSZ
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sltu $at,$tp,$tj
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$ST $aj,($rp)
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bnez $at,.Lcopy
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$PTR_ADD $rp,$BNSZ
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li $a0,1
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li $t0,1
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.set noreorder
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move $sp,$fp
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$REG_L $fp,($FRAMESIZE-1)*$SZREG($sp)
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$REG_L $s11,($FRAMESIZE-2)*$SZREG($sp)
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$REG_L $s10,($FRAMESIZE-3)*$SZREG($sp)
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$REG_L $s9,($FRAMESIZE-4)*$SZREG($sp)
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$REG_L $s8,($FRAMESIZE-5)*$SZREG($sp)
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$REG_L $s7,($FRAMESIZE-6)*$SZREG($sp)
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$REG_L $s6,($FRAMESIZE-7)*$SZREG($sp)
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$REG_L $s5,($FRAMESIZE-8)*$SZREG($sp)
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$REG_L $s4,($FRAMESIZE-9)*$SZREG($sp)
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___
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$code.=<<___ if ($flavour =~ /nubi/i);
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$REG_L $s3,($FRAMESIZE-10)*$SZREG($sp)
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$REG_L $s2,($FRAMESIZE-11)*$SZREG($sp)
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$REG_L $s1,($FRAMESIZE-12)*$SZREG($sp)
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$REG_L $s0,($FRAMESIZE-13)*$SZREG($sp)
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___
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$code.=<<___;
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jr $ra
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$PTR_ADD $sp,$FRAMESIZE*$SZREG
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.end bn_mul_mont_internal
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.rdata
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.asciiz "Montgomery Multiplication for MIPS, CRYPTOGAMS by <appro\@openssl.org>"
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___
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$code =~ s/\`([^\`]*)\`/eval $1/gem;
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print $code;
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close STDOUT;
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2585
crypto/bn/asm/mips.pl
Normal file
2585
crypto/bn/asm/mips.pl
Normal file
File diff suppressed because it is too large
Load Diff
354
crypto/sha/asm/sha1-mips.pl
Normal file
354
crypto/sha/asm/sha1-mips.pl
Normal file
@ -0,0 +1,354 @@
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#!/usr/bin/env perl
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# ====================================================================
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# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
|
||||
# project. The module is, however, dual licensed under OpenSSL and
|
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# CRYPTOGAMS licenses depending on where you obtain it. For further
|
||||
# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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# SHA1 block procedure for MIPS.
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|
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# Performance improvement is 30% on unaligned input. The "secret" is
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# to deploy lwl/lwr pair to load unaligned input. One could have
|
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# vectorized Xupdate on MIPSIII/IV, but the goal was to code MIPS32-
|
||||
# compatible subroutine. There is room for minor optimization on
|
||||
# little-endian platforms...
|
||||
|
||||
######################################################################
|
||||
# There is a number of MIPS ABI in use, O32 and N32/64 are most
|
||||
# widely used. Then there is a new contender: NUBI. It appears that if
|
||||
# one picks the latter, it's possible to arrange code in ABI neutral
|
||||
# manner. Therefore let's stick to NUBI register layout:
|
||||
#
|
||||
($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));
|
||||
($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
|
||||
($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
|
||||
($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));
|
||||
#
|
||||
# The return value is placed in $a0. Following coding rules facilitate
|
||||
# interoperability:
|
||||
#
|
||||
# - never ever touch $tp, "thread pointer", former $gp;
|
||||
# - copy return value to $t0, former $v0 [or to $a0 if you're adapting
|
||||
# old code];
|
||||
# - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
|
||||
#
|
||||
# For reference here is register layout for N32/64 MIPS ABIs:
|
||||
#
|
||||
# ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
|
||||
# ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
|
||||
# ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));
|
||||
# ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));
|
||||
# ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));
|
||||
#
|
||||
$flavour = shift; # supported flavours are o32,n32,64,nubi32,nubi64
|
||||
|
||||
if ($flavour =~ /64|n32/i) {
|
||||
$PTR_ADD="dadd"; # incidentally works even on n32
|
||||
$PTR_SUB="dsub"; # incidentally works even on n32
|
||||
$REG_S="sd";
|
||||
$REG_L="ld";
|
||||
$PTR_SLL="dsll"; # incidentally works even on n32
|
||||
$SZREG=8;
|
||||
} else {
|
||||
$PTR_ADD="add";
|
||||
$PTR_SUB="sub";
|
||||
$REG_S="sw";
|
||||
$REG_L="lw";
|
||||
$PTR_SLL="sll";
|
||||
$SZREG=4;
|
||||
}
|
||||
#
|
||||
# <appro@openssl.org>
|
||||
#
|
||||
######################################################################
|
||||
|
||||
$big_endian=(`echo MIPSEL | $ENV{CC} -E -P -`=~/MIPSEL/)?1:0;
|
||||
|
||||
for (@ARGV) { $output=$_ if (/^\w[\w\-]*\.\w+$/); }
|
||||
open STDOUT,">$output";
|
||||
|
||||
if (!defined($big_endian))
|
||||
{ $big_endian=(unpack('L',pack('N',1))==1); }
|
||||
|
||||
# offsets of the Most and Least Significant Bytes
|
||||
$MSB=$big_endian?0:3;
|
||||
$LSB=3&~$MSB;
|
||||
|
||||
@X=map("\$$_",(8..23)); # a4-a7,s0-s11
|
||||
|
||||
$ctx=$a0;
|
||||
$inp=$a1;
|
||||
$num=$a2;
|
||||
$A="\$1";
|
||||
$B="\$2";
|
||||
$C="\$3";
|
||||
$D="\$7";
|
||||
$E="\$24"; @V=($A,$B,$C,$D,$E);
|
||||
$t0="\$25";
|
||||
$t1=$num; # $num is offloaded to stack
|
||||
$t2="\$30"; # fp
|
||||
$K="\$31"; # ra
|
||||
|
||||
sub BODY_00_14 {
|
||||
my ($i,$a,$b,$c,$d,$e)=@_;
|
||||
my $j=$i+1;
|
||||
$code.=<<___ if (!$big_endian);
|
||||
srl $t0,@X[$i],24 # byte swap($i)
|
||||
srl $t1,@X[$i],8
|
||||
andi $t2,@X[$i],0xFF00
|
||||
sll @X[$i],@X[$i],24
|
||||
andi $t1,0xFF00
|
||||
sll $t2,$t2,8
|
||||
or @X[$i],$t0
|
||||
or $t1,$t2
|
||||
or @X[$i],$t1
|
||||
___
|
||||
$code.=<<___;
|
||||
lwl @X[$j],$j*4+$MSB($inp)
|
||||
sll $t0,$a,5 # $i
|
||||
addu $e,$K
|
||||
lwr @X[$j],$j*4+$LSB($inp)
|
||||
srl $t1,$a,27
|
||||
addu $e,$t0
|
||||
xor $t0,$c,$d
|
||||
addu $e,$t1
|
||||
sll $t2,$b,30
|
||||
and $t0,$b
|
||||
srl $b,$b,2
|
||||
xor $t0,$d
|
||||
addu $e,@X[$i]
|
||||
or $b,$t2
|
||||
addu $e,$t0
|
||||
___
|
||||
}
|
||||
|
||||
sub BODY_15_19 {
|
||||
my ($i,$a,$b,$c,$d,$e)=@_;
|
||||
my $j=$i+1;
|
||||
|
||||
$code.=<<___ if (!$big_endian && $i==15);
|
||||
srl $t0,@X[$i],24 # byte swap($i)
|
||||
srl $t1,@X[$i],8
|
||||
andi $t2,@X[$i],0xFF00
|
||||
sll @X[$i],@X[$i],24
|
||||
andi $t1,0xFF00
|
||||
sll $t2,$t2,8
|
||||
or @X[$i],$t0
|
||||
or @X[$i],$t1
|
||||
or @X[$i],$t2
|
||||
___
|
||||
$code.=<<___;
|
||||
xor @X[$j%16],@X[($j+2)%16]
|
||||
sll $t0,$a,5 # $i
|
||||
addu $e,$K
|
||||
srl $t1,$a,27
|
||||
addu $e,$t0
|
||||
xor @X[$j%16],@X[($j+8)%16]
|
||||
xor $t0,$c,$d
|
||||
addu $e,$t1
|
||||
xor @X[$j%16],@X[($j+13)%16]
|
||||
sll $t2,$b,30
|
||||
and $t0,$b
|
||||
srl $t1,@X[$j%16],31
|
||||
addu @X[$j%16],@X[$j%16]
|
||||
srl $b,$b,2
|
||||
xor $t0,$d
|
||||
or @X[$j%16],$t1
|
||||
addu $e,@X[$i%16]
|
||||
or $b,$t2
|
||||
addu $e,$t0
|
||||
___
|
||||
}
|
||||
|
||||
sub BODY_20_39 {
|
||||
my ($i,$a,$b,$c,$d,$e)=@_;
|
||||
my $j=$i+1;
|
||||
$code.=<<___ if ($i<79);
|
||||
xor @X[$j%16],@X[($j+2)%16]
|
||||
sll $t0,$a,5 # $i
|
||||
addu $e,$K
|
||||
srl $t1,$a,27
|
||||
addu $e,$t0
|
||||
xor @X[$j%16],@X[($j+8)%16]
|
||||
xor $t0,$c,$d
|
||||
addu $e,$t1
|
||||
xor @X[$j%16],@X[($j+13)%16]
|
||||
sll $t2,$b,30
|
||||
xor $t0,$b
|
||||
srl $t1,@X[$j%16],31
|
||||
addu @X[$j%16],@X[$j%16]
|
||||
srl $b,$b,2
|
||||
addu $e,@X[$i%16]
|
||||
or @X[$j%16],$t1
|
||||
or $b,$t2
|
||||
addu $e,$t0
|
||||
___
|
||||
$code.=<<___ if ($i==79);
|
||||
lw @X[0],0($ctx)
|
||||
sll $t0,$a,5 # $i
|
||||
addu $e,$K
|
||||
lw @X[1],4($ctx)
|
||||
srl $t1,$a,27
|
||||
addu $e,$t0
|
||||
lw @X[2],8($ctx)
|
||||
xor $t0,$c,$d
|
||||
addu $e,$t1
|
||||
lw @X[3],12($ctx)
|
||||
sll $t2,$b,30
|
||||
xor $t0,$b
|
||||
lw @X[4],16($ctx)
|
||||
srl $b,$b,2
|
||||
addu $e,@X[$i%16]
|
||||
or $b,$t2
|
||||
addu $e,$t0
|
||||
___
|
||||
}
|
||||
|
||||
sub BODY_40_59 {
|
||||
my ($i,$a,$b,$c,$d,$e)=@_;
|
||||
my $j=$i+1;
|
||||
$code.=<<___ if ($i<79);
|
||||
xor @X[$j%16],@X[($j+2)%16]
|
||||
sll $t0,$a,5 # $i
|
||||
addu $e,$K
|
||||
srl $t1,$a,27
|
||||
addu $e,$t0
|
||||
xor @X[$j%16],@X[($j+8)%16]
|
||||
and $t0,$c,$d
|
||||
addu $e,$t1
|
||||
xor @X[$j%16],@X[($j+13)%16]
|
||||
sll $t2,$b,30
|
||||
addu $e,$t0
|
||||
srl $t1,@X[$j%16],31
|
||||
xor $t0,$c,$d
|
||||
addu @X[$j%16],@X[$j%16]
|
||||
and $t0,$b
|
||||
srl $b,$b,2
|
||||
or @X[$j%16],$t1
|
||||
addu $e,@X[$i%16]
|
||||
or $b,$t2
|
||||
addu $e,$t0
|
||||
___
|
||||
}
|
||||
|
||||
$FRAMESIZE=16; # large enough to accomodate NUBI saved registers
|
||||
$SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? 0xc0fff008 : 0xc0ff0000;
|
||||
|
||||
$code=<<___;
|
||||
#ifdef OPENSSL_FIPSCANISTER
|
||||
# include <openssl/fipssyms.h>
|
||||
#endif
|
||||
|
||||
.text
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
.align 5
|
||||
.globl sha1_block_data_order
|
||||
.ent sha1_block_data_order
|
||||
sha1_block_data_order:
|
||||
.frame $sp,$FRAMESIZE*$SZREG,$ra
|
||||
.mask $SAVED_REGS_MASK,-$SZREG
|
||||
.set noreorder
|
||||
$PTR_SUB $sp,$FRAMESIZE*$SZREG
|
||||
$REG_S $ra,($FRAMESIZE-1)*$SZREG($sp)
|
||||
$REG_S $fp,($FRAMESIZE-2)*$SZREG($sp)
|
||||
$REG_S $s11,($FRAMESIZE-3)*$SZREG($sp)
|
||||
$REG_S $s10,($FRAMESIZE-4)*$SZREG($sp)
|
||||
$REG_S $s9,($FRAMESIZE-5)*$SZREG($sp)
|
||||
$REG_S $s8,($FRAMESIZE-6)*$SZREG($sp)
|
||||
$REG_S $s7,($FRAMESIZE-7)*$SZREG($sp)
|
||||
$REG_S $s6,($FRAMESIZE-8)*$SZREG($sp)
|
||||
$REG_S $s5,($FRAMESIZE-9)*$SZREG($sp)
|
||||
$REG_S $s4,($FRAMESIZE-10)*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___ if ($flavour =~ /nubi/i); # optimize non-nubi prologue
|
||||
$REG_S $s3,($FRAMESIZE-11)*$SZREG($sp)
|
||||
$REG_S $s2,($FRAMESIZE-12)*$SZREG($sp)
|
||||
$REG_S $s1,($FRAMESIZE-13)*$SZREG($sp)
|
||||
$REG_S $s0,($FRAMESIZE-14)*$SZREG($sp)
|
||||
$REG_S $gp,($FRAMESIZE-15)*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___;
|
||||
$PTR_SLL $num,6
|
||||
$PTR_ADD $num,$inp
|
||||
$REG_S $num,0($sp)
|
||||
lw $A,0($ctx)
|
||||
lw $B,4($ctx)
|
||||
lw $C,8($ctx)
|
||||
lw $D,12($ctx)
|
||||
b .Loop
|
||||
lw $E,16($ctx)
|
||||
.align 4
|
||||
.Loop:
|
||||
.set reorder
|
||||
lwl @X[0],$MSB($inp)
|
||||
lui $K,0x5a82
|
||||
lwr @X[0],$LSB($inp)
|
||||
ori $K,0x7999 # K_00_19
|
||||
___
|
||||
for ($i=0;$i<15;$i++) { &BODY_00_14($i,@V); unshift(@V,pop(@V)); }
|
||||
for (;$i<20;$i++) { &BODY_15_19($i,@V); unshift(@V,pop(@V)); }
|
||||
$code.=<<___;
|
||||
lui $K,0x6ed9
|
||||
ori $K,0xeba1 # K_20_39
|
||||
___
|
||||
for (;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
|
||||
$code.=<<___;
|
||||
lui $K,0x8f1b
|
||||
ori $K,0xbcdc # K_40_59
|
||||
___
|
||||
for (;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); }
|
||||
$code.=<<___;
|
||||
lui $K,0xca62
|
||||
ori $K,0xc1d6 # K_60_79
|
||||
___
|
||||
for (;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
|
||||
$code.=<<___;
|
||||
$PTR_ADD $inp,64
|
||||
$REG_L $num,0($sp)
|
||||
|
||||
addu $A,$X[0]
|
||||
addu $B,$X[1]
|
||||
sw $A,0($ctx)
|
||||
addu $C,$X[2]
|
||||
addu $D,$X[3]
|
||||
sw $B,4($ctx)
|
||||
addu $E,$X[4]
|
||||
sw $C,8($ctx)
|
||||
sw $D,12($ctx)
|
||||
sw $E,16($ctx)
|
||||
.set noreorder
|
||||
bne $inp,$num,.Loop
|
||||
nop
|
||||
|
||||
.set noreorder
|
||||
$REG_L $ra,($FRAMESIZE-1)*$SZREG($sp)
|
||||
$REG_L $fp,($FRAMESIZE-2)*$SZREG($sp)
|
||||
$REG_L $s11,($FRAMESIZE-3)*$SZREG($sp)
|
||||
$REG_L $s10,($FRAMESIZE-4)*$SZREG($sp)
|
||||
$REG_L $s9,($FRAMESIZE-5)*$SZREG($sp)
|
||||
$REG_L $s8,($FRAMESIZE-6)*$SZREG($sp)
|
||||
$REG_L $s7,($FRAMESIZE-7)*$SZREG($sp)
|
||||
$REG_L $s6,($FRAMESIZE-8)*$SZREG($sp)
|
||||
$REG_L $s5,($FRAMESIZE-9)*$SZREG($sp)
|
||||
$REG_L $s4,($FRAMESIZE-10)*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___ if ($flavour =~ /nubi/i);
|
||||
$REG_L $s3,($FRAMESIZE-11)*$SZREG($sp)
|
||||
$REG_L $s2,($FRAMESIZE-12)*$SZREG($sp)
|
||||
$REG_L $s1,($FRAMESIZE-13)*$SZREG($sp)
|
||||
$REG_L $s0,($FRAMESIZE-14)*$SZREG($sp)
|
||||
$REG_L $gp,($FRAMESIZE-15)*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___;
|
||||
jr $ra
|
||||
$PTR_ADD $sp,$FRAMESIZE*$SZREG
|
||||
.end sha1_block_data_order
|
||||
.rdata
|
||||
.asciiz "SHA1 for MIPS, CRYPTOGAMS by <appro\@openssl.org>"
|
||||
___
|
||||
print $code;
|
||||
close STDOUT;
|
455
crypto/sha/asm/sha512-mips.pl
Normal file
455
crypto/sha/asm/sha512-mips.pl
Normal file
@ -0,0 +1,455 @@
|
||||
#!/usr/bin/env perl
|
||||
|
||||
# ====================================================================
|
||||
# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
|
||||
# project. The module is, however, dual licensed under OpenSSL and
|
||||
# CRYPTOGAMS licenses depending on where you obtain it. For further
|
||||
# details see http://www.openssl.org/~appro/cryptogams/.
|
||||
# ====================================================================
|
||||
|
||||
# SHA2 block procedures for MIPS.
|
||||
|
||||
# October 2010.
|
||||
#
|
||||
# SHA256 performance improvement on MIPS R5000 CPU is ~27% over gcc-
|
||||
# generated code in o32 build and ~55% in n32/64 build. SHA512 [which
|
||||
# for now can only be compiled for MIPS64 ISA] improvement is modest
|
||||
# ~17%, but it comes for free, because it's same instruction sequence.
|
||||
# Improvement coefficients are for aligned input.
|
||||
|
||||
######################################################################
|
||||
# There is a number of MIPS ABI in use, O32 and N32/64 are most
|
||||
# widely used. Then there is a new contender: NUBI. It appears that if
|
||||
# one picks the latter, it's possible to arrange code in ABI neutral
|
||||
# manner. Therefore let's stick to NUBI register layout:
|
||||
#
|
||||
($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));
|
||||
($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
|
||||
($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
|
||||
($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));
|
||||
#
|
||||
# The return value is placed in $a0. Following coding rules facilitate
|
||||
# interoperability:
|
||||
#
|
||||
# - never ever touch $tp, "thread pointer", former $gp [o32 can be
|
||||
# excluded from the rule, because it's specified volatile];
|
||||
# - copy return value to $t0, former $v0 [or to $a0 if you're adapting
|
||||
# old code];
|
||||
# - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
|
||||
#
|
||||
# For reference here is register layout for N32/64 MIPS ABIs:
|
||||
#
|
||||
# ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
|
||||
# ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
|
||||
# ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));
|
||||
# ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));
|
||||
# ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));
|
||||
#
|
||||
$flavour = shift; # supported flavours are o32,n32,64,nubi32,nubi64
|
||||
|
||||
if ($flavour =~ /64|n32/i) {
|
||||
$PTR_ADD="dadd"; # incidentally works even on n32
|
||||
$PTR_SUB="dsub"; # incidentally works even on n32
|
||||
$REG_S="sd";
|
||||
$REG_L="ld";
|
||||
$PTR_SLL="dsll"; # incidentally works even on n32
|
||||
$SZREG=8;
|
||||
} else {
|
||||
$PTR_ADD="add";
|
||||
$PTR_SUB="sub";
|
||||
$REG_S="sw";
|
||||
$REG_L="lw";
|
||||
$PTR_SLL="sll";
|
||||
$SZREG=4;
|
||||
}
|
||||
$pf = ($flavour =~ /nubi/i) ? $t0 : $t2;
|
||||
#
|
||||
# <appro@openssl.org>
|
||||
#
|
||||
######################################################################
|
||||
|
||||
$big_endian=(`echo MIPSEL | $ENV{CC} -E -P -`=~/MIPSEL/)?1:0;
|
||||
|
||||
for (@ARGV) { $output=$_ if (/^\w[\w\-]*\.\w+$/); }
|
||||
open STDOUT,">$output";
|
||||
|
||||
if (!defined($big_endian)) { $big_endian=(unpack('L',pack('N',1))==1); }
|
||||
|
||||
if ($output =~ /512/) {
|
||||
$label="512";
|
||||
$SZ=8;
|
||||
$LD="ld"; # load from memory
|
||||
$ST="sd"; # store to memory
|
||||
$SLL="dsll"; # shift left logical
|
||||
$SRL="dsrl"; # shift right logical
|
||||
$ADDU="daddu";
|
||||
@Sigma0=(28,34,39);
|
||||
@Sigma1=(14,18,41);
|
||||
@sigma0=( 7, 1, 8); # right shift first
|
||||
@sigma1=( 6,19,61); # right shift first
|
||||
$lastK=0x817;
|
||||
$rounds=80;
|
||||
} else {
|
||||
$label="256";
|
||||
$SZ=4;
|
||||
$LD="lw"; # load from memory
|
||||
$ST="sw"; # store to memory
|
||||
$SLL="sll"; # shift left logical
|
||||
$SRL="srl"; # shift right logical
|
||||
$ADDU="addu";
|
||||
@Sigma0=( 2,13,22);
|
||||
@Sigma1=( 6,11,25);
|
||||
@sigma0=( 3, 7,18); # right shift first
|
||||
@sigma1=(10,17,19); # right shift first
|
||||
$lastK=0x8f2;
|
||||
$rounds=64;
|
||||
}
|
||||
|
||||
$MSB = $big_endian ? 0 : ($SZ-1);
|
||||
$LSB = ($SZ-1)&~$MSB;
|
||||
|
||||
@V=($A,$B,$C,$D,$E,$F,$G,$H)=map("\$$_",(1,2,3,7,24,25,30,31));
|
||||
@X=map("\$$_",(8..23));
|
||||
|
||||
$ctx=$a0;
|
||||
$inp=$a1;
|
||||
$len=$a2; $Ktbl=$len;
|
||||
|
||||
sub BODY_00_15 {
|
||||
my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;
|
||||
my ($T1,$tmp0,$tmp1,$tmp2)=(@X[4],@X[5],@X[6],@X[7]);
|
||||
|
||||
$code.=<<___ if ($i<15);
|
||||
${LD}l @X[1],`($i+1)*$SZ+$MSB`($inp)
|
||||
${LD}r @X[1],`($i+1)*$SZ+$LSB`($inp)
|
||||
___
|
||||
$code.=<<___ if (!$big_endian && $i<16 && $SZ==4);
|
||||
srl $tmp0,@X[0],24 # byte swap($i)
|
||||
srl $tmp1,@X[0],8
|
||||
andi $tmp2,@X[0],0xFF00
|
||||
sll @X[0],@X[0],24
|
||||
andi $tmp1,0xFF00
|
||||
sll $tmp2,$tmp2,8
|
||||
or @X[0],$tmp0
|
||||
or $tmp1,$tmp2
|
||||
or @X[0],$tmp1
|
||||
___
|
||||
$code.=<<___ if (!$big_endian && $i<16 && $SZ==8);
|
||||
ori $tmp0,$zero,0xFF
|
||||
dsll $tmp2,$tmp0,32
|
||||
or $tmp0,$tmp2 # 0x000000FF000000FF
|
||||
and $tmp1,@X[0],$tmp0 # byte swap($i)
|
||||
dsrl $tmp2,@X[0],24
|
||||
dsll $tmp1,24
|
||||
and $tmp2,$tmp0
|
||||
dsll $tmp0,8 # 0x0000FF000000FF00
|
||||
or $tmp1,$tmp2
|
||||
and $tmp2,@X[0],$tmp0
|
||||
dsrl @X[0],8
|
||||
dsll $tmp2,8
|
||||
and @X[0],$tmp0
|
||||
or $tmp1,$tmp2
|
||||
or @X[0],$tmp1
|
||||
dsrl $tmp1,@X[0],32
|
||||
dsll @X[0],32
|
||||
or @X[0],$tmp1
|
||||
___
|
||||
$code.=<<___;
|
||||
$ADDU $T1,$X[0],$h # $i
|
||||
$SRL $h,$e,@Sigma1[0]
|
||||
xor $tmp2,$f,$g
|
||||
$SLL $tmp1,$e,`$SZ*8-@Sigma1[2]`
|
||||
and $tmp2,$e
|
||||
$SRL $tmp0,$e,@Sigma1[1]
|
||||
xor $h,$tmp1
|
||||
$SLL $tmp1,$e,`$SZ*8-@Sigma1[1]`
|
||||
xor $h,$tmp0
|
||||
$SRL $tmp0,$e,@Sigma1[2]
|
||||
xor $h,$tmp1
|
||||
$SLL $tmp1,$e,`$SZ*8-@Sigma1[0]`
|
||||
xor $h,$tmp0
|
||||
xor $tmp2,$g # Ch(e,f,g)
|
||||
xor $tmp0,$tmp1,$h # Sigma1(e)
|
||||
|
||||
$SRL $h,$a,@Sigma0[0]
|
||||
$ADDU $T1,$tmp2
|
||||
$LD $tmp2,`$i*$SZ`($Ktbl) # K[$i]
|
||||
$SLL $tmp1,$a,`$SZ*8-@Sigma0[2]`
|
||||
$ADDU $T1,$tmp0
|
||||
$SRL $tmp0,$a,@Sigma0[1]
|
||||
xor $h,$tmp1
|
||||
$SLL $tmp1,$a,`$SZ*8-@Sigma0[1]`
|
||||
xor $h,$tmp0
|
||||
$SRL $tmp0,$a,@Sigma0[2]
|
||||
xor $h,$tmp1
|
||||
$SLL $tmp1,$a,`$SZ*8-@Sigma0[0]`
|
||||
xor $h,$tmp0
|
||||
$ST @X[0],`($i%16)*$SZ`($sp) # offload to ring buffer
|
||||
xor $h,$tmp1 # Sigma0(a)
|
||||
|
||||
or $tmp0,$a,$b
|
||||
and $tmp1,$a,$b
|
||||
and $tmp0,$c
|
||||
or $tmp1,$tmp0 # Maj(a,b,c)
|
||||
$ADDU $T1,$tmp2 # +=K[$i]
|
||||
$ADDU $h,$tmp1
|
||||
|
||||
$ADDU $d,$T1
|
||||
$ADDU $h,$T1
|
||||
___
|
||||
$code.=<<___ if ($i>=13);
|
||||
$LD @X[3],`(($i+3)%16)*$SZ`($sp) # prefetch from ring buffer
|
||||
___
|
||||
}
|
||||
|
||||
sub BODY_16_XX {
|
||||
my $i=@_[0];
|
||||
my ($tmp0,$tmp1,$tmp2,$tmp3)=(@X[4],@X[5],@X[6],@X[7]);
|
||||
|
||||
$code.=<<___;
|
||||
$SRL $tmp2,@X[1],@sigma0[0] # Xupdate($i)
|
||||
$ADDU @X[0],@X[9] # +=X[i+9]
|
||||
$SLL $tmp1,@X[1],`$SZ*8-@sigma0[2]`
|
||||
$SRL $tmp0,@X[1],@sigma0[1]
|
||||
xor $tmp2,$tmp1
|
||||
$SLL $tmp1,`@sigma0[2]-@sigma0[1]`
|
||||
xor $tmp2,$tmp0
|
||||
$SRL $tmp0,@X[1],@sigma0[2]
|
||||
xor $tmp2,$tmp1
|
||||
|
||||
$SRL $tmp3,@X[14],@sigma1[0]
|
||||
xor $tmp2,$tmp0 # sigma0(X[i+1])
|
||||
$SLL $tmp1,@X[14],`$SZ*8-@sigma1[2]`
|
||||
$ADDU @X[0],$tmp2
|
||||
$SRL $tmp0,@X[14],@sigma1[1]
|
||||
xor $tmp3,$tmp1
|
||||
$SLL $tmp1,`@sigma1[2]-@sigma1[1]`
|
||||
xor $tmp3,$tmp0
|
||||
$SRL $tmp0,@X[14],@sigma1[2]
|
||||
xor $tmp3,$tmp1
|
||||
|
||||
xor $tmp3,$tmp0 # sigma1(X[i+14])
|
||||
$ADDU @X[0],$tmp3
|
||||
___
|
||||
&BODY_00_15(@_);
|
||||
}
|
||||
|
||||
$FRAMESIZE=16*$SZ+16*$SZREG;
|
||||
$SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? 0xc0fff008 : 0xc0ff0000;
|
||||
|
||||
$code.=<<___;
|
||||
#ifdef OPENSSL_FIPSCANISTER
|
||||
# include <openssl/fipssyms.h>
|
||||
#endif
|
||||
|
||||
.text
|
||||
.set noat
|
||||
#if !defined(__vxworks) || defined(__pic__)
|
||||
.option pic2
|
||||
#endif
|
||||
|
||||
.align 5
|
||||
.globl sha${label}_block_data_order
|
||||
.ent sha${label}_block_data_order
|
||||
sha${label}_block_data_order:
|
||||
.frame $sp,$FRAMESIZE,$ra
|
||||
.mask $SAVED_REGS_MASK,-$SZREG
|
||||
.set noreorder
|
||||
___
|
||||
$code.=<<___ if ($flavour =~ /o32/i); # o32 PIC-ification
|
||||
.cpload $pf
|
||||
___
|
||||
$code.=<<___;
|
||||
$PTR_SUB $sp,$FRAMESIZE
|
||||
$REG_S $ra,$FRAMESIZE-1*$SZREG($sp)
|
||||
$REG_S $fp,$FRAMESIZE-2*$SZREG($sp)
|
||||
$REG_S $s11,$FRAMESIZE-3*$SZREG($sp)
|
||||
$REG_S $s10,$FRAMESIZE-4*$SZREG($sp)
|
||||
$REG_S $s9,$FRAMESIZE-5*$SZREG($sp)
|
||||
$REG_S $s8,$FRAMESIZE-6*$SZREG($sp)
|
||||
$REG_S $s7,$FRAMESIZE-7*$SZREG($sp)
|
||||
$REG_S $s6,$FRAMESIZE-8*$SZREG($sp)
|
||||
$REG_S $s5,$FRAMESIZE-9*$SZREG($sp)
|
||||
$REG_S $s4,$FRAMESIZE-10*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___ if ($flavour =~ /nubi/i); # optimize non-nubi prologue
|
||||
$REG_S $s3,$FRAMESIZE-11*$SZREG($sp)
|
||||
$REG_S $s2,$FRAMESIZE-12*$SZREG($sp)
|
||||
$REG_S $s1,$FRAMESIZE-13*$SZREG($sp)
|
||||
$REG_S $s0,$FRAMESIZE-14*$SZREG($sp)
|
||||
$REG_S $gp,$FRAMESIZE-15*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___;
|
||||
$PTR_SLL @X[15],$len,`log(16*$SZ)/log(2)`
|
||||
___
|
||||
$code.=<<___ if ($flavour !~ /o32/i); # non-o32 PIC-ification
|
||||
.cplocal $Ktbl
|
||||
.cpsetup $pf,$zero,sha${label}_block_data_order
|
||||
___
|
||||
$code.=<<___;
|
||||
.set reorder
|
||||
la $Ktbl,K${label} # PIC-ified 'load address'
|
||||
|
||||
$LD $A,0*$SZ($ctx) # load context
|
||||
$LD $B,1*$SZ($ctx)
|
||||
$LD $C,2*$SZ($ctx)
|
||||
$LD $D,3*$SZ($ctx)
|
||||
$LD $E,4*$SZ($ctx)
|
||||
$LD $F,5*$SZ($ctx)
|
||||
$LD $G,6*$SZ($ctx)
|
||||
$LD $H,7*$SZ($ctx)
|
||||
|
||||
$PTR_ADD @X[15],$inp # pointer to the end of input
|
||||
$REG_S @X[15],16*$SZ($sp)
|
||||
b .Loop
|
||||
|
||||
.align 5
|
||||
.Loop:
|
||||
${LD}l @X[0],$MSB($inp)
|
||||
${LD}r @X[0],$LSB($inp)
|
||||
___
|
||||
for ($i=0;$i<16;$i++)
|
||||
{ &BODY_00_15($i,@V); unshift(@V,pop(@V)); push(@X,shift(@X)); }
|
||||
$code.=<<___;
|
||||
b .L16_xx
|
||||
.align 4
|
||||
.L16_xx:
|
||||
___
|
||||
for (;$i<32;$i++)
|
||||
{ &BODY_16_XX($i,@V); unshift(@V,pop(@V)); push(@X,shift(@X)); }
|
||||
$code.=<<___;
|
||||
and @X[6],0xfff
|
||||
li @X[7],$lastK
|
||||
.set noreorder
|
||||
bne @X[6],@X[7],.L16_xx
|
||||
$PTR_ADD $Ktbl,16*$SZ # Ktbl+=16
|
||||
|
||||
$REG_L @X[15],16*$SZ($sp) # restore pointer to the end of input
|
||||
$LD @X[0],0*$SZ($ctx)
|
||||
$LD @X[1],1*$SZ($ctx)
|
||||
$LD @X[2],2*$SZ($ctx)
|
||||
$PTR_ADD $inp,16*$SZ
|
||||
$LD @X[3],3*$SZ($ctx)
|
||||
$ADDU $A,@X[0]
|
||||
$LD @X[4],4*$SZ($ctx)
|
||||
$ADDU $B,@X[1]
|
||||
$LD @X[5],5*$SZ($ctx)
|
||||
$ADDU $C,@X[2]
|
||||
$LD @X[6],6*$SZ($ctx)
|
||||
$ADDU $D,@X[3]
|
||||
$LD @X[7],7*$SZ($ctx)
|
||||
$ADDU $E,@X[4]
|
||||
$ST $A,0*$SZ($ctx)
|
||||
$ADDU $F,@X[5]
|
||||
$ST $B,1*$SZ($ctx)
|
||||
$ADDU $G,@X[6]
|
||||
$ST $C,2*$SZ($ctx)
|
||||
$ADDU $H,@X[7]
|
||||
$ST $D,3*$SZ($ctx)
|
||||
$ST $E,4*$SZ($ctx)
|
||||
$ST $F,5*$SZ($ctx)
|
||||
$ST $G,6*$SZ($ctx)
|
||||
$ST $H,7*$SZ($ctx)
|
||||
|
||||
bnel $inp,@X[15],.Loop
|
||||
$PTR_SUB $Ktbl,`($rounds-16)*$SZ` # rewind $Ktbl
|
||||
|
||||
$REG_L $ra,$FRAMESIZE-1*$SZREG($sp)
|
||||
$REG_L $fp,$FRAMESIZE-2*$SZREG($sp)
|
||||
$REG_L $s11,$FRAMESIZE-3*$SZREG($sp)
|
||||
$REG_L $s10,$FRAMESIZE-4*$SZREG($sp)
|
||||
$REG_L $s9,$FRAMESIZE-5*$SZREG($sp)
|
||||
$REG_L $s8,$FRAMESIZE-6*$SZREG($sp)
|
||||
$REG_L $s7,$FRAMESIZE-7*$SZREG($sp)
|
||||
$REG_L $s6,$FRAMESIZE-8*$SZREG($sp)
|
||||
$REG_L $s5,$FRAMESIZE-9*$SZREG($sp)
|
||||
$REG_L $s4,$FRAMESIZE-10*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___ if ($flavour =~ /nubi/i);
|
||||
$REG_L $s3,$FRAMESIZE-11*$SZREG($sp)
|
||||
$REG_L $s2,$FRAMESIZE-12*$SZREG($sp)
|
||||
$REG_L $s1,$FRAMESIZE-13*$SZREG($sp)
|
||||
$REG_L $s0,$FRAMESIZE-14*$SZREG($sp)
|
||||
$REG_L $gp,$FRAMESIZE-15*$SZREG($sp)
|
||||
___
|
||||
$code.=<<___;
|
||||
jr $ra
|
||||
$PTR_ADD $sp,$FRAMESIZE
|
||||
.end sha${label}_block_data_order
|
||||
|
||||
.rdata
|
||||
.align 5
|
||||
K${label}:
|
||||
___
|
||||
if ($SZ==4) {
|
||||
$code.=<<___;
|
||||
.word 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5
|
||||
.word 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5
|
||||
.word 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3
|
||||
.word 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174
|
||||
.word 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc
|
||||
.word 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da
|
||||
.word 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7
|
||||
.word 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967
|
||||
.word 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13
|
||||
.word 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85
|
||||
.word 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3
|
||||
.word 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070
|
||||
.word 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5
|
||||
.word 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3
|
||||
.word 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208
|
||||
.word 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
|
||||
___
|
||||
} else {
|
||||
$code.=<<___;
|
||||
.dword 0x428a2f98d728ae22, 0x7137449123ef65cd
|
||||
.dword 0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc
|
||||
.dword 0x3956c25bf348b538, 0x59f111f1b605d019
|
||||
.dword 0x923f82a4af194f9b, 0xab1c5ed5da6d8118
|
||||
.dword 0xd807aa98a3030242, 0x12835b0145706fbe
|
||||
.dword 0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2
|
||||
.dword 0x72be5d74f27b896f, 0x80deb1fe3b1696b1
|
||||
.dword 0x9bdc06a725c71235, 0xc19bf174cf692694
|
||||
.dword 0xe49b69c19ef14ad2, 0xefbe4786384f25e3
|
||||
.dword 0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65
|
||||
.dword 0x2de92c6f592b0275, 0x4a7484aa6ea6e483
|
||||
.dword 0x5cb0a9dcbd41fbd4, 0x76f988da831153b5
|
||||
.dword 0x983e5152ee66dfab, 0xa831c66d2db43210
|
||||
.dword 0xb00327c898fb213f, 0xbf597fc7beef0ee4
|
||||
.dword 0xc6e00bf33da88fc2, 0xd5a79147930aa725
|
||||
.dword 0x06ca6351e003826f, 0x142929670a0e6e70
|
||||
.dword 0x27b70a8546d22ffc, 0x2e1b21385c26c926
|
||||
.dword 0x4d2c6dfc5ac42aed, 0x53380d139d95b3df
|
||||
.dword 0x650a73548baf63de, 0x766a0abb3c77b2a8
|
||||
.dword 0x81c2c92e47edaee6, 0x92722c851482353b
|
||||
.dword 0xa2bfe8a14cf10364, 0xa81a664bbc423001
|
||||
.dword 0xc24b8b70d0f89791, 0xc76c51a30654be30
|
||||
.dword 0xd192e819d6ef5218, 0xd69906245565a910
|
||||
.dword 0xf40e35855771202a, 0x106aa07032bbd1b8
|
||||
.dword 0x19a4c116b8d2d0c8, 0x1e376c085141ab53
|
||||
.dword 0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8
|
||||
.dword 0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb
|
||||
.dword 0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3
|
||||
.dword 0x748f82ee5defb2fc, 0x78a5636f43172f60
|
||||
.dword 0x84c87814a1f0ab72, 0x8cc702081a6439ec
|
||||
.dword 0x90befffa23631e28, 0xa4506cebde82bde9
|
||||
.dword 0xbef9a3f7b2c67915, 0xc67178f2e372532b
|
||||
.dword 0xca273eceea26619c, 0xd186b8c721c0c207
|
||||
.dword 0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178
|
||||
.dword 0x06f067aa72176fba, 0x0a637dc5a2c898a6
|
||||
.dword 0x113f9804bef90dae, 0x1b710b35131c471b
|
||||
.dword 0x28db77f523047d84, 0x32caab7b40c72493
|
||||
.dword 0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c
|
||||
.dword 0x4cc5d4becb3e42b6, 0x597f299cfc657e2a
|
||||
.dword 0x5fcb6fab3ad6faec, 0x6c44198c4a475817
|
||||
___
|
||||
}
|
||||
$code.=<<___;
|
||||
.asciiz "SHA${label} for MIPS, CRYPTOGAMS by <appro\@openssl.org>"
|
||||
.align 5
|
||||
|
||||
___
|
||||
|
||||
$code =~ s/\`([^\`]*)\`/eval $1/gem;
|
||||
print $code;
|
||||
close STDOUT;
|
Loading…
Reference in New Issue
Block a user