bn/asm/x86[_64]-mont*.pl: complement alloca with page-walking.
Some OSes, *cough*-dows, insist on stack being "wired" to physical memory in strictly sequential manner, i.e. if stack allocation spans two pages, then reference to farmost one can be punishable by SEGV. But page walking can do good even on other OSes, because it guarantees that villain thread hits the guard page before it can make damage to innocent one... Reviewed-by: Rich Salz <rsalz@openssl.org> (cherry picked from commit adc4f1fc25b2cac90076f1e1695b05b7aeeae501) Resolved conflicts: crypto/bn/asm/x86_64-mont.pl crypto/bn/asm/x86_64-mont5.pl Reviewed-by: Richard Levitte <levitte@openssl.org>
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@ -85,6 +85,21 @@ $frame=32; # size of above frame rounded up to 16n
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&and ("esp",-64); # align to cache line
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# Some OSes, *cough*-dows, insist on stack being "wired" to
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# physical memory in strictly sequential manner, i.e. if stack
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# allocation spans two pages, then reference to farmost one can
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# be punishable by SEGV. But page walking can do good even on
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# other OSes, because it guarantees that villain thread hits
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# the guard page before it can make damage to innocent one...
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&mov ("eax","ebp");
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&sub ("eax","esp");
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&and ("eax",-4096);
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&set_label("page_walk");
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&mov ("edx",&DWP(0,"esp","eax"));
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&sub ("eax",4096);
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&data_byte(0x2e);
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&jnc (&label("page_walk"));
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################################# load argument block...
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&mov ("eax",&DWP(0*4,"esi"));# BN_ULONG *rp
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&mov ("ebx",&DWP(1*4,"esi"));# const BN_ULONG *ap
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@ -91,6 +91,20 @@ bn_mul_mont:
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mov %r11,8(%rsp,$num,8) # tp[num+1]=%rsp
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.Lmul_body:
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# Some OSes, *cough*-dows, insist on stack being "wired" to
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# physical memory in strictly sequential manner, i.e. if stack
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# allocation spans two pages, then reference to farmost one can
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# be punishable by SEGV. But page walking can do good even on
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# other OSes, because it guarantees that villain thread hits
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# the guard page before it can make damage to innocent one...
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sub %rsp,%r11
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and \$-4096,%r11
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.Lmul_page_walk:
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mov (%rsp,%r11),%r10
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sub \$4096,%r11
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.byte 0x66,0x2e # predict non-taken
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jnc .Lmul_page_walk
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mov $bp,%r12 # reassign $bp
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___
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$bp="%r12";
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@ -296,6 +310,14 @@ bn_mul4x_mont:
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mov %r11,8(%rsp,$num,8) # tp[num+1]=%rsp
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.Lmul4x_body:
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sub %rsp,%r11
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and \$-4096,%r11
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.Lmul4x_page_walk:
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mov (%rsp,%r11),%r10
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sub \$4096,%r11
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.byte 0x2e # predict non-taken
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jnc .Lmul4x_page_walk
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mov $rp,16(%rsp,$num,8) # tp[num+2]=$rp
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mov %rdx,%r12 # reassign $bp
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___
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@ -707,6 +729,7 @@ $code.=<<___;
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.align 16
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bn_sqr4x_mont:
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.Lsqr4x_enter:
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mov %rsp,%rax
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push %rbx
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push %rbp
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push %r12
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@ -715,12 +738,23 @@ bn_sqr4x_mont:
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push %r15
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shl \$3,${num}d # convert $num to bytes
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xor %r10,%r10
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mov %rsp,%r11 # put aside %rsp
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sub $num,%r10 # -$num
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neg $num # -$num
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mov ($n0),$n0 # *n0
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lea -72(%rsp,%r10,2),%rsp # alloca(frame+2*$num)
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lea -72(%rsp,$num,2),%rsp # alloca(frame+2*$num)
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and \$-1024,%rsp # minimize TLB usage
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sub %rsp,%r11
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and \$-4096,%r11
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.Lsqr4x_page_walk:
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mov (%rsp,%r11),%r10
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sub \$4096,%r11
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.byte 0x2e # predict non-taken
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jnc .Lsqr4x_page_walk
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mov $num,%r10
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neg $num # restore $num
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lea -48(%rax),%r11 # restore saved %rsp
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##############################################################
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# Stack layout
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#
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@ -84,6 +84,20 @@ bn_mul_mont_gather5:
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mov %rax,8(%rsp,$num,8) # tp[num+1]=%rsp
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.Lmul_body:
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# Some OSes, *cough*-dows, insist on stack being "wired" to
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# physical memory in strictly sequential manner, i.e. if stack
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# allocation spans two pages, then reference to farmost one can
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# be punishable by SEGV. But page walking can do good even on
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# other OSes, because it guarantees that villain thread hits
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# the guard page before it can make damage to innocent one...
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sub %rsp,%rax
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and \$-4096,%rax
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.Lmul_page_walk:
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mov (%rsp,%rax),%r11
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sub \$4096,%rax
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.byte 0x2e # predict non-taken
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jnc .Lmul_page_walk
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lea 128($bp),%r12 # reassign $bp (+size optimization)
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___
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$bp="%r12";
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@ -407,6 +421,14 @@ bn_mul4x_mont_gather5:
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mov %rax,8(%rsp,$num,8) # tp[num+1]=%rsp
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.Lmul4x_body:
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sub %rsp,%rax
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and \$-4096,%rax
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.Lmul4x_page_walk:
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mov (%rsp,%rax),%r11
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sub \$4096,%rax
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.byte 0x2e # predict non-taken
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jnc .Lmul4x_page_walk
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mov $rp,16(%rsp,$num,8) # tp[num+2]=$rp
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lea 128(%rdx),%r12 # reassign $bp (+size optimization)
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___
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