Make pshufw optional and update performance table in sha512-sse2.pl

[as per http://cvs.openssl.org/chngview?cn=14551].
This commit is contained in:
Andy Polyakov 2005-11-03 15:23:11 +00:00
parent 29afd31dd1
commit 7a6f825f0f
2 changed files with 4 additions and 4 deletions

View File

@ -227,9 +227,9 @@ sub main'pxor { &out2("pxor",@_); }
sub main'por { &out2("por",@_); } sub main'por { &out2("por",@_); }
sub main'pand { &out2("pand",@_); } sub main'pand { &out2("pand",@_); }
sub main'movq { sub main'movq {
local($p1,$p2)=@_; local($p1,$p2,$optimize)=@_;
if ($p1=~/^mm[0-7]$/ && $p2=~/^mm[0-7]$/) if ($optimize && $p1=~/^mm[0-7]$/ && $p2=~/^mm[0-7]$/)
# movq between mmx registers sinks Intel CPUs # movq between mmx registers can sink Intel CPUs
{ push(@out,"\tpshufw\t\$0xe4,%$p2,%$p1\n"); } { push(@out,"\tpshufw\t\$0xe4,%$p2,%$p1\n"); }
else { &out2("movq",@_); } else { &out2("movq",@_); }
} }

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@ -22,7 +22,7 @@
# #
# 2.4GHz P4 1.4GHz AMD32 1.4GHz AMD64(*) # 2.4GHz P4 1.4GHz AMD32 1.4GHz AMD64(*)
# SHA256/gcc(*) 54 43 59 # SHA256/gcc(*) 54 43 59
# SHA512/gcc 17 23 92 # SHA512/gcc 21 24 92
# SHA512/sse2 61(**) 57(**) # SHA512/sse2 61(**) 57(**)
# SHA512/icc 26 28 # SHA512/icc 26 28
# SHA256/icc(*) 65 54 # SHA256/icc(*) 65 54