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x86_64cpuid.pl: refine shared cache detection logic.

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This commit is contained in:
Andy Polyakov
2009-05-12 21:01:13 +00:00
parent 6dd9066e0e
commit 5cd91b5055
1 changed files with 27 additions and 2 deletions
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29
crypto/x86_64cpuid.pl
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@@ -59,8 +59,33 @@ OPENSSL_ia32_cpuid:
or %eax,%r9d or %eax,%r9d
cmp \$0x6c65746e,%ecx # "ntel" cmp \$0x6c65746e,%ecx # "ntel"
setne %al setne %al
or %eax,%r9d or %eax,%r9d # 0 indicates Intel CPU
mov \$1,%r10d # "number of [AMD] cores"
jz .Lintel
cmp \$0x68747541,%ebx # "Auth"
setne %al
mov %eax,%r10d
cmp \$0x69746E65,%edx # "enti"
setne %al
or %eax,%r10d
cmp \$0x444D4163,%ecx # "cAMD"
setne %al
or %eax,%r10d # 0 indicates AMD CPU
jnz .Lintel
mov \$0x80000000,%eax
cpuid
cmp \$0x80000008,%eax
mov \$1,%r10d # "number of [AMD] cores"
jb .Lintel
mov \$0x80000008,%eax
cpuid
movzb %cl,%r10 # number of cores - 1
inc %r10 # number of cores
.Lintel:
mov \$1,%eax mov \$1,%eax
cpuid cpuid
cmp \$0,%r9d cmp \$0,%r9d
@@ -74,7 +99,7 @@ OPENSSL_ia32_cpuid:
bt \$28,%edx # test hyper-threading bit bt \$28,%edx # test hyper-threading bit
jnc .Ldone jnc .Ldone
shr \$16,%ebx shr \$16,%ebx
cmp \$1,%bl # see if cache is shared cmp %r10b,%bl # see if cache is shared
ja .Ldone ja .Ldone
and \$0xefffffff,%edx # ~(1<<28) and \$0xefffffff,%edx # ~(1<<28)
.Ldone: .Ldone: