crypto/bn/rsaz*: fix licensing note.
rsaz_exp.c: harmonize line terminating; asm/rsaz-*.pl: minor optimizations.
This commit is contained in:
Andy Polyakov
parent
6efef384c6
commit
31ed9a2131
@ -1,54 +1,66 @@
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#!/usr/bin/env perl
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#!/usr/bin/env perl
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#******************************************************************************
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##############################################################################
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#* Copyright(c) 2012, Intel Corp.
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# #
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#* Developers and authors:
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# Copyright (c) 2012, Intel Corporation #
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#* Shay Gueron (1, 2), and Vlad Krasnov (1)
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# #
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#* (1) Intel Corporation, Israel Development Center, Haifa, Israel
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# All rights reserved. #
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#* (2) University of Haifa, Israel
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# #
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#******************************************************************************
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# Redistribution and use in source and binary forms, with or without #
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#* LICENSE:
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# modification, are permitted provided that the following conditions are #
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#* This submission to OpenSSL is to be made available under the OpenSSL
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# met: #
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#* license, and only to the OpenSSL project, in order to allow integration
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# #
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#* into the publicly distributed code.
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# * Redistributions of source code must retain the above copyright #
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#* The use of this code, or portions of this code, or concepts embedded in
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# notice, this list of conditions and the following disclaimer. #
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#* this code, or modification of this code and/or algorithm(s) in it, or the
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# #
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#* use of this code for any other purpose than stated above, requires special
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# * Redistributions in binary form must reproduce the above copyright #
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#* licensing.
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# notice, this list of conditions and the following disclaimer in the #
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#******************************************************************************
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# documentation and/or other materials provided with the #
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#* DISCLAIMER:
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# distribution. #
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#* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS AND THE COPYRIGHT OWNERS
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# #
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#* ``AS IS''. ANY EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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# * Neither the name of the Intel Corporation nor the names of its #
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#* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# contributors may be used to endorse or promote products derived from #
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#* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE CONTRIBUTORS OR THE COPYRIGHT
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# this software without specific prior written permission. #
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#* OWNERS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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# #
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#* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# #
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#* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY #
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#* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE #
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#* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR #
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#* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR #
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#* POSSIBILITY OF SUCH DAMAGE.
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# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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#******************************************************************************
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, #
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#* Reference:
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR #
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#* [1] S. Gueron, V. Krasnov: "Software Implementation of Modular
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# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF #
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#* Exponentiation, Using Advanced Vector Instructions Architectures",
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# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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#* F. Ozbudak and F. Rodriguez-Henriquez (Eds.): WAIFI 2012, LNCS 7369,
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# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS #
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#* pp. 119?135, 2012. Springer-Verlag Berlin Heidelberg 2012
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #
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#* [2] S. Gueron: "Efficient Software Implementations of Modular
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# #
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#* Exponentiation", Journal of Cryptographic Engineering 2:31-43 (2012).
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##############################################################################
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#* [3] S. Gueron, V. Krasnov: "Speeding up Big-numbers Squaring",IEEE
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# Developers and authors: #
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#* Proceedings of 9th International Conference on Information Technology:
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# Shay Gueron (1, 2), and Vlad Krasnov (1) #
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#* New Generations (ITNG 2012), pp.821-823 (2012)
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# (1) Intel Corporation, Israel Development Center, Haifa, Israel #
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#* [4] S. Gueron, V. Krasnov: "[PATCH] Efficient and side channel analysis
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# (2) University of Haifa, Israel #
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#* resistant 1024-bit modular exponentiation, for optimizing RSA2048
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##############################################################################
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#* on AVX2 capable x86_64 platforms",
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# Reference: #
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#* http://rt.openssl.org/Ticket/Display.html?id=2850&user=guest&pass=guest
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# [1] S. Gueron, V. Krasnov: "Software Implementation of Modular #
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#******************************************************************************
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# Exponentiation, Using Advanced Vector Instructions Architectures", #
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# F. Ozbudak and F. Rodriguez-Henriquez (Eds.): WAIFI 2012, LNCS 7369, #
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# +10% improvement by <appro@openssl.org>
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# pp. 119?135, 2012. Springer-Verlag Berlin Heidelberg 2012 #
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# [2] S. Gueron: "Efficient Software Implementations of Modular #
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# Exponentiation", Journal of Cryptographic Engineering 2:31-43 (2012). #
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# [3] S. Gueron, V. Krasnov: "Speeding up Big-numbers Squaring",IEEE #
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# Proceedings of 9th International Conference on Information Technology: #
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# New Generations (ITNG 2012), pp.821-823 (2012) #
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# [4] S. Gueron, V. Krasnov: "[PATCH] Efficient and side channel analysis #
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# resistant 1024-bit modular exponentiation, for optimizing RSA2048 #
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# on AVX2 capable x86_64 platforms", #
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# http://rt.openssl.org/Ticket/Display.html?id=2850&user=guest&pass=guest#
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##############################################################################
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#
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# +13% improvement over original submission by <appro@openssl.org>
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#
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#
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# rsa2048 sign/sec OpenSSL 1.0.1 scalar(*) this
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# rsa2048 sign/sec OpenSSL 1.0.1 scalar(*) this
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# 2.3GHz Haswell 621 732/+18% 1112/+79%
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# 2.3GHz Haswell 621 765/+23% 1113/+79%
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#
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#
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# (*) if system doesn't support AVX2, for reference purposes;
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# (*) if system doesn't support AVX2, for reference purposes;
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@ -143,24 +155,24 @@ rsaz_1024_sqr_avx2: # 702 cycles, 14% faster than rsaz_1024_mul_avx2
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push %r13
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push %r13
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push %r14
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push %r14
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push %r15
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push %r15
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vzeroupper
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___
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___
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$code.=<<___ if ($win64);
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$code.=<<___ if ($win64);
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lea -0xa8(%rsp),%rsp
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lea -0xa8(%rsp),%rsp
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movaps %xmm6,-0xd8(%rax)
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vmovaps %xmm6,-0xd8(%rax)
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movaps %xmm7,-0xc8(%rax)
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vmovaps %xmm7,-0xc8(%rax)
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movaps %xmm8,-0xb8(%rax)
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vmovaps %xmm8,-0xb8(%rax)
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movaps %xmm9,-0xa8(%rax)
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vmovaps %xmm9,-0xa8(%rax)
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movaps %xmm10,-0x98(%rax)
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vmovaps %xmm10,-0x98(%rax)
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movaps %xmm11,-0x88(%rax)
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vmovaps %xmm11,-0x88(%rax)
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movaps %xmm12,-0x78(%rax)
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vmovaps %xmm12,-0x78(%rax)
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movaps %xmm13,-0x68(%rax)
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vmovaps %xmm13,-0x68(%rax)
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movaps %xmm14,-0x58(%rax)
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vmovaps %xmm14,-0x58(%rax)
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movaps %xmm15,-0x48(%rax)
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vmovaps %xmm15,-0x48(%rax)
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.Lsqr_1024_body:
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.Lsqr_1024_body:
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___
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___
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$code.=<<___;
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$code.=<<___;
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mov %rax,%rbp
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mov %rax,%rbp
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vzeroall
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mov %rdx, $np # reassigned argument
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mov %rdx, $np # reassigned argument
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sub \$$FrameSize, %rsp
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sub \$$FrameSize, %rsp
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mov $np, $tmp
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mov $np, $tmp
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@ -171,6 +183,7 @@ $code.=<<___;
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and \$4095, $tmp # see if $np crosses page
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and \$4095, $tmp # see if $np crosses page
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add \$32*10, $tmp
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add \$32*10, $tmp
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shr \$12, $tmp
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shr \$12, $tmp
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vpxor $ACC9,$ACC9,$ACC9
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jz .Lsqr_1024_no_n_copy
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jz .Lsqr_1024_no_n_copy
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# unaligned 256-bit load that crosses page boundary can
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# unaligned 256-bit load that crosses page boundary can
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@ -198,7 +211,7 @@ $code.=<<___;
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vmovdqu $ACC6, 32*6-128($np)
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vmovdqu $ACC6, 32*6-128($np)
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vmovdqu $ACC7, 32*7-128($np)
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vmovdqu $ACC7, 32*7-128($np)
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vmovdqu $ACC8, 32*8-128($np)
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vmovdqu $ACC8, 32*8-128($np)
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vmovdqu $ACC9, 32*9-128($np) # $ACC9 is zero after vzeroall
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vmovdqu $ACC9, 32*9-128($np) # $ACC9 is zero
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.Lsqr_1024_no_n_copy:
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.Lsqr_1024_no_n_copy:
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and \$-1024, %rsp
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and \$-1024, %rsp
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@ -876,17 +889,18 @@ rsaz_1024_mul_avx2:
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push %r15
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push %r15
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___
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___
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$code.=<<___ if ($win64);
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$code.=<<___ if ($win64);
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vzeroupper
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lea -0xa8(%rsp),%rsp
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lea -0xa8(%rsp),%rsp
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movaps %xmm6,-0xd8(%rax)
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vmovaps %xmm6,-0xd8(%rax)
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movaps %xmm7,-0xc8(%rax)
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vmovaps %xmm7,-0xc8(%rax)
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movaps %xmm8,-0xb8(%rax)
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vmovaps %xmm8,-0xb8(%rax)
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movaps %xmm9,-0xa8(%rax)
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vmovaps %xmm9,-0xa8(%rax)
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movaps %xmm10,-0x98(%rax)
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vmovaps %xmm10,-0x98(%rax)
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movaps %xmm11,-0x88(%rax)
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vmovaps %xmm11,-0x88(%rax)
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movaps %xmm12,-0x78(%rax)
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vmovaps %xmm12,-0x78(%rax)
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movaps %xmm13,-0x68(%rax)
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vmovaps %xmm13,-0x68(%rax)
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movaps %xmm14,-0x58(%rax)
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vmovaps %xmm14,-0x58(%rax)
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movaps %xmm15,-0x48(%rax)
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vmovaps %xmm15,-0x48(%rax)
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.Lmul_1024_body:
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.Lmul_1024_body:
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___
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___
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$code.=<<___;
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$code.=<<___;
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@ -900,6 +914,7 @@ $code.=<<___;
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# cross page boundary, swap it with $bp [meaning that caller
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# cross page boundary, swap it with $bp [meaning that caller
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# is advised to lay down $ap and $bp next to each other, so
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# is advised to lay down $ap and $bp next to each other, so
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# that only one can cross page boundary].
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# that only one can cross page boundary].
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.byte 0x67,0x67
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mov $ap, $tmp
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mov $ap, $tmp
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and \$4095, $tmp
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and \$4095, $tmp
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add \$32*10, $tmp
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add \$32*10, $tmp
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@ -915,6 +930,7 @@ $code.=<<___;
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and \$4095, $tmp # see if $np crosses page
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and \$4095, $tmp # see if $np crosses page
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add \$32*10, $tmp
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add \$32*10, $tmp
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.byte 0x67,0x67
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shr \$12, $tmp
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shr \$12, $tmp
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jz .Lmul_1024_no_n_copy
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jz .Lmul_1024_no_n_copy
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@ -960,6 +976,7 @@ $code.=<<___;
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vpbroadcastq ($bp), $Bi
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vpbroadcastq ($bp), $Bi
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vmovdqu $ACC0, (%rsp) # clear top of stack
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vmovdqu $ACC0, (%rsp) # clear top of stack
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xor $r0, $r0
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xor $r0, $r0
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.byte 0x67
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xor $r1, $r1
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xor $r1, $r1
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xor $r2, $r2
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xor $r2, $r2
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xor $r3, $r3
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xor $r3, $r3
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@ -1564,22 +1581,22 @@ rsaz_1024_gather5_avx2:
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___
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___
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$code.=<<___ if ($win64);
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$code.=<<___ if ($win64);
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lea -0x88(%rsp),%rax
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lea -0x88(%rsp),%rax
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vzeroupper
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.LSEH_begin_rsaz_1024_gather5:
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.LSEH_begin_rsaz_1024_gather5:
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# I can't trust assembler to use specific encoding:-(
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# I can't trust assembler to use specific encoding:-(
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.byte 0x48,0x8d,0x60,0xe0 #lea -0x20(%rax),%rsp
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.byte 0x48,0x8d,0x60,0xe0 #lea -0x20(%rax),%rsp
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.byte 0x0f,0x29,0x70,0xe0 #movaps %xmm6,-0x20(%rax)
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.byte 0xc5,0xf8,0x29,0x70,0xe0 #vmovaps %xmm6,-0x20(%rax)
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.byte 0x0f,0x29,0x78,0xf0 #movaps %xmm7,-0x10(%rax)
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.byte 0xc5,0xf8,0x29,0x78,0xf0 #vmovaps %xmm7,-0x10(%rax)
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.byte 0x44,0x0f,0x29,0x00 #movaps %xmm8,0(%rax)
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.byte 0xc5,0x78,0x29,0x40,0x00 #vmovaps %xmm8,0(%rax)
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.byte 0x44,0x0f,0x29,0x48,0x10 #movaps %xmm9,0x10(%rax)
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.byte 0xc5,0x78,0x29,0x48,0x10 #vmovaps %xmm9,0x10(%rax)
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.byte 0x44,0x0f,0x29,0x50,0x20 #movaps %xmm10,0x20(%rax)
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.byte 0xc5,0x78,0x29,0x50,0x20 #vmovaps %xmm10,0x20(%rax)
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.byte 0x44,0x0f,0x29,0x58,0x30 #movaps %xmm11,0x30(%rax)
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.byte 0xc5,0x78,0x29,0x58,0x30 #vmovaps %xmm11,0x30(%rax)
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.byte 0x44,0x0f,0x29,0x60,0x40 #movaps %xmm12,0x40(%rax)
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.byte 0xc5,0x78,0x29,0x60,0x40 #vmovaps %xmm12,0x40(%rax)
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.byte 0x44,0x0f,0x29,0x68,0x50 #movaps %xmm13,0x50(%rax)
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.byte 0xc5,0x78,0x29,0x68,0x50 #vmovaps %xmm13,0x50(%rax)
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.byte 0x44,0x0f,0x29,0x70,0x60 #movaps %xmm14,0x60(%rax)
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.byte 0xc5,0x78,0x29,0x70,0x60 #vmovaps %xmm14,0x60(%rax)
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.byte 0x44,0x0f,0x29,0x78,0x70 #movaps %xmm15,0x70(%rax)
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.byte 0xc5,0x78,0x29,0x78,0x70 #vmovaps %xmm15,0x70(%rax)
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___
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___
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$code.=<<___;
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$code.=<<___;
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vzeroupper
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lea .Lgather_table(%rip),%r11
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lea .Lgather_table(%rip),%r11
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mov $power,%eax
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mov $power,%eax
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and \$3,$power
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and \$3,$power
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@ -1596,25 +1613,25 @@ $code.=<<___;
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vpbroadcastb 2(%r11,%rax), %xmm14
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vpbroadcastb 2(%r11,%rax), %xmm14
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vpbroadcastb 1(%r11,%rax), %xmm15
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vpbroadcastb 1(%r11,%rax), %xmm15
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lea ($inp,$power),$inp
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lea 64($inp,$power),$inp
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mov \$64,%r11 # size optimization
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mov \$64,%r11 # size optimization
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mov \$9,%eax
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mov \$9,%eax
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jmp .Loop_gather_1024
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jmp .Loop_gather_1024
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.align 32
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.align 32
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.Loop_gather_1024:
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.Loop_gather_1024:
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vpand ($inp), %xmm8,%xmm0
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vpand -64($inp), %xmm8,%xmm0
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vpand ($inp,%r11), %xmm9,%xmm1
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vpand ($inp), %xmm9,%xmm1
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vpand ($inp,%r11,2), %xmm10,%xmm2
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vpand 64($inp), %xmm10,%xmm2
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vpand 64($inp,%r11,2), %xmm11,%xmm3
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vpand ($inp,%r11,2), %xmm11,%xmm3
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vpor %xmm0,%xmm1,%xmm1
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vpor %xmm0,%xmm1,%xmm1
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vpand ($inp,%r11,4), %xmm12,%xmm4
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vpand 64($inp,%r11,2), %xmm12,%xmm4
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vpor %xmm2,%xmm3,%xmm3
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vpor %xmm2,%xmm3,%xmm3
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vpand 64($inp,%r11,4), %xmm13,%xmm5
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vpand ($inp,%r11,4), %xmm13,%xmm5
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vpor %xmm1,%xmm3,%xmm3
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vpor %xmm1,%xmm3,%xmm3
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vpand -128($inp,%r11,8), %xmm14,%xmm6
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vpand 64($inp,%r11,4), %xmm14,%xmm6
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vpor %xmm4,%xmm5,%xmm5
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vpor %xmm4,%xmm5,%xmm5
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vpand -64($inp,%r11,8), %xmm15,%xmm2
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vpand -128($inp,%r11,8), %xmm15,%xmm2
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lea ($inp,%r11,8),$inp
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lea ($inp,%r11,8),$inp
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vpor %xmm3,%xmm5,%xmm5
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vpor %xmm3,%xmm5,%xmm5
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vpor %xmm2,%xmm6,%xmm6
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vpor %xmm2,%xmm6,%xmm6
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@ -1798,16 +1815,16 @@ rsaz_se_handler:
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.rva .Lmul_1024_body,.Lmul_1024_epilogue
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.rva .Lmul_1024_body,.Lmul_1024_epilogue
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.LSEH_info_rsaz_1024_gather5:
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.LSEH_info_rsaz_1024_gather5:
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.byte 0x01,0x33,0x16,0x00
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.byte 0x01,0x33,0x16,0x00
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.byte 0x33,0xf8,0x09,0x00 #movaps 0x90(rsp),xmm15
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.byte 0x36,0xf8,0x09,0x00 #vmovaps 0x90(rsp),xmm15
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.byte 0x2e,0xe8,0x08,0x00 #movaps 0x80(rsp),xmm14
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.byte 0x31,0xe8,0x08,0x00 #vmovaps 0x80(rsp),xmm14
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.byte 0x29,0xd8,0x07,0x00 #movaps 0x70(rsp),xmm13
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.byte 0x2c,0xd8,0x07,0x00 #vmovaps 0x70(rsp),xmm13
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.byte 0x24,0xc8,0x06,0x00 #movaps 0x60(rsp),xmm12
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.byte 0x27,0xc8,0x06,0x00 #vmovaps 0x60(rsp),xmm12
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.byte 0x1f,0xb8,0x05,0x00 #movaps 0x50(rsp),xmm11
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.byte 0x22,0xb8,0x05,0x00 #vmovaps 0x50(rsp),xmm11
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.byte 0x1a,0xa8,0x04,0x00 #movaps 0x40(rsp),xmm10
|
.byte 0x1d,0xa8,0x04,0x00 #vmovaps 0x40(rsp),xmm10
|
||||||
.byte 0x15,0x98,0x03,0x00 #movaps 0x30(rsp),xmm9
|
.byte 0x18,0x98,0x03,0x00 #vmovaps 0x30(rsp),xmm9
|
||||||
.byte 0x10,0x88,0x02,0x00 #movaps 0x20(rsp),xmm8
|
.byte 0x13,0x88,0x02,0x00 #vmovaps 0x20(rsp),xmm8
|
||||||
.byte 0x0c,0x78,0x01,0x00 #movaps 0x10(rsp),xmm7
|
.byte 0x0e,0x78,0x01,0x00 #vmovaps 0x10(rsp),xmm7
|
||||||
.byte 0x08,0x68,0x00,0x00 #movaps 0x00(rsp),xmm6
|
.byte 0x09,0x68,0x00,0x00 #vmovaps 0x00(rsp),xmm6
|
||||||
.byte 0x04,0x01,0x15,0x00 #sub rsp,0xa8
|
.byte 0x04,0x01,0x15,0x00 #sub rsp,0xa8
|
||||||
___
|
___
|
||||||
}
|
}
|
||||||
|
|||||||
@ -1,48 +1,60 @@
|
|||||||
#!/usr/bin/env perl
|
#!/usr/bin/env perl
|
||||||
|
|
||||||
#******************************************************************************#
|
##############################################################################
|
||||||
#* Copyright(c) 2012, Intel Corp. *#
|
# #
|
||||||
#* Developers and authors: *#
|
# Copyright (c) 2012, Intel Corporation #
|
||||||
#* Shay Gueron (1, 2), and Vlad Krasnov (1) *#
|
# #
|
||||||
#* (1) Intel Architecture Group, Microprocessor and Chipset Development, *#
|
# All rights reserved. #
|
||||||
#* Israel Development Center, Haifa, Israel *#
|
# #
|
||||||
#* (2) University of Haifa *#
|
# Redistribution and use in source and binary forms, with or without #
|
||||||
#******************************************************************************#
|
# modification, are permitted provided that the following conditions are #
|
||||||
#* This submission to OpenSSL is to be made available under the OpenSSL *#
|
# met: #
|
||||||
#* license, and only to the OpenSSL project, in order to allow integration *#
|
# #
|
||||||
#* into the publicly distributed code. ? *#
|
# * Redistributions of source code must retain the above copyright #
|
||||||
#* The use of this code, or portions of this code, or concepts embedded in *#
|
# notice, this list of conditions and the following disclaimer. #
|
||||||
#* this code, or modification of this code and/or algorithm(s) in it, or the *#
|
# #
|
||||||
#* use of this code for any other purpose than stated above, requires special *#
|
# * Redistributions in binary form must reproduce the above copyright #
|
||||||
#* licensing. *#
|
# notice, this list of conditions and the following disclaimer in the #
|
||||||
#******************************************************************************#
|
# documentation and/or other materials provided with the #
|
||||||
#******************************************************************************#
|
# distribution. #
|
||||||
#* DISCLAIMER: *#
|
# #
|
||||||
#* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS AND THE COPYRIGHT OWNERS *#
|
# * Neither the name of the Intel Corporation nor the names of its #
|
||||||
#* ``AS IS''. ANY EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED *#
|
# contributors may be used to endorse or promote products derived from #
|
||||||
#* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR *#
|
# this software without specific prior written permission. #
|
||||||
#* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE CONTRIBUTORS OR THE COPYRIGHT*#
|
# #
|
||||||
#* OWNERS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, *#
|
# #
|
||||||
#* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF *#
|
# THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY #
|
||||||
#* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS *#
|
# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE #
|
||||||
#* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN *#
|
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR #
|
||||||
#* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) *#
|
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR #
|
||||||
#* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE *#
|
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
|
||||||
#* POSSIBILITY OF SUCH DAMAGE. *#
|
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, #
|
||||||
#******************************************************************************#
|
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR #
|
||||||
#* Reference: *#
|
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF #
|
||||||
#* [1] S. Gueron, "Efficient Software Implementations of Modular *#
|
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
|
||||||
#* Exponentiation", http://eprint.iacr.org/2011/239 *#
|
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS #
|
||||||
#* [2] S. Gueron, V. Krasnov. "Speeding up Big-Numbers Squaring". *#
|
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #
|
||||||
#* IEEE Proceedings of 9th International Conference on Information *#
|
# #
|
||||||
#* Technology: New Generations (ITNG 2012), 821-823 (2012). *#
|
##############################################################################
|
||||||
#* [3] S. Gueron, Efficient Software Implementations of Modular Exponentiation*#
|
# Developers and authors: #
|
||||||
#* Journal of Cryptographic Engineering 2:31-43 (2012). *#
|
# Shay Gueron (1, 2), and Vlad Krasnov (1) #
|
||||||
#* [4] S. Gueron, V. Krasnov: "[PATCH] Efficient and side channel analysis *#
|
# (1) Intel Architecture Group, Microprocessor and Chipset Development, #
|
||||||
#* resistant 512-bit and 1024-bit modular exponentiation for optimizing *#
|
# Israel Development Center, Haifa, Israel #
|
||||||
#* RSA1024 and RSA2048 on x86_64 platforms", *#
|
# (2) University of Haifa #
|
||||||
#* http://rt.openssl.org/Ticket/Display.html?id=2582&user=guest&pass=guest*#
|
##############################################################################
|
||||||
################################################################################
|
# Reference: #
|
||||||
|
# [1] S. Gueron, "Efficient Software Implementations of Modular #
|
||||||
|
# Exponentiation", http://eprint.iacr.org/2011/239 #
|
||||||
|
# [2] S. Gueron, V. Krasnov. "Speeding up Big-Numbers Squaring". #
|
||||||
|
# IEEE Proceedings of 9th International Conference on Information #
|
||||||
|
# Technology: New Generations (ITNG 2012), 821-823 (2012). #
|
||||||
|
# [3] S. Gueron, Efficient Software Implementations of Modular Exponentiation#
|
||||||
|
# Journal of Cryptographic Engineering 2:31-43 (2012). #
|
||||||
|
# [4] S. Gueron, V. Krasnov: "[PATCH] Efficient and side channel analysis #
|
||||||
|
# resistant 512-bit and 1024-bit modular exponentiation for optimizing #
|
||||||
|
# RSA1024 and RSA2048 on x86_64 platforms", #
|
||||||
|
# http://rt.openssl.org/Ticket/Display.html?id=2582&user=guest&pass=guest#
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
# While original submission covers 512- and 1024-bit exponentiation,
|
# While original submission covers 512- and 1024-bit exponentiation,
|
||||||
# this module is limited to 512-bit version only (and as such
|
# this module is limited to 512-bit version only (and as such
|
||||||
@ -1812,33 +1824,33 @@ $code.=<<___;
|
|||||||
.align 32
|
.align 32
|
||||||
__rsaz_512_mulx:
|
__rsaz_512_mulx:
|
||||||
mulx ($ap), %rbx, %r8 # initial %rdx preloaded by caller
|
mulx ($ap), %rbx, %r8 # initial %rdx preloaded by caller
|
||||||
xor $zero, $zero # cf=0,of=0
|
mov \$-6, %rcx
|
||||||
|
|
||||||
mulx 8($ap), %rax, %r9
|
mulx 8($ap), %rax, %r9
|
||||||
movq %rbx, 8(%rsp)
|
movq %rbx, 8(%rsp)
|
||||||
|
|
||||||
mulx 16($ap), %rbx, %r10
|
mulx 16($ap), %rbx, %r10
|
||||||
adcx %rax, %r8
|
adc %rax, %r8
|
||||||
|
|
||||||
mulx 24($ap), %rax, %r11
|
mulx 24($ap), %rax, %r11
|
||||||
adcx %rbx, %r9
|
adc %rbx, %r9
|
||||||
|
|
||||||
.byte 0xc4,0x62,0xe3,0xf6,0xa6,0x20,0x00,0x00,0x00 # mulx 32($ap), %rbx, %r12
|
mulx 32($ap), %rbx, %r12
|
||||||
adcx %rax, %r10
|
adc %rax, %r10
|
||||||
|
|
||||||
mulx 40($ap), %rax, %r13
|
mulx 40($ap), %rax, %r13
|
||||||
adcx %rbx, %r11
|
adc %rbx, %r11
|
||||||
|
|
||||||
mulx 48($ap), %rbx, %r14
|
mulx 48($ap), %rbx, %r14
|
||||||
adcx %rax, %r12
|
adc %rax, %r12
|
||||||
|
|
||||||
mulx 56($ap), %rax, %r15
|
mulx 56($ap), %rax, %r15
|
||||||
mov 8($bp), %rdx
|
mov 8($bp), %rdx
|
||||||
adcx %rbx, %r13
|
adc %rbx, %r13
|
||||||
adcx %rax, %r14
|
adc %rax, %r14
|
||||||
adcx $zero, %r15 # cf=0
|
adc \$0, %r15
|
||||||
|
|
||||||
mov \$-6, %rcx
|
xor $zero, $zero # cf=0,of=0
|
||||||
jmp .Loop_mulx
|
jmp .Loop_mulx
|
||||||
|
|
||||||
.align 32
|
.align 32
|
||||||
|
|||||||
@ -1,306 +1,318 @@
|
|||||||
/******************************************************************************
|
/*****************************************************************************
|
||||||
* Copyright(c) 2012, Intel Corp.
|
* *
|
||||||
* Developers and authors:
|
* Copyright (c) 2012, Intel Corporation *
|
||||||
* Shay Gueron (1, 2), and Vlad Krasnov (1)
|
* *
|
||||||
* (1) Intel Corporation, Israel Development Center, Haifa, Israel
|
* All rights reserved. *
|
||||||
* (2) University of Haifa, Israel
|
* *
|
||||||
******************************************************************************
|
* Redistribution and use in source and binary forms, with or without *
|
||||||
* LICENSE:
|
* modification, are permitted provided that the following conditions are *
|
||||||
* This submission to OpenSSL is to be made available under the OpenSSL
|
* met: *
|
||||||
* license, and only to the OpenSSL project, in order to allow integration
|
* *
|
||||||
* into the publicly distributed code.
|
* * Redistributions of source code must retain the above copyright *
|
||||||
* The use of this code, or portions of this code, or concepts embedded in
|
* notice, this list of conditions and the following disclaimer. *
|
||||||
* this code, or modification of this code and/or algorithm(s) in it, or the
|
* *
|
||||||
* use of this code for any other purpose than stated above, requires special
|
* * Redistributions in binary form must reproduce the above copyright *
|
||||||
* licensing.
|
* notice, this list of conditions and the following disclaimer in the *
|
||||||
******************************************************************************
|
* documentation and/or other materials provided with the *
|
||||||
* DISCLAIMER:
|
* distribution. *
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS AND THE COPYRIGHT OWNERS
|
* *
|
||||||
* ``AS IS''. ANY EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
* * Neither the name of the Intel Corporation nor the names of its *
|
||||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
* contributors may be used to endorse or promote products derived from *
|
||||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE CONTRIBUTORS OR THE COPYRIGHT
|
* this software without specific prior written permission. *
|
||||||
* OWNERS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
* *
|
||||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
* *
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
* THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY *
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE *
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR *
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR *
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, *
|
||||||
******************************************************************************/
|
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, *
|
||||||
|
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR *
|
||||||
#include "rsaz_exp.h"
|
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING *
|
||||||
/*
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS *
|
||||||
* See crypto/bn/asm/rsaz-avx2.pl for further details.
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *
|
||||||
*/
|
* *
|
||||||
void rsaz_1024_norm2red_avx2(void *red,const void *norm);
|
******************************************************************************
|
||||||
void rsaz_1024_mul_avx2(void *ret,const void *a,const void *b,const void *n,unsigned long k);
|
* Developers and authors: *
|
||||||
void rsaz_1024_sqr_avx2(void *ret,const void *a,const void *n,unsigned long k,int cnt);
|
* Shay Gueron (1, 2), and Vlad Krasnov (1) *
|
||||||
void rsaz_1024_scatter5_avx2(void *tbl,const void *val,int i);
|
* (1) Intel Corporation, Israel Development Center, Haifa, Israel *
|
||||||
void rsaz_1024_gather5_avx2(void *val,const void *tbl,int i);
|
* (2) University of Haifa, Israel *
|
||||||
void rsaz_1024_red2norm_avx2(void *norm,const void *red);
|
*****************************************************************************/
|
||||||
|
|
||||||
#if defined(__GNUC__)
|
#include "rsaz_exp.h"
|
||||||
# define ALIGN64 __attribute__((aligned(64)))
|
|
||||||
#elif defined(_MSC_VER)
|
/*
|
||||||
# define ALIGN64 __declspec(align(64))
|
* See crypto/bn/asm/rsaz-avx2.pl for further details.
|
||||||
#elif defined(__SUNPRO_C)
|
*/
|
||||||
# define ALIGN64
|
void rsaz_1024_norm2red_avx2(void *red,const void *norm);
|
||||||
# pragma align 64(one,two80)
|
void rsaz_1024_mul_avx2(void *ret,const void *a,const void *b,const void *n,unsigned long k);
|
||||||
#else
|
void rsaz_1024_sqr_avx2(void *ret,const void *a,const void *n,unsigned long k,int cnt);
|
||||||
# define ALIGN64 /* not fatal, might hurt performance a little */
|
void rsaz_1024_scatter5_avx2(void *tbl,const void *val,int i);
|
||||||
#endif
|
void rsaz_1024_gather5_avx2(void *val,const void *tbl,int i);
|
||||||
|
void rsaz_1024_red2norm_avx2(void *norm,const void *red);
|
||||||
ALIGN64 static const unsigned long one[40] =
|
|
||||||
{1,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
|
#if defined(__GNUC__)
|
||||||
ALIGN64 static const unsigned long two80[40] =
|
# define ALIGN64 __attribute__((aligned(64)))
|
||||||
{0,0,1<<22,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
|
#elif defined(_MSC_VER)
|
||||||
|
# define ALIGN64 __declspec(align(64))
|
||||||
void RSAZ_1024_mod_exp_avx2(BN_ULONG result_norm[16],
|
#elif defined(__SUNPRO_C)
|
||||||
const BN_ULONG base_norm[16], const BN_ULONG exponent[16],
|
# define ALIGN64
|
||||||
const BN_ULONG m_norm[16], const BN_ULONG RR[16], BN_ULONG k0)
|
# pragma align 64(one,two80)
|
||||||
{
|
#else
|
||||||
unsigned char storage[320*3+32*9*16+64]; /* 5.5KB */
|
# define ALIGN64 /* not fatal, might hurt performance a little */
|
||||||
unsigned char *p_str = storage + (64-((size_t)storage%64));
|
#endif
|
||||||
unsigned char *a_inv, *m, *result,
|
|
||||||
*table_s = p_str+320*3,
|
ALIGN64 static const unsigned long one[40] =
|
||||||
*R2 = table_s; /* borrow */
|
{1,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
|
||||||
int index;
|
ALIGN64 static const unsigned long two80[40] =
|
||||||
int wvalue;
|
{0,0,1<<22,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
|
||||||
|
|
||||||
if ((((size_t)p_str&4095)+320)>>12) {
|
void RSAZ_1024_mod_exp_avx2(BN_ULONG result_norm[16],
|
||||||
result = p_str;
|
const BN_ULONG base_norm[16], const BN_ULONG exponent[16],
|
||||||
a_inv = p_str + 320;
|
const BN_ULONG m_norm[16], const BN_ULONG RR[16], BN_ULONG k0)
|
||||||
m = p_str + 320*2; /* should not cross page */
|
{
|
||||||
} else {
|
unsigned char storage[320*3+32*9*16+64]; /* 5.5KB */
|
||||||
m = p_str; /* should not cross page */
|
unsigned char *p_str = storage + (64-((size_t)storage%64));
|
||||||
result = p_str + 320;
|
unsigned char *a_inv, *m, *result,
|
||||||
a_inv = p_str + 320*2;
|
*table_s = p_str+320*3,
|
||||||
}
|
*R2 = table_s; /* borrow */
|
||||||
|
int index;
|
||||||
rsaz_1024_norm2red_avx2(m, m_norm);
|
int wvalue;
|
||||||
rsaz_1024_norm2red_avx2(a_inv, base_norm);
|
|
||||||
rsaz_1024_norm2red_avx2(R2, RR);
|
if ((((size_t)p_str&4095)+320)>>12) {
|
||||||
|
result = p_str;
|
||||||
rsaz_1024_mul_avx2(R2, R2, R2, m, k0);
|
a_inv = p_str + 320;
|
||||||
rsaz_1024_mul_avx2(R2, R2, two80, m, k0);
|
m = p_str + 320*2; /* should not cross page */
|
||||||
|
} else {
|
||||||
/* table[0] = 1 */
|
m = p_str; /* should not cross page */
|
||||||
rsaz_1024_mul_avx2(result, R2, one, m, k0);
|
result = p_str + 320;
|
||||||
/* table[1] = a_inv^1 */
|
a_inv = p_str + 320*2;
|
||||||
rsaz_1024_mul_avx2(a_inv, a_inv, R2, m, k0);
|
}
|
||||||
|
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,0);
|
rsaz_1024_norm2red_avx2(m, m_norm);
|
||||||
rsaz_1024_scatter5_avx2(table_s,a_inv,1);
|
rsaz_1024_norm2red_avx2(a_inv, base_norm);
|
||||||
|
rsaz_1024_norm2red_avx2(R2, RR);
|
||||||
/* table[2] = a_inv^2 */
|
|
||||||
rsaz_1024_sqr_avx2(result, a_inv, m, k0, 1);
|
rsaz_1024_mul_avx2(R2, R2, R2, m, k0);
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,2);
|
rsaz_1024_mul_avx2(R2, R2, two80, m, k0);
|
||||||
#if 0
|
|
||||||
/* this is almost 2x smaller and less than 1% slower */
|
/* table[0] = 1 */
|
||||||
for (index=3; index<32; index++) {
|
rsaz_1024_mul_avx2(result, R2, one, m, k0);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
/* table[1] = a_inv^1 */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,index);
|
rsaz_1024_mul_avx2(a_inv, a_inv, R2, m, k0);
|
||||||
}
|
|
||||||
#else
|
rsaz_1024_scatter5_avx2(table_s,result,0);
|
||||||
/* table[4] = a_inv^4 */
|
rsaz_1024_scatter5_avx2(table_s,a_inv,1);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,4);
|
/* table[2] = a_inv^2 */
|
||||||
/* table[8] = a_inv^8 */
|
rsaz_1024_sqr_avx2(result, a_inv, m, k0, 1);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
rsaz_1024_scatter5_avx2(table_s,result,2);
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,8);
|
#if 0
|
||||||
/* table[16] = a_inv^16 */
|
/* this is almost 2x smaller and less than 1% slower */
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
for (index=3; index<32; index++) {
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,16);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
/* table[17] = a_inv^17 */
|
rsaz_1024_scatter5_avx2(table_s,result,index);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
}
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,17);
|
#else
|
||||||
|
/* table[4] = a_inv^4 */
|
||||||
/* table[3] */
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
rsaz_1024_gather5_avx2(result,table_s,2);
|
rsaz_1024_scatter5_avx2(table_s,result,4);
|
||||||
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
/* table[8] = a_inv^8 */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,3);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[6] */
|
rsaz_1024_scatter5_avx2(table_s,result,8);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[16] = a_inv^16 */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,6);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[12] */
|
rsaz_1024_scatter5_avx2(table_s,result,16);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[17] = a_inv^17 */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,12);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
/* table[24] */
|
rsaz_1024_scatter5_avx2(table_s,result,17);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,24);
|
/* table[3] */
|
||||||
/* table[25] */
|
rsaz_1024_gather5_avx2(result,table_s,2);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,25);
|
rsaz_1024_scatter5_avx2(table_s,result,3);
|
||||||
|
/* table[6] */
|
||||||
/* table[5] */
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
rsaz_1024_gather5_avx2(result,table_s,4);
|
rsaz_1024_scatter5_avx2(table_s,result,6);
|
||||||
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
/* table[12] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,5);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[10] */
|
rsaz_1024_scatter5_avx2(table_s,result,12);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[24] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,10);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[20] */
|
rsaz_1024_scatter5_avx2(table_s,result,24);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[25] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,20);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
/* table[21] */
|
rsaz_1024_scatter5_avx2(table_s,result,25);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,21);
|
/* table[5] */
|
||||||
|
rsaz_1024_gather5_avx2(result,table_s,4);
|
||||||
/* table[7] */
|
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
||||||
rsaz_1024_gather5_avx2(result,table_s,6);
|
rsaz_1024_scatter5_avx2(table_s,result,5);
|
||||||
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
/* table[10] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,7);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[14] */
|
rsaz_1024_scatter5_avx2(table_s,result,10);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[20] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,14);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[28] */
|
rsaz_1024_scatter5_avx2(table_s,result,20);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[21] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,28);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
/* table[29] */
|
rsaz_1024_scatter5_avx2(table_s,result,21);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,29);
|
/* table[7] */
|
||||||
|
rsaz_1024_gather5_avx2(result,table_s,6);
|
||||||
/* table[9] */
|
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
||||||
rsaz_1024_gather5_avx2(result,table_s,8);
|
rsaz_1024_scatter5_avx2(table_s,result,7);
|
||||||
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
/* table[14] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,9);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[18] */
|
rsaz_1024_scatter5_avx2(table_s,result,14);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[28] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,18);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[19] */
|
rsaz_1024_scatter5_avx2(table_s,result,28);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
/* table[29] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,19);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
|
rsaz_1024_scatter5_avx2(table_s,result,29);
|
||||||
/* table[11] */
|
|
||||||
rsaz_1024_gather5_avx2(result,table_s,10);
|
/* table[9] */
|
||||||
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
rsaz_1024_gather5_avx2(result,table_s,8);
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,11);
|
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
||||||
/* table[22] */
|
rsaz_1024_scatter5_avx2(table_s,result,9);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[18] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,22);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[23] */
|
rsaz_1024_scatter5_avx2(table_s,result,18);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
/* table[19] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,23);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
|
rsaz_1024_scatter5_avx2(table_s,result,19);
|
||||||
/* table[13] */
|
|
||||||
rsaz_1024_gather5_avx2(result,table_s,12);
|
/* table[11] */
|
||||||
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
rsaz_1024_gather5_avx2(result,table_s,10);
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,13);
|
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
||||||
/* table[26] */
|
rsaz_1024_scatter5_avx2(table_s,result,11);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[22] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,26);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[27] */
|
rsaz_1024_scatter5_avx2(table_s,result,22);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
/* table[23] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,27);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
|
rsaz_1024_scatter5_avx2(table_s,result,23);
|
||||||
/* table[15] */
|
|
||||||
rsaz_1024_gather5_avx2(result,table_s,14);
|
/* table[13] */
|
||||||
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
rsaz_1024_gather5_avx2(result,table_s,12);
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,15);
|
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
||||||
/* table[30] */
|
rsaz_1024_scatter5_avx2(table_s,result,13);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
/* table[26] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,30);
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
/* table[31] */
|
rsaz_1024_scatter5_avx2(table_s,result,26);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
/* table[27] */
|
||||||
rsaz_1024_scatter5_avx2(table_s,result,31);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
#endif
|
rsaz_1024_scatter5_avx2(table_s,result,27);
|
||||||
|
|
||||||
/* load first window */
|
/* table[15] */
|
||||||
p_str = (unsigned char*)exponent;
|
rsaz_1024_gather5_avx2(result,table_s,14);
|
||||||
wvalue = p_str[127] >> 3;
|
rsaz_1024_mul_avx2(result,result,a_inv,m,k0);
|
||||||
rsaz_1024_gather5_avx2(result,table_s,wvalue);
|
rsaz_1024_scatter5_avx2(table_s,result,15);
|
||||||
|
/* table[30] */
|
||||||
index = 1014;
|
rsaz_1024_sqr_avx2(result, result, m, k0, 1);
|
||||||
|
rsaz_1024_scatter5_avx2(table_s,result,30);
|
||||||
while(index > -1) { /* loop for the remaining 127 windows */
|
/* table[31] */
|
||||||
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 5);
|
rsaz_1024_scatter5_avx2(table_s,result,31);
|
||||||
|
#endif
|
||||||
wvalue = *((unsigned short*)&p_str[index/8]);
|
|
||||||
wvalue = (wvalue>> (index%8)) & 31;
|
/* load first window */
|
||||||
index-=5;
|
p_str = (unsigned char*)exponent;
|
||||||
|
wvalue = p_str[127] >> 3;
|
||||||
rsaz_1024_gather5_avx2(a_inv,table_s,wvalue); /* borrow a_inv */
|
rsaz_1024_gather5_avx2(result,table_s,wvalue);
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
|
||||||
}
|
index = 1014;
|
||||||
|
|
||||||
/* square four times */
|
while(index > -1) { /* loop for the remaining 127 windows */
|
||||||
rsaz_1024_sqr_avx2(result, result, m, k0, 4);
|
|
||||||
|
rsaz_1024_sqr_avx2(result, result, m, k0, 5);
|
||||||
wvalue = p_str[0] & 15;
|
|
||||||
|
wvalue = *((unsigned short*)&p_str[index/8]);
|
||||||
rsaz_1024_gather5_avx2(a_inv,table_s,wvalue); /* borrow a_inv */
|
wvalue = (wvalue>> (index%8)) & 31;
|
||||||
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
index-=5;
|
||||||
|
|
||||||
/* from Montgomery */
|
rsaz_1024_gather5_avx2(a_inv,table_s,wvalue); /* borrow a_inv */
|
||||||
rsaz_1024_mul_avx2(result, result, one, m, k0);
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
|
}
|
||||||
rsaz_1024_red2norm_avx2(result_norm, result);
|
|
||||||
|
/* square four times */
|
||||||
OPENSSL_cleanse(storage,sizeof(storage));
|
rsaz_1024_sqr_avx2(result, result, m, k0, 4);
|
||||||
}
|
|
||||||
|
wvalue = p_str[0] & 15;
|
||||||
/*
|
|
||||||
* See crypto/bn/rsaz-x86_64.pl for further details.
|
rsaz_1024_gather5_avx2(a_inv,table_s,wvalue); /* borrow a_inv */
|
||||||
*/
|
rsaz_1024_mul_avx2(result, result, a_inv, m, k0);
|
||||||
void rsaz_512_mul(void *ret,const void *a,const void *b,const void *n,unsigned long k);
|
|
||||||
void rsaz_512_mul_scatter4(void *ret,const void *a,const void *n,unsigned long k,const void *tbl,unsigned int power);
|
/* from Montgomery */
|
||||||
void rsaz_512_mul_gather4(void *ret,const void *a,const void *tbl,const void *n,unsigned long k,unsigned int power);
|
rsaz_1024_mul_avx2(result, result, one, m, k0);
|
||||||
void rsaz_512_mul_by_one(void *ret,const void *a,const void *n,unsigned long k);
|
|
||||||
void rsaz_512_sqr(void *ret,const void *a,const void *n,unsigned long k,int cnt);
|
rsaz_1024_red2norm_avx2(result_norm, result);
|
||||||
void rsaz_512_scatter4(void *tbl, const unsigned long *val, int power);
|
|
||||||
void rsaz_512_gather4(unsigned long *val, const void *tbl, int power);
|
OPENSSL_cleanse(storage,sizeof(storage));
|
||||||
|
}
|
||||||
void RSAZ_512_mod_exp(BN_ULONG result[8],
|
|
||||||
const BN_ULONG base[8], const BN_ULONG exponent[8],
|
/*
|
||||||
const BN_ULONG m[8], BN_ULONG k0, const BN_ULONG RR[8])
|
* See crypto/bn/rsaz-x86_64.pl for further details.
|
||||||
{
|
*/
|
||||||
unsigned char storage[16*8*8+64*2+64]; /* 1.2KB */
|
void rsaz_512_mul(void *ret,const void *a,const void *b,const void *n,unsigned long k);
|
||||||
unsigned char *table = storage + (64-((size_t)storage%64));
|
void rsaz_512_mul_scatter4(void *ret,const void *a,const void *n,unsigned long k,const void *tbl,unsigned int power);
|
||||||
unsigned long *a_inv = (unsigned long *)(table+16*8*8),
|
void rsaz_512_mul_gather4(void *ret,const void *a,const void *tbl,const void *n,unsigned long k,unsigned int power);
|
||||||
*temp = (unsigned long *)(table+16*8*8+8*8);
|
void rsaz_512_mul_by_one(void *ret,const void *a,const void *n,unsigned long k);
|
||||||
unsigned char *p_str = (unsigned char*)exponent;
|
void rsaz_512_sqr(void *ret,const void *a,const void *n,unsigned long k,int cnt);
|
||||||
int index;
|
void rsaz_512_scatter4(void *tbl, const unsigned long *val, int power);
|
||||||
unsigned int wvalue;
|
void rsaz_512_gather4(unsigned long *val, const void *tbl, int power);
|
||||||
|
|
||||||
/* table[0] = 1_inv */
|
void RSAZ_512_mod_exp(BN_ULONG result[8],
|
||||||
temp[0] = 0-m[0]; temp[1] = ~m[1];
|
const BN_ULONG base[8], const BN_ULONG exponent[8],
|
||||||
temp[2] = ~m[2]; temp[3] = ~m[3];
|
const BN_ULONG m[8], BN_ULONG k0, const BN_ULONG RR[8])
|
||||||
temp[4] = ~m[4]; temp[5] = ~m[5];
|
{
|
||||||
temp[6] = ~m[6]; temp[7] = ~m[7];
|
unsigned char storage[16*8*8+64*2+64]; /* 1.2KB */
|
||||||
rsaz_512_scatter4(table, temp, 0);
|
unsigned char *table = storage + (64-((size_t)storage%64));
|
||||||
|
unsigned long *a_inv = (unsigned long *)(table+16*8*8),
|
||||||
/* table [1] = a_inv^1 */
|
*temp = (unsigned long *)(table+16*8*8+8*8);
|
||||||
rsaz_512_mul(a_inv, base, RR, m, k0);
|
unsigned char *p_str = (unsigned char*)exponent;
|
||||||
rsaz_512_scatter4(table, a_inv, 1);
|
int index;
|
||||||
|
unsigned int wvalue;
|
||||||
/* table [2] = a_inv^2 */
|
|
||||||
rsaz_512_sqr(temp, a_inv, m, k0, 1);
|
/* table[0] = 1_inv */
|
||||||
rsaz_512_scatter4(table, temp, 2);
|
temp[0] = 0-m[0]; temp[1] = ~m[1];
|
||||||
|
temp[2] = ~m[2]; temp[3] = ~m[3];
|
||||||
for (index=3; index<16; index++)
|
temp[4] = ~m[4]; temp[5] = ~m[5];
|
||||||
rsaz_512_mul_scatter4(temp, a_inv, m, k0, table, index);
|
temp[6] = ~m[6]; temp[7] = ~m[7];
|
||||||
|
rsaz_512_scatter4(table, temp, 0);
|
||||||
/* load first window */
|
|
||||||
wvalue = p_str[63];
|
/* table [1] = a_inv^1 */
|
||||||
|
rsaz_512_mul(a_inv, base, RR, m, k0);
|
||||||
rsaz_512_gather4(temp, table, wvalue>>4);
|
rsaz_512_scatter4(table, a_inv, 1);
|
||||||
rsaz_512_sqr(temp, temp, m, k0, 4);
|
|
||||||
rsaz_512_mul_gather4(temp, temp, table, m, k0, wvalue&0xf);
|
/* table [2] = a_inv^2 */
|
||||||
|
rsaz_512_sqr(temp, a_inv, m, k0, 1);
|
||||||
for (index=62; index>=0; index--) {
|
rsaz_512_scatter4(table, temp, 2);
|
||||||
wvalue = p_str[index];
|
|
||||||
|
for (index=3; index<16; index++)
|
||||||
rsaz_512_sqr(temp, temp, m, k0, 4);
|
rsaz_512_mul_scatter4(temp, a_inv, m, k0, table, index);
|
||||||
rsaz_512_mul_gather4(temp, temp, table, m, k0, wvalue>>4);
|
|
||||||
|
/* load first window */
|
||||||
rsaz_512_sqr(temp, temp, m, k0, 4);
|
wvalue = p_str[63];
|
||||||
rsaz_512_mul_gather4(temp, temp, table, m, k0, wvalue&0x0f);
|
|
||||||
}
|
rsaz_512_gather4(temp, table, wvalue>>4);
|
||||||
|
rsaz_512_sqr(temp, temp, m, k0, 4);
|
||||||
/* from Montgomery */
|
rsaz_512_mul_gather4(temp, temp, table, m, k0, wvalue&0xf);
|
||||||
rsaz_512_mul_by_one(result, temp, m, k0);
|
|
||||||
|
for (index=62; index>=0; index--) {
|
||||||
OPENSSL_cleanse(storage,sizeof(storage));
|
wvalue = p_str[index];
|
||||||
}
|
|
||||||
|
rsaz_512_sqr(temp, temp, m, k0, 4);
|
||||||
|
rsaz_512_mul_gather4(temp, temp, table, m, k0, wvalue>>4);
|
||||||
|
|
||||||
|
rsaz_512_sqr(temp, temp, m, k0, 4);
|
||||||
|
rsaz_512_mul_gather4(temp, temp, table, m, k0, wvalue&0x0f);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* from Montgomery */
|
||||||
|
rsaz_512_mul_by_one(result, temp, m, k0);
|
||||||
|
|
||||||
|
OPENSSL_cleanse(storage,sizeof(storage));
|
||||||
|
}
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user