x86_64cpuid.pl: get AVX masking right.

This commit is contained in:
Andy Polyakov 2011-05-26 13:16:26 +00:00
parent d67813f878
commit 2bc3ad28b3

View File

@ -146,12 +146,10 @@ OPENSSL_ia32_cpuid:
.Lgeneric: .Lgeneric:
and \$0x00000800,%r9d # isolate AMD XOP flag and \$0x00000800,%r9d # isolate AMD XOP flag
and \$0xfffff7ff,%ecx and \$0xfffff7ff,%ecx
or %r9d,%ecx # merge AMD XOP flag or %ecx,%r9d # merge AMD XOP flag
shl \$32,%rcx mov %edx,%r10d # %r9d:%r10d is copy of %ecx:%edx
mov %edx,%ebx bt \$27,%r9d # check OSXSAVE bit
or %rcx,%rbx # compose capability vector in %rbx
bt \$27+32,%rcx # check OSXSAVE bit
jnc .Lclear_avx jnc .Lclear_avx
xor %ecx,%ecx # XCR0 xor %ecx,%ecx # XCR0
.byte 0x0f,0x01,0xd0 # xgetbv .byte 0x0f,0x01,0xd0 # xgetbv
@ -160,11 +158,12 @@ OPENSSL_ia32_cpuid:
je .Ldone je .Ldone
.Lclear_avx: .Lclear_avx:
mov \$0xefffe7ff,%eax # ~(1<<28|1<<12|1<<11) mov \$0xefffe7ff,%eax # ~(1<<28|1<<12|1<<11)
shl \$32,%rax and %eax,%r9d # clear AVX, FMA and AMD XOP bits
and %rax,%rbx # clear AVX, FMA and AMD XOP bits
.Ldone: .Ldone:
mov %rbx,%rax shl \$32,%r9
mov %r10d,%eax
mov %r8,%rbx # restore %rbx mov %r8,%rbx # restore %rbx
or %r9,%rax
ret ret
.size OPENSSL_ia32_cpuid,.-OPENSSL_ia32_cpuid .size OPENSSL_ia32_cpuid,.-OPENSSL_ia32_cpuid