146 lines
5.4 KiB
C++
146 lines
5.4 KiB
C++
/*!
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* \copy
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* Copyright (c) 2013, Cisco Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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//mb_cache.h
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#ifndef WELS_MACROBLOCK_CACHE_H__
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#define WELS_MACROBLOCK_CACHE_H__
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#include "typedefs.h"
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#include "wels_common_basis.h"
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#include "wels_const.h"
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#include "macros.h"
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namespace WelsSVCEnc {
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/*
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* MB Cache information, such one cache should be defined within a slice
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*/
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/*
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* Cache for Luma Cache for Chroma(Cb, Cr)
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*
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* TL T T T T TL T T
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* L - - - - L - -
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* L - - - - L - - TR
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* L - - - -
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* L - - - - TR
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*
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*/
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////////////////////////mapping scan index////////////////////////
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extern const uint8_t g_kuiSmb4AddrIn256[16];
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extern const uint8_t g_kuiMbCountScan4Idx[24];
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extern const uint8_t g_kuiCache30ScanIdx[16];
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extern const uint8_t g_kuiCache12_8x8RefIdx[4];
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extern const uint8_t g_kuiCache48CountScan4Idx[24];
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typedef struct TagDCTCoeff {
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//ALIGNED_DECLARE( int16_t, residual_ac[16], 16 ); //I_16x16
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int16_t iLumaBlock[16][16]; //based on block4x4 luma DC/AC
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//ALIGNED_DECLARE( int16_t, iLumaI16x16Dc[16], 16 ); //I_16x16 DC
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int16_t iLumaI16x16Dc[16];
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//ALIGNED_DECLARE( int16_t, iChromaDc[2][4], 16 ); //chroma DC
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int16_t iChromaBlock[8][16]; //based on block4x4 chroma DC/AC
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int16_t iChromaDc[2][4];
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} SDCTCoeff ;
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typedef struct TagMbCache {
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//the followed pData now is promised aligned to 16 bytes
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ALIGNED_DECLARE (SMVComponentUnit, sMvComponents, 16);
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ALIGNED_DECLARE_MATRIX_1D (iNonZeroCoeffCount, 48, int8_t, 16); // Cache line size
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// int8_t iNonZeroCoeffCount[6 * 8]; // Right luma, Chroma(Left Top Cb, Left btm Cr); must follow by iIntraPredMode!
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ALIGNED_DECLARE_MATRIX_1D (iIntraPredMode, 48, int8_t, 16);
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// must follow with iNonZeroCoeffCount!
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int32_t iSadCost[4]; //avail 1; unavail 0
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SMVUnitXY sMbMvp[MB_BLOCK8x8_NUM];// for write bs
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//for residual decoding (recovery) at the side of Encoder
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int16_t* pCoeffLevel; // tmep
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//malloc memory for prediction
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uint8_t* pSkipMb;
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//ALIGNED_DECLARE(uint8_t, pMemPredMb[2][256], 16);//One: Best I_16x16 Luma and refine frac_pixel pBuffer; another: PingPong I_8x8&&Inter Cb + Cr
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uint8_t* pMemPredMb;
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uint8_t* pMemPredLuma;// inter && intra share same pointer;
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//ALIGNED_DECLARE(uint8_t, pMemPredChroma[2][64*2], 16); //another PingPong pBuffer: Best Cb + Cr;
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uint8_t* pMemPredChroma;// inter && intra share same pointer;
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uint8_t* pBestPredIntraChroma; //Cb:0~63; Cr:64~127
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//ALIGNED_DECLARE(uint8_t, pMemPredBlk4[2][16], 16); //I_4x4
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uint8_t* pMemPredBlk4;
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uint8_t* pBestPredI4x4Blk4;//I_4x4
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//ALIGNED_DECLARE(uint8_t, pBufferInterPredMe[4][400], 16);//inter type pBuffer for ME h & v & hv
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uint8_t* pBufferInterPredMe; // [4][400] is enough because only h&v or v&hv or h&hv. but if both h&v&hv is needed when 8 quart pixel, future we have to use [5][400].
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//no scan4[] order, just as memory order to store
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//ALIGNED_DECLARE(bool, pPrevIntra4x4PredModeFlag[16], 16);//if 1, means no rem_intra4x4_pred_mode; if 0, means rem_intra4x4_pred_mode != 0
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bool* pPrevIntra4x4PredModeFlag;
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//ALIGNED_DECLARE(int8_t, pRemIntra4x4PredModeFlag[16], 16);//-1 as default; if pPrevIntra4x4PredModeFlag==0,
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//pRemIntra4x4PredModeFlag or added by 1 is the best pred_mode
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int8_t* pRemIntra4x4PredModeFlag;
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int32_t iSadCostSkip[4]; //avail 1; unavail 0
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bool bMbTypeSkip[4]; //1: skip; 0: non-skip
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int32_t* pEncSad;
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//for residual encoding at the side of Encoder
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SDCTCoeff* pDct;
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uint8_t uiNeighborIntra; // LEFT_MB_POS:0x01, TOP_MB_POS:0x02, TOPLEFT_MB_POS = 0x04 ,TOPRIGHT_MB_POS = 0x08;
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uint8_t uiLumaI16x16Mode;
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uint8_t uiChmaI8x8Mode;
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bool bCollocatedPredFlag;//denote if current MB is collocated predicted (MV==0).
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uint32_t uiRefMbType;
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struct {
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/* pointer of current mb location in original frame */
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uint8_t* pEncMb[3];
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/* pointer of current mb location in recovery frame */
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uint8_t* pDecMb[3];
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/* pointer of co-located mb location in reference frame */
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uint8_t* pRefMb[3];
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//for SVC
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uint8_t* pCsMb[3];//locating current mb's CS in whole frame
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// int16_t *p_rs[3];//locating current mb's RS in whole frame
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} SPicData;
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} SMbCache;
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}//end of namespace
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#endif//WELS_MACROBLOCK_CACHE_H__
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