4633626d69
This isn't necessary any longer, when all the assembly routines take care of restoring registers as necessary.
294 lines
8.7 KiB
C++
294 lines
8.7 KiB
C++
/*!
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* \copy
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* Copyright (c) 2009-2013, Cisco Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*
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* \file cpu.cpp
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*
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* \brief CPU compatibility detection
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*
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* \date 04/29/2009 Created
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*
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*************************************************************************************
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*/
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#include <string.h>
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#include <stdio.h>
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#ifdef ANDROID_NDK
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#include <cpu-features.h>
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#endif
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#include "cpu.h"
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#include "cpu_core.h"
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#define CPU_Vendor_AMD "AuthenticAMD"
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#define CPU_Vendor_INTEL "GenuineIntel"
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#define CPU_Vendor_CYRIX "CyrixInstead"
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#if defined(X86_ASM)
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uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) {
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uint32_t uiCPU = 0;
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uint32_t uiFeatureA = 0, uiFeatureB = 0, uiFeatureC = 0, uiFeatureD = 0;
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int32_t CacheLineSize = 0;
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int8_t chVendorName[16] = { 0 };
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uint32_t uiMaxCpuidLevel = 0;
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if (!WelsCPUIdVerify()) {
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/* cpuid is not supported in cpu */
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return 0;
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}
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WelsCPUId (0, &uiFeatureA, (uint32_t*)&chVendorName[0], (uint32_t*)&chVendorName[8], (uint32_t*)&chVendorName[4]);
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uiMaxCpuidLevel = uiFeatureA;
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if (uiMaxCpuidLevel == 0) {
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/* maximum input value for basic cpuid information */
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return 0;
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}
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WelsCPUId (1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD);
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if ((uiFeatureD & 0x00800000) == 0) {
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/* Basic MMX technology is not support in cpu, mean nothing for us so return here */
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return 0;
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}
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uiCPU = WELS_CPU_MMX;
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if (uiFeatureD & 0x02000000) {
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/* SSE technology is identical to AMD MMX extensions */
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uiCPU |= WELS_CPU_MMXEXT | WELS_CPU_SSE;
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}
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if (uiFeatureD & 0x04000000) {
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/* SSE2 support here */
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uiCPU |= WELS_CPU_SSE2;
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}
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if (uiFeatureD & 0x00000001) {
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/* x87 FPU on-chip checking */
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uiCPU |= WELS_CPU_FPU;
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}
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if (uiFeatureD & 0x00008000) {
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/* CMOV instruction checking */
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uiCPU |= WELS_CPU_CMOV;
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}
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if ((!strcmp ((const char*)chVendorName, CPU_Vendor_INTEL)) ||
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(!strcmp((const char*)chVendorName, CPU_Vendor_AMD)) ) { // confirmed_safe_unsafe_usage
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if (uiFeatureD & 0x10000000) {
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/* Multi-Threading checking: contains of multiple logic processors */
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uiCPU |= WELS_CPU_HTT;
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}
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}
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if (uiFeatureC & 0x00000001) {
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/* SSE3 support here */
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uiCPU |= WELS_CPU_SSE3;
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}
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if (uiFeatureC & 0x00000200) {
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/* SSSE3 support here */
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uiCPU |= WELS_CPU_SSSE3;
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}
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if (uiFeatureC & 0x00080000) {
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/* SSE4.1 support here, 45nm Penryn processor */
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uiCPU |= WELS_CPU_SSE41;
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}
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if (uiFeatureC & 0x00100000) {
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/* SSE4.2 support here, next generation Nehalem processor */
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uiCPU |= WELS_CPU_SSE42;
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}
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if (WelsCPUSupportAVX (uiFeatureA, uiFeatureC)) {
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/* AVX supported */
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uiCPU |= WELS_CPU_AVX;
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}
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if (WelsCPUSupportFMA (uiFeatureA, uiFeatureC)) {
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/* AVX FMA supported */
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uiCPU |= WELS_CPU_FMA;
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}
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if (uiFeatureC & 0x02000000) {
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/* AES checking */
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uiCPU |= WELS_CPU_AES;
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}
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if (uiFeatureC & 0x00400000) {
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/* MOVBE checking */
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uiCPU |= WELS_CPU_MOVBE;
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}
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if( pNumberOfLogicProcessors != NULL ){
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if( uiCPU & WELS_CPU_HTT){
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*pNumberOfLogicProcessors = (uiFeatureB & 0x00ff0000) >> 16; // feature bits: 23-16 on returned EBX
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} else {
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*pNumberOfLogicProcessors = 0;
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}
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if( !strcmp((const char*)chVendorName, CPU_Vendor_INTEL) ){
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if( uiMaxCpuidLevel >= 4 ){
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uiFeatureC = 0;
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WelsCPUId(0x4, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD);
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if( uiFeatureA != 0 ){
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*pNumberOfLogicProcessors = ((uiFeatureA&0xfc000000)>>26) + 1;
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}
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}
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}
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}
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WelsCPUId (0x80000000, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD);
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if ((!strcmp ((const char*)chVendorName, CPU_Vendor_AMD))
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&& (uiFeatureA >= 0x80000001)) { // confirmed_safe_unsafe_usage
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WelsCPUId (0x80000001, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD);
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if (uiFeatureD & 0x00400000) {
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uiCPU |= WELS_CPU_MMXEXT;
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}
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if (uiFeatureD & 0x80000000) {
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uiCPU |= WELS_CPU_3DNOW;
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}
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}
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if (!strcmp ((const char*)chVendorName, CPU_Vendor_INTEL)) { // confirmed_safe_unsafe_usage
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int32_t family, model;
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WelsCPUId (1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD);
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family = ((uiFeatureA >> 8) & 0xf) + ((uiFeatureA >> 20) & 0xff);
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model = ((uiFeatureA >> 4) & 0xf) + ((uiFeatureA >> 12) & 0xf0);
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if ((family == 6) && (model == 9 || model == 13 || model == 14)) {
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uiCPU &= ~ (WELS_CPU_SSE2 | WELS_CPU_SSE3);
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}
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}
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// get cache line size
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if ((!strcmp ((const char*)chVendorName, CPU_Vendor_INTEL))
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|| ! (strcmp ((const char*)chVendorName, CPU_Vendor_CYRIX))) { // confirmed_safe_unsafe_usage
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WelsCPUId (1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD);
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CacheLineSize = (uiFeatureB & 0xff00) >>
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5; // ((clflush_line_size >> 8) << 3), CLFLUSH_line_size * 8 = CacheLineSize_in_byte
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if (CacheLineSize == 128) {
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uiCPU |= WELS_CPU_CACHELINE_128;
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} else if (CacheLineSize == 64) {
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uiCPU |= WELS_CPU_CACHELINE_64;
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} else if (CacheLineSize == 32) {
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uiCPU |= WELS_CPU_CACHELINE_32;
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} else if (CacheLineSize == 16) {
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uiCPU |= WELS_CPU_CACHELINE_16;
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}
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}
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return uiCPU;
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}
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void WelsCPURestore (const uint32_t kuiCPU) {
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if (kuiCPU & (WELS_CPU_MMX | WELS_CPU_MMXEXT | WELS_CPU_3DNOW | WELS_CPU_3DNOWEXT)) {
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WelsEmms();
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}
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}
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#elif defined(HAVE_NEON) //For supporting both android platform and iOS platform
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#if defined(ANDROID_NDK)
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uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors)
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{
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uint32_t uiCPU = 0;
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AndroidCpuFamily cpuFamily = ANDROID_CPU_FAMILY_UNKNOWN;
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uint64_t uiFeatures = 0;
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cpuFamily = android_getCpuFamily();
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if (cpuFamily == ANDROID_CPU_FAMILY_ARM) {
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uiFeatures = android_getCpuFeatures();
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if (uiFeatures & ANDROID_CPU_ARM_FEATURE_ARMv7){
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uiCPU |= WELS_CPU_ARMv7;
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}
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if (uiFeatures & ANDROID_CPU_ARM_FEATURE_VFPv3){
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uiCPU |= WELS_CPU_VFPv3;
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}
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if (uiFeatures & ANDROID_CPU_ARM_FEATURE_NEON){
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uiCPU |= WELS_CPU_NEON;
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}
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}
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if( pNumberOfLogicProcessors != NULL ){
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*pNumberOfLogicProcessors = android_getCpuCount();
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}
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return uiCPU;
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}
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#elif defined(APPLE_IOS)
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uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors)
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{
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uint32_t uiCPU = 0;
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#if defined(__ARM_NEON__)
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uiCPU |= WELS_CPU_ARMv7;
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uiCPU |= WELS_CPU_VFPv3;
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uiCPU |= WELS_CPU_NEON;
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#endif
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return uiCPU;
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}
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#elif defined(__linux__)
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/* Generic arm/linux cpu feature detection */
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uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) {
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FILE *f = fopen("/proc/cpuinfo", "r");
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if (!f)
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return 0;
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char buf[200];
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int flags = 0;
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while (fgets(buf, sizeof(buf), f)) {
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if (!strncmp(buf, "Features", strlen("Features"))) {
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if (strstr(buf, " neon "))
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flags |= WELS_CPU_NEON;
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if (strstr(buf, " vfpv3 "))
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flags |= WELS_CPU_VFPv3;
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break;
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}
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}
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fclose(f);
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return flags;
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}
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#else /* HAVE_NEON enabled but no runtime detection */
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/* No runtime feature detection available, but built with HAVE_NEON - assume
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* that NEON and all associated features are available. */
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uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) {
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return WELS_CPU_ARMv7 |
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WELS_CPU_VFPv3 |
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WELS_CPU_NEON;
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}
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#endif
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#else /* Neither X86_ASM nor HAVE_NEON */
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uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) {
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return 0;
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}
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#endif
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