Fix indentation to consistently use spaces instead of tabs
Also get rid of other stray tabs in scripts.
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@ -304,7 +304,7 @@ void McHorVer22Width5HorFirst_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uin
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void McHorVer22Width4VerLastAlign_sse2 (const uint8_t* pTap, int32_t iTapStride, uint8_t* pDst, int32_t iDstStride,
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void McHorVer22Width4VerLastAlign_sse2 (const uint8_t* pTap, int32_t iTapStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight);
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int32_t iWidth, int32_t iHeight);
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void McHorVer22Width4VerLastUnAlign_sse2 (const uint8_t* pTap, int32_t iTapStride, uint8_t* pDst, int32_t iDstStride,
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void McHorVer22Width4VerLastUnAlign_sse2 (const uint8_t* pTap, int32_t iTapStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight);
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int32_t iWidth, int32_t iHeight);
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//***************************************************************************//
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//***************************************************************************//
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// SSSE3 definition //
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// SSSE3 definition //
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@ -401,36 +401,36 @@ static inline void McHorVer22WidthEq16_sse2 (const uint8_t* pSrc, int32_t iSrcSt
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}
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}
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void McHorVer20Width5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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void McHorVer20Width5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight) {
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int32_t iWidth, int32_t iHeight) {
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if (iWidth == 17 || iWidth == 9)
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if (iWidth == 17 || iWidth == 9)
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McHorVer20Width9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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McHorVer20Width9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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else //if (iWidth == 5)
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else //if (iWidth == 5)
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McHorVer20Width5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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McHorVer20Width5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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}
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}
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void McHorVer02Height5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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void McHorVer02Height5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight) {
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int32_t iWidth, int32_t iHeight) {
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if (iWidth == 16 || iWidth == 8)
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if (iWidth == 16 || iWidth == 8)
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McHorVer02Height9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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McHorVer02Height9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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else //if (iWidth == 4)
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else //if (iWidth == 4)
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McHorVer02Height5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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McHorVer02Height5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
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}
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}
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void McHorVer22Width5Or9Or17Height5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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void McHorVer22Width5Or9Or17Height5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight) {
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int32_t iWidth, int32_t iHeight) {
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ENFORCE_STACK_ALIGN_2D (int16_t, pTap, 22, 24, 16)
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ENFORCE_STACK_ALIGN_2D (int16_t, pTap, 22, 24, 16)
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if (iWidth == 17 || iWidth == 9){
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if (iWidth == 17 || iWidth == 9){
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int32_t tmp1 = 2 * (iWidth - 8);
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int32_t tmp1 = 2 * (iWidth - 8);
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McHorVer22HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
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McHorVer22HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
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McHorVer22Width8VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
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McHorVer22Width8VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
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McHorVer22Width8VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 8, iDstStride, 8, iHeight);
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McHorVer22Width8VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 8, iDstStride, 8, iHeight);
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}
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}
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else{ //if(iWidth == 5)
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else{ //if(iWidth == 5)
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int32_t tmp1 = 2 * (iWidth - 4);
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int32_t tmp1 = 2 * (iWidth - 4);
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McHorVer22Width5HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
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McHorVer22Width5HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
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McHorVer22Width4VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
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McHorVer22Width4VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
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McHorVer22Width4VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 4, iDstStride, 4, iHeight);
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McHorVer22Width4VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 4, iDstStride, 4, iHeight);
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}
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}
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}
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}
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@ -46,7 +46,7 @@
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#define MIN_REF_PIC_COUNT 1 // minimal count number of reference pictures, 1 short + 2 key reference based?
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#define MIN_REF_PIC_COUNT 1 // minimal count number of reference pictures, 1 short + 2 key reference based?
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#define MAX_SHORT_REF_COUNT 16 // maximal count number of short reference pictures
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#define MAX_SHORT_REF_COUNT 16 // maximal count number of short reference pictures
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#define MAX_LONG_REF_COUNT 16 // maximal count number of long reference pictures
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#define MAX_LONG_REF_COUNT 16 // maximal count number of long reference pictures
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#define MAX_DPB_COUNT (MAX_REF_PIC_COUNT + 1) // 1 additional position for re-order and other process
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#define MAX_DPB_COUNT (MAX_REF_PIC_COUNT + 1) // 1 additional position for re-order and other process
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#define MAX_MMCO_COUNT 66
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#define MAX_MMCO_COUNT 66
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@ -1008,7 +1008,7 @@ int32_t FiredSliceThreads (sWelsEncCtx* pCtx, SSliceThreadPrivateData* pPriData,
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iIdx = 0;
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iIdx = 0;
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while (iIdx < kiEventCnt) {
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while (iIdx < kiEventCnt) {
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pPriData[iIdx].pFrameBsInfo = pFrameBsInfo;
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pPriData[iIdx].pFrameBsInfo = pFrameBsInfo;
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pPriData[iIdx].iSliceIndex = iIdx;
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pPriData[iIdx].iSliceIndex = iIdx;
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SetOneSliceBsBufferUnderMultithread (pCtx, iIdx, iIdx);
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SetOneSliceBsBufferUnderMultithread (pCtx, iIdx, iIdx);
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if (pEventsList[iIdx])
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if (pEventsList[iIdx])
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@ -342,20 +342,20 @@ WELS_ASM_FUNC_BEGIN DyadicBilinearOneThirdDownsampler_neon
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stmdb sp!, {r4-r8, lr}
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stmdb sp!, {r4-r8, lr}
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//Get the width and height
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//Get the width and height
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ldr r4, [sp, #24] //src_width
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ldr r4, [sp, #24] //src_width
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ldr r5, [sp, #28] //src_height
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ldr r5, [sp, #28] //src_height
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//Initialize the register
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//Initialize the register
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mov r6, r2
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mov r6, r2
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mov r8, r0
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mov r8, r0
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mov lr, #0
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mov lr, #0
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//Save the tailer for the un-aligned size
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//Save the tailer for the un-aligned size
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mla r7, r1, r5, r0
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mla r7, r1, r5, r0
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vld1.32 {q15}, [r7]
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vld1.32 {q15}, [r7]
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add r7, r2, r3
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add r7, r2, r3
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//processing a colume data
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//processing a colume data
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comp_ds_bilinear_onethird_loop0:
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comp_ds_bilinear_onethird_loop0:
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vld3.8 {d0, d1, d2}, [r2]!
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vld3.8 {d0, d1, d2}, [r2]!
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@ -389,10 +389,10 @@ comp_ds_bilinear_onethird_loop0:
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addcs r8, r1
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addcs r8, r1
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movcs r0, r8
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movcs r0, r8
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subscs r5, #1
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subscs r5, #1
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bne comp_ds_bilinear_onethird_loop0
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bne comp_ds_bilinear_onethird_loop0
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//restore the tailer for the un-aligned size
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//restore the tailer for the un-aligned size
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vst1.32 {q15}, [r0]
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vst1.32 {q15}, [r0]
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ldmia sp!, {r4-r8,lr}
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ldmia sp!, {r4-r8,lr}
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WELS_ASM_FUNC_END
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WELS_ASM_FUNC_END
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@ -401,26 +401,26 @@ WELS_ASM_FUNC_BEGIN DyadicBilinearQuarterDownsampler_neon
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stmdb sp!, {r4-r8, lr}
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stmdb sp!, {r4-r8, lr}
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//Get the width and height
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//Get the width and height
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ldr r4, [sp, #24] //src_width
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ldr r4, [sp, #24] //src_width
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ldr r5, [sp, #28] //src_height
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ldr r5, [sp, #28] //src_height
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//Initialize the register
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//Initialize the register
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mov r6, r2
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mov r6, r2
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mov r8, r0
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mov r8, r0
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mov lr, #0
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mov lr, #0
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lsr r5, #2
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lsr r5, #2
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//Save the tailer for the un-aligned size
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//Save the tailer for the un-aligned size
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mla r7, r1, r5, r0
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mla r7, r1, r5, r0
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vld1.32 {q15}, [r7]
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vld1.32 {q15}, [r7]
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add r7, r2, r3
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add r7, r2, r3
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//processing a colume data
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//processing a colume data
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comp_ds_bilinear_quarter_loop0:
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comp_ds_bilinear_quarter_loop0:
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vld2.16 {q0, q1}, [r2]!
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vld2.16 {q0, q1}, [r2]!
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vld2.16 {q2, q3}, [r2]!
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vld2.16 {q2, q3}, [r2]!
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vld2.16 {q8, q9}, [r7]!
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vld2.16 {q8, q9}, [r7]!
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vld2.16 {q10, q11}, [r7]!
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vld2.16 {q10, q11}, [r7]!
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vpaddl.u8 q0, q0
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vpaddl.u8 q0, q0
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@ -447,10 +447,10 @@ comp_ds_bilinear_quarter_loop0:
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addcs r8, r1
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addcs r8, r1
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movcs r0, r8
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movcs r0, r8
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subscs r5, #1
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subscs r5, #1
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bne comp_ds_bilinear_quarter_loop0
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bne comp_ds_bilinear_quarter_loop0
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//restore the tailer for the un-aligned size
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//restore the tailer for the un-aligned size
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vst1.32 {q15}, [r0]
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vst1.32 {q15}, [r0]
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ldmia sp!, {r4-r8,lr}
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ldmia sp!, {r4-r8,lr}
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WELS_ASM_FUNC_END
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WELS_ASM_FUNC_END
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@ -66,11 +66,11 @@ typedef HalveDownsampleFunc* PHalveDownsampleFunc;
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typedef SpecificDownsampleFunc* PSpecificDownsampleFunc;
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typedef SpecificDownsampleFunc* PSpecificDownsampleFunc;
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typedef GeneralDownsampleFunc* PGeneralDownsampleFunc;
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typedef GeneralDownsampleFunc* PGeneralDownsampleFunc;
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HalveDownsampleFunc DyadicBilinearDownsampler_c;
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HalveDownsampleFunc DyadicBilinearDownsampler_c;
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GeneralDownsampleFunc GeneralBilinearFastDownsampler_c;
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GeneralDownsampleFunc GeneralBilinearFastDownsampler_c;
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GeneralDownsampleFunc GeneralBilinearAccurateDownsampler_c;
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GeneralDownsampleFunc GeneralBilinearAccurateDownsampler_c;
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SpecificDownsampleFunc DyadicBilinearOneThirdDownsampler_c;
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SpecificDownsampleFunc DyadicBilinearOneThirdDownsampler_c;
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SpecificDownsampleFunc DyadicBilinearQuarterDownsampler_c;
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SpecificDownsampleFunc DyadicBilinearQuarterDownsampler_c;
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typedef struct {
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typedef struct {
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// align_index: 0 = x32; 1 = x16; 2 = x8; 3 = common case left;
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// align_index: 0 = x32; 1 = x16; 2 = x8; 3 = common case left;
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@ -60,7 +60,7 @@ runEncoderCommandInital()
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-sw -sh "-dw 0" "-dh 0" "-dw 1" "-dh 1" "-dw 2" "-dh 2" "-dw 3" "-dh 3" \
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-sw -sh "-dw 0" "-dh 0" "-dw 1" "-dh 1" "-dw 2" "-dh 2" "-dw 3" "-dh 3" \
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"-frout 0" "-frout 1" "-frout 2" "-frout 3" \
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"-frout 0" "-frout 1" "-frout 2" "-frout 3" \
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"-lqp 0" "-lqp 1" "-lqp 2" "-lqp 3" \
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"-lqp 0" "-lqp 1" "-lqp 2" "-lqp 3" \
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-rc -fs -tarb "-ltarb 0" "-ltarb 1" "-ltarb 2" "-ltarb 3" \
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-rc -fs -tarb "-ltarb 0" "-ltarb 1" "-ltarb 2" "-ltarb 3" \
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"-slcmd 0" "-slcnum 0" "-slcmd 1" "-slcnum 1"\
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"-slcmd 0" "-slcnum 0" "-slcmd 1" "-slcnum 1"\
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"-slcmd 2" "-slcnum 2" "-slcmd 3" "-slcnum 3"\
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"-slcmd 2" "-slcnum 2" "-slcmd 3" "-slcnum 3"\
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-nalsize \
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-nalsize \
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@ -71,7 +71,7 @@ runEncoderCommandInital()
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sw sh dw0 dh0 dw1 dh1 dw2 dh2 dw3 dh3 \
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sw sh dw0 dh0 dw1 dh1 dw2 dh2 dw3 dh3 \
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frout0 frout1 frout2 frout3 \
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frout0 frout1 frout2 frout3 \
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lqp0 lqp1 lqp2 lqp3 \
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lqp0 lqp1 lqp2 lqp3 \
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rc FrSkip tarb ltarb0 ltarb1 ltarb2 ltarb3 \
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rc FrSkip tarb ltarb0 ltarb1 ltarb2 ltarb3 \
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slcmd0 slcnum0 slcmd1 slcnum1 \
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slcmd0 slcnum0 slcmd1 slcnum1 \
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slcmd2 slcnum2 slcmd3 slcnum3 \
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slcmd2 slcnum2 slcmd3 slcnum3 \
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MaxNalSZ \
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MaxNalSZ \
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