From 9199798f22b984363476b90bc62d27c2752643e3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Storsj=C3=B6?= Date: Fri, 14 Mar 2014 10:13:18 +0200 Subject: [PATCH] Fix a typo in a macro name, EXTENTION -> EXTENSION --- codec/common/asm_inc.asm | 2 +- codec/common/deblock.asm | 4 +- codec/common/expand_picture.asm | 18 +++---- codec/common/satd_sad.asm | 84 +++++++++++++++--------------- codec/common/vaa.asm | 4 +- codec/encoder/core/asm/memzero.asm | 6 +-- codec/processing/src/asm/vaa.asm | 34 ++++++------ 7 files changed, 76 insertions(+), 76 deletions(-) diff --git a/codec/common/asm_inc.asm b/codec/common/asm_inc.asm index 8696b0a6..252131d1 100644 --- a/codec/common/asm_inc.asm +++ b/codec/common/asm_inc.asm @@ -329,7 +329,7 @@ BITS 32 %endif %endmacro -%macro SIGN_EXTENTION 2 +%macro SIGN_EXTENSION 2 %ifndef X86_32 movsx %1, %2 %endif diff --git a/codec/common/deblock.asm b/codec/common/deblock.asm index 4f9314ff..7a37af5f 100644 --- a/codec/common/deblock.asm +++ b/codec/common/deblock.asm @@ -5185,7 +5185,7 @@ DeblockLumaTransposeH2V_sse2: %assign push_num 3 LOAD_3_PARA - SIGN_EXTENTION r1, r1d + SIGN_EXTENSION r1, r1d mov r5, r7 mov r3, r7 @@ -5263,7 +5263,7 @@ DeblockLumaTransposeV2H_sse2: %assign push_num 2 LOAD_3_PARA - SIGN_EXTENTION r1, r1d + SIGN_EXTENSION r1, r1d mov r4, r7 mov r3, r7 diff --git a/codec/common/expand_picture.asm b/codec/common/expand_picture.asm index 3d93f602..10bf96a6 100644 --- a/codec/common/expand_picture.asm +++ b/codec/common/expand_picture.asm @@ -376,9 +376,9 @@ ExpandPictureLuma_sse2: %assign push_num 3 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r2, r2d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r2, r2d + SIGN_EXTENSION r3, r3d ;also prepare for cross border pData top-left:xmm3 @@ -503,9 +503,9 @@ ExpandPictureChromaAlign_sse2: %assign push_num 3 LOAD_4_PARA - SIGN_EXTENTION r1,r1d - SIGN_EXTENTION r2,r2d - SIGN_EXTENTION r3,r3d + SIGN_EXTENSION r1,r1d + SIGN_EXTENSION r2,r2d + SIGN_EXTENSION r3,r3d ;also prepare for cross border pData top-left:xmm3 @@ -628,9 +628,9 @@ ExpandPictureChromaUnalign_sse2: %assign push_num 3 LOAD_4_PARA - SIGN_EXTENTION r1,r1d - SIGN_EXTENTION r2,r2d - SIGN_EXTENTION r3,r3d + SIGN_EXTENSION r1,r1d + SIGN_EXTENSION r2,r2d + SIGN_EXTENSION r3,r3d ;also prepare for cross border pData top-left:xmm3 diff --git a/codec/common/satd_sad.asm b/codec/common/satd_sad.asm index 1c7f2faf..6872fcf3 100644 --- a/codec/common/satd_sad.asm +++ b/codec/common/satd_sad.asm @@ -166,8 +166,8 @@ WelsSampleSatd4x4_sse2: %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d movd xmm0, [r0] movd xmm1, [r0+r1] lea r0 , [r0+2*r1] @@ -246,8 +246,8 @@ align 16 %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm6, xmm6 pxor xmm7, xmm7 SSE2_GetSatd8x8 @@ -273,8 +273,8 @@ align 16 %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm6, xmm6 pxor xmm7, xmm7 @@ -305,8 +305,8 @@ WelsSampleSatd16x8_sse2: %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d push r0 push r2 pxor xmm6, xmm6 @@ -344,8 +344,8 @@ WelsSampleSatd16x16_sse2: %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d push r0 push r2 pxor xmm6, xmm6 @@ -1030,8 +1030,8 @@ WelsSampleSatd4x4_sse41: %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d movdqa xmm4,[HSwapSumSubDB1] movd xmm2,[r2] movd xmm5,[r2+r3] @@ -1095,8 +1095,8 @@ WelsSampleSatd8x8_sse41: %endif %assign push_num 2 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d movdqa xmm7, [HSumSubDB1] lea r4, [r1+r1*2] lea r5, [r3+r3*2] @@ -1137,8 +1137,8 @@ WelsSampleSatd8x16_sse41: %endif %assign push_num 3 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d movdqa xmm7, [HSumSubDB1] lea r4, [r1+r1*2] lea r5, [r3+r3*2] @@ -1181,8 +1181,8 @@ WelsSampleSatd16x8_sse41: %endif %assign push_num 2 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d push r0 push r2 @@ -1238,8 +1238,8 @@ WelsSampleSatd16x16_sse41: %endif %assign push_num 3 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d push r0 push r2 @@ -1370,8 +1370,8 @@ WelsSampleSad16x16_sse2: %assign push_num 2 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d lea r4, [3*r1] lea r5, [3*r3] @@ -1414,8 +1414,8 @@ WelsSampleSad16x8_sse2: %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d movdqu xmm0, [r2] MOVDQ xmm2, [r0] psadbw xmm0, xmm2 @@ -1446,8 +1446,8 @@ WelsSampleSad8x16_sse2: %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm6, xmm6 SSE2_GetSad8x4 @@ -1498,7 +1498,7 @@ WelsSampleSad8x8_sse21: %assign push_num 3 mov r0, arg1 mov r1, arg2 - SIGN_EXTENTION r1, r1d + SIGN_EXTENSION r1, r1d pxor xmm7, xmm7 ;ecx r2, edx r4, edi r5 @@ -1516,7 +1516,7 @@ WelsSampleSad8x8_sse21: mov r5, 8 add r5, r2 mov r3, arg4 - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r3, r3d movq xmm0, [r0] movhps xmm0, [r0+r1] @@ -1604,8 +1604,8 @@ WelsSampleSad8x8_sse21: pop r2 %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm6, xmm6 SSE2_GetSad8x4 lea r0, [r0+2*r1] @@ -1655,8 +1655,8 @@ WelsSampleSadFour16x16_sse2: %assign push_num 0 LOAD_5_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm4, xmm4 ;sad pRefMb-i_stride_ref pxor xmm5, xmm5 ;sad pRefMb+i_stride_ref pxor xmm6, xmm6 ;sad pRefMb-1 @@ -1781,8 +1781,8 @@ WelsSampleSadFour16x8_sse2: %assign push_num 0 LOAD_5_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm4, xmm4 ;sad pRefMb-i_stride_ref pxor xmm5, xmm5 ;sad pRefMb+i_stride_ref pxor xmm6, xmm6 ;sad pRefMb-1 @@ -1874,8 +1874,8 @@ WelsSampleSadFour8x16_sse2: %assign push_num 0 LOAD_5_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm4, xmm4 ;sad pRefMb-i_stride_ref pxor xmm5, xmm5 ;sad pRefMb+i_stride_ref pxor xmm6, xmm6 ;sad pRefMb-1 @@ -2094,8 +2094,8 @@ WelsSampleSadFour8x8_sse2: %assign push_num 0 LOAD_5_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d pxor xmm4, xmm4 ;sad pRefMb-i_stride_ref pxor xmm5, xmm5 ;sad pRefMb+i_stride_ref pxor xmm6, xmm6 ;sad pRefMb-1 @@ -2222,8 +2222,8 @@ WelsSampleSadFour4x4_sse2: %assign push_num 0 LOAD_5_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d movd xmm0, [r0] movd xmm1, [r0+r1] lea r0, [r0+2*r1] @@ -2313,8 +2313,8 @@ WelsSampleSad4x4_mmx: %assign push_num 0 LOAD_4_PARA - SIGN_EXTENTION r1, r1d - SIGN_EXTENTION r3, r3d + SIGN_EXTENSION r1, r1d + SIGN_EXTENSION r3, r3d movd mm0, [r0] movd mm1, [r0+r1] punpckldq mm0, mm1 diff --git a/codec/common/vaa.asm b/codec/common/vaa.asm index 69901f18..1f0ae485 100644 --- a/codec/common/vaa.asm +++ b/codec/common/vaa.asm @@ -161,7 +161,7 @@ AnalysisVaaInfoIntra_sse2: %assign push_num 0 LOAD_2_PARA - SIGN_EXTENTION r1,r1d + SIGN_EXTENSION r1,r1d %ifdef X86_32 push r3 @@ -256,7 +256,7 @@ AnalysisVaaInfoIntra_ssse3: %assign push_num 0 LOAD_2_PARA - SIGN_EXTENTION r1,r1d + SIGN_EXTENSION r1,r1d %ifdef X86_32 push r3 diff --git a/codec/encoder/core/asm/memzero.asm b/codec/encoder/core/asm/memzero.asm index d1724fa8..3a21817e 100644 --- a/codec/encoder/core/asm/memzero.asm +++ b/codec/encoder/core/asm/memzero.asm @@ -69,7 +69,7 @@ WelsSetMemZeroAligned64_sse2: %assign push_num 0 LOAD_2_PARA - SIGN_EXTENTION r1, r1d + SIGN_EXTENSION r1, r1d neg r1 pxor xmm0, xmm0 @@ -94,7 +94,7 @@ WelsSetMemZeroSize64_mmx: %assign push_num 0 LOAD_2_PARA - SIGN_EXTENTION r1, r1d + SIGN_EXTENSION r1, r1d neg r1 pxor mm0, mm0 @@ -124,7 +124,7 @@ WelsSetMemZeroSize8_mmx: %assign push_num 0 LOAD_2_PARA - SIGN_EXTENTION r1, r1d + SIGN_EXTENSION r1, r1d neg r1 pxor mm0, mm0 diff --git a/codec/processing/src/asm/vaa.asm b/codec/processing/src/asm/vaa.asm index 1bc3ba12..66283f8f 100644 --- a/codec/processing/src/asm/vaa.asm +++ b/codec/processing/src/asm/vaa.asm @@ -468,8 +468,8 @@ SampleVariance16x16_sse2: push r15 %assign push_num 4 LOAD_5_PARA - SIGN_EXTENTION r1,r1d - SIGN_EXTENTION r3,r3d + SIGN_EXTENSION r1,r1d + SIGN_EXTENSION r3,r3d mov r12,010h pxor xmm7, xmm7 @@ -570,9 +570,9 @@ VAACalcSad_sse2: push r13 %assign push_num 2 LOAD_7_PARA - SIGN_EXTENTION r2,r2d - SIGN_EXTENTION r3,r3d - SIGN_EXTENTION r4,r4d + SIGN_EXTENSION r2,r2d + SIGN_EXTENSION r3,r3d + SIGN_EXTENSION r4,r4d mov r12,r4 shr r2, 4 ; iPicWidth/16 @@ -813,9 +813,9 @@ VAACalcSadVar_sse2: mov r5, arg6 ;psad8x8 %endif mov r14,arg7 - SIGN_EXTENTION r2,r2d - SIGN_EXTENTION r3,r3d - SIGN_EXTENTION r4,r4d + SIGN_EXTENSION r2,r2d + SIGN_EXTENSION r3,r3d + SIGN_EXTENSION r4,r4d mov r13,r4 shr r2,4 @@ -1113,9 +1113,9 @@ VAACalcSadSsd_sse2: mov r4,arg5 %endif mov r14,arg7 - SIGN_EXTENTION r2,r2d - SIGN_EXTENTION r3,r3d - SIGN_EXTENTION r4,r4d + SIGN_EXTENSION r2,r2d + SIGN_EXTENSION r3,r3d + SIGN_EXTENSION r4,r4d mov r13,r4 shr r2,4 ; iPicWidth/16 @@ -1685,9 +1685,9 @@ VAACalcSadBgd_sse2: ; mov r5,arg6 %endif mov r14,arg7 - SIGN_EXTENTION r2,r2d - SIGN_EXTENTION r3,r3d - SIGN_EXTENTION r4,r4d + SIGN_EXTENSION r2,r2d + SIGN_EXTENSION r3,r3d + SIGN_EXTENSION r4,r4d mov r13,r4 @@ -1864,9 +1864,9 @@ VAACalcSadSsdBgd_sse2: mov r4,arg5 ;mov r5,arg6 %endif - SIGN_EXTENTION r2,r2d - SIGN_EXTENTION r3,r3d - SIGN_EXTENTION r4,r4d + SIGN_EXTENSION r2,r2d + SIGN_EXTENSION r3,r3d + SIGN_EXTENSION r4,r4d mov r13,r4 shr r2, 4 ; iPicWidth/16