Add new ARM AArch64 assembly functions to support sub8x8 mode
This commit is contained in:
Guangwei Wang
parent
9f0d51d8d2
commit
49b569a018
@ -1818,6 +1818,30 @@ w9_h_mc_luma_loop:
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN McHorVer20Width5_AArch64_neon
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sub x0, x0, #2
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sub x3, x3, #4
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mov x5, #4
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movi v0.8h, #20, lsl #0
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movi v1.8h, #5, lsl #0
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w5_h_mc_luma_loop:
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ld1 {v2.16b}, [x0], x1 //only use 10(5+5); v2=src[-2]
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ext v5.16b, v2.16b, v4.16b, #1 //v5=src[-1]
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ext v6.16b, v2.16b, v4.16b, #2 //v6=src[0]
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ext v7.16b, v2.16b, v4.16b, #3 //v7=src[1]
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ext v16.16b, v2.16b, v4.16b, #4 //v16=src[2]
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ext v17.16b, v2.16b, v4.16b, #5 //v17=src[3]
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FILTER_6TAG_8BITS1 v2, v5, v6, v7, v16, v17, v20, v0, v1
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st1 {v20.s}[0], [x2], x5 //write 4Byte
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st1 {v20.b}[4], [x2], x3 //write 5th Byte
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sub x4, x4, #1
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cbnz x4, w5_h_mc_luma_loop
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN McHorVer22Width17_AArch64_neon
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stp d8, d9, [sp,#-16]!
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stp d10, d11, [sp,#-16]!
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@ -2116,6 +2140,98 @@ w9_hv_mc_luma_loop:
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st1 {v26.b}[0], [x2], x3 //write 8th Byte : 0 line
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN McHorVer22Width5_AArch64_neon
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sub x0, x0, #2
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sub x0, x0, x1, lsl #1
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movi v0.8h, #20, lsl #0
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movi v1.8h, #5, lsl #0
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sub x3, x3, #4
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mov x5, #4
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ldr q29, filter_para
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sub x4, x4, #1
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//prfm pldl1strm, [x0]
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//prfm pldl1strm, [x0, x1]
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ld1 {v2.16b}, [x0], x1 // v2=src[-2*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v3.16b}, [x0], x1 // v5=src[-1*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v4.16b}, [x0], x1 // v8=src[0*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v5.16b}, [x0], x1 // v11=src[1*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v6.16b}, [x0], x1 // v14=src[2*stride]
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w5_hv_mc_luma_loop:
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//prfm pldl1strm, [x0, x1]
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ld1 {v7.16b}, [x0], x1 // v7=src[3*stride]
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// vertical filtered into v20/v21
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FILTER_6TAG_8BITS_TO_16BITS1 v2, v3, v4, v5, v6, v7, v20, v0, v1
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FILTER_6TAG_8BITS_TO_16BITS2 v2, v3, v4, v5, v6, v7, v21, v0, v1
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// horizon filtered
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UNPACK_2_16BITS_TO_ABC v20, v21, v23, v24, v25
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FILTER_3_IN_16BITS_TO_8BITS1 v23, v24, v25, v26 //output to v26[0]
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st1 {v26.s}[0], [x2], x5 //write 0:3Byte : 0 line
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st1 {v26.b}[4], [x2], x3 //write 5th Byte : 0 line
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//prfm pldl1strm, [x0, x1]
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ld1 {v2.16b}, [x0], x1 // v2=src[4*stride]
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// vertical filtered into v20/v21
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FILTER_6TAG_8BITS_TO_16BITS1 v3, v4, v5, v6, v7, v2, v20, v0, v1
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FILTER_6TAG_8BITS_TO_16BITS2 v3, v4, v5, v6, v7, v2, v21, v0, v1
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// horizon filtered
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UNPACK_2_16BITS_TO_ABC v20, v21, v23, v24, v25
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FILTER_3_IN_16BITS_TO_8BITS1 v23, v24, v25, v26 //output to v26[0]
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st1 {v26.s}[0], [x2], x5 //write 0:3Byte : 1 line
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st1 {v26.b}[4], [x2], x3 //write 5th Byte : 1 line
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//prfm pldl1strm, [x0, x1]
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ld1 {v3.16b}, [x0], x1 // v3=src[5*stride]
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// vertical filtered into v20/v21
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FILTER_6TAG_8BITS_TO_16BITS1 v4, v5, v6, v7, v2, v3, v20, v0, v1
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FILTER_6TAG_8BITS_TO_16BITS2 v4, v5, v6, v7, v2, v3, v21, v0, v1
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// horizon filtered
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UNPACK_2_16BITS_TO_ABC v20, v21, v23, v24, v25
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FILTER_3_IN_16BITS_TO_8BITS1 v23, v24, v25, v26 //output to v26[0]
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st1 {v26.s}[0], [x2], x5 //write 0:3Byte : 2 line
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st1 {v26.b}[4], [x2], x3 //write 5th Byte : 2 line
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//prfm pldl1strm, [x0, x1]
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ld1 {v4.16b}, [x0], x1 // v4=src[6*stride]
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// vertical filtered into v20/v21
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FILTER_6TAG_8BITS_TO_16BITS1 v5, v6, v7, v2, v3, v4, v20, v0, v1
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FILTER_6TAG_8BITS_TO_16BITS2 v5, v6, v7, v2, v3, v4, v21, v0, v1
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// horizon filtered
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UNPACK_2_16BITS_TO_ABC v20, v21, v23, v24, v25
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FILTER_3_IN_16BITS_TO_8BITS1 v23, v24, v25, v26 //output to v26[0]
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st1 {v26.s}[0], [x2], x5 //write 0:3Byte : 3 line
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st1 {v26.b}[4], [x2], x3 //write 5th Byte : 3 line
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mov v5.16b, v3.16b
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mov v3.16b, v7.16b
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mov v30.16b, v2.16b
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mov v2.16b, v6.16b
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mov v6.16b, v4.16b
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mov v4.16b, v30.16b
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sub x4, x4, #4
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cbnz x4, w5_hv_mc_luma_loop
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//prfm pldl1strm, [x0, x1]
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ld1 {v7.16b}, [x0], x1 // v7=src[3*stride]
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// vertical filtered into v20/v21
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FILTER_6TAG_8BITS_TO_16BITS1 v2, v3, v4, v5, v6, v7, v20, v0, v1
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FILTER_6TAG_8BITS_TO_16BITS2 v2, v3, v4, v5, v6, v7, v21, v0, v1
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// horizon filtered
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UNPACK_2_16BITS_TO_ABC v20, v21, v23, v24, v25
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FILTER_3_IN_16BITS_TO_8BITS1 v23, v24, v25, v26 //output to v26[0]
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st1 {v26.s}[0], [x2], x5 //write 0:3Byte : 0 line
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st1 {v26.b}[4], [x2], x3 //write 5th Byte : 0 line
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN McHorVer02Height17_AArch64_neon
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sub x0, x0, x1, lsl #1
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movi v0.8h, #20, lsl #0
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@ -2259,5 +2375,61 @@ w9_v_mc_luma_loop:
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st1 {v20.8b}, [x2], x3 //write 8Byte : 0 line
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WELS_ASM_AARCH64_FUNC_END
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WELS_ASM_AARCH64_FUNC_BEGIN McHorVer02Height5_AArch64_neon
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sub x0, x0, x1, lsl #1
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movi v0.8h, #20, lsl #0
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movi v1.8h, #5, lsl #0
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sub x4, x4, #1
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//prfm pldl1strm, [x0]
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//prfm pldl1strm, [x0, x1]
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ld1 {v2.8b}, [x0], x1 // v2=src[-2*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v3.8b}, [x0], x1 // v3=src[-1*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v4.8b}, [x0], x1 // v4=src[0*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v5.8b}, [x0], x1 // v5=src[1*stride]
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//prfm pldl1strm, [x0, x1]
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ld1 {v6.8b}, [x0], x1 // v6=src[2*stride]
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w5_v_mc_luma_loop:
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//prfm pldl1strm, [x0, x1]
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ld1 {v7.8b}, [x0], x1 // v7=src[3*stride]
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FILTER_6TAG_8BITS1 v2, v3, v4, v5, v6, v7, v20, v0, v1
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st1 {v20.s}[0], [x2], x3 //write 4Byte : 0 line
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//prfm pldl1strm, [x0, x1]
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ld1 {v2.8b}, [x0], x1 // v2=src[4*stride]
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FILTER_6TAG_8BITS1 v3, v4, v5, v6, v7, v2, v20, v0, v1
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st1 {v20.s}[0], [x2], x3 //write 4Byte : 1 line
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//prfm pldl1strm, [x0, x1]
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ld1 {v3.8b}, [x0], x1 // v3=src[5*stride]
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FILTER_6TAG_8BITS1 v4, v5, v6, v7, v2, v3, v20, v0, v1
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st1 {v20.s}[0], [x2], x3 //write 4Byte : 2 line
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//prfm pldl1strm, [x0, x1]
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ld1 {v4.8b}, [x0], x1 // v4=src[6*stride]
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FILTER_6TAG_8BITS1 v5, v6, v7, v2, v3, v4, v20, v0, v1
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st1 {v20.s}[0], [x2], x3 //write 4Byte : 3 line
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mov v5.16b, v3.16b
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mov v3.16b, v7.16b
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mov v7.16b, v2.16b
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mov v2.16b, v6.16b
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mov v6.16b, v4.16b
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mov v4.16b, v7.16b
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sub x4, x4, #4
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cbnz x4, w5_v_mc_luma_loop
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//prfm pldl1strm, [x0, x1]
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ld1 {v7.8b}, [x0], x1 // v7=src[3*stride]
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FILTER_6TAG_8BITS1 v2, v3, v4, v5, v6, v7, v20, v0, v1
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st1 {v20.s}[0], [x2], x3 //write 4Byte : 0 line
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WELS_ASM_AARCH64_FUNC_END
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#endif
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@ -228,14 +228,20 @@ void McHorVer20Width17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, ui
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int32_t iHeight);// width+1
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void McHorVer20Width9_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);// width+1
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void McHorVer20Width5_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);// width+1
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void McHorVer02Height17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);// height+1
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void McHorVer02Height9_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);// height+1
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void McHorVer02Height5_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);// height+1
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void McHorVer22Width17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);//width+1&&height+1
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void McHorVer22Width9_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);//width+1&&height+1
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void McHorVer22Width5_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iHeight);//width+1&&height+1
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#endif
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#if defined(X86_ASM)
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@ -1004,27 +1004,33 @@ void PixelAvg_neon (uint8_t* pDst, int32_t iDstStride, const uint8_t* pSrcA, int
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}
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#endif
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#if defined(HAVE_NEON_AARCH64)
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void McHorVer20Width9Or17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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void McHorVer20Width5Or9Or17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight) {
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if (iWidth == 17)
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McHorVer20Width17_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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else //if (iWidth == 9)
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else if (iWidth == 9)
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McHorVer20Width9_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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else //if (iWidth == 5)
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McHorVer20Width5_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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}
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void McHorVer02Height9Or17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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void McHorVer02Height5Or9Or17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight) {
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if (iWidth == 16)
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McHorVer02Height17_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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else //if (iWidth == 8)
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else if (iWidth == 8)
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McHorVer02Height9_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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else //if (iWidth == 4)
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McHorVer02Height5_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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}
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void McHorVer22Width9Or17Height9Or17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst,
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void McHorVer22Width5Or9Or17Height5Or9Or17_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst,
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int32_t iDstStride,
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int32_t iWidth, int32_t iHeight) {
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if (iWidth == 17)
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McHorVer22Width17_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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else //if (iWidth == 9)
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else if (iWidth == 9)
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McHorVer22Width9_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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else //if (iWidth == 5)
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McHorVer22Width5_AArch64_neon (pSrc, iSrcStride, pDst, iDstStride, iHeight);
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}
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void McCopy_AArch64_neon (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
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int32_t iWidth, int32_t iHeight) {
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@ -1327,9 +1333,9 @@ void InitMcFunc (SMcFunc* pMcFuncs, uint32_t uiCpuFlag) {
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pMcFuncs->pMcLumaFunc = McLuma_AArch64_neon;
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pMcFuncs->pMcChromaFunc = McChroma_AArch64_neon;
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pMcFuncs->pfSampleAveraging = PixelAvg_AArch64_neon;
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pMcFuncs->pfLumaHalfpelHor = McHorVer20Width9Or17_AArch64_neon;//iWidth+1:8/16
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pMcFuncs->pfLumaHalfpelVer = McHorVer02Height9Or17_AArch64_neon;//heigh+1:8/16
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pMcFuncs->pfLumaHalfpelCen = McHorVer22Width9Or17Height9Or17_AArch64_neon;//iWidth+1/heigh+1
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pMcFuncs->pfLumaHalfpelHor = McHorVer20Width5Or9Or17_AArch64_neon;//iWidth+1:4/8/16
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pMcFuncs->pfLumaHalfpelVer = McHorVer02Height5Or9Or17_AArch64_neon;//heigh+1:4/8/16
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pMcFuncs->pfLumaHalfpelCen = McHorVer22Width5Or9Or17Height5Or9Or17_AArch64_neon;//iWidth+1/heigh+1
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}
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#endif
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}
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