Merge pull request #2531 from GuangweiWang/enable-disable-AVX2
add option for enable/disable AVX2
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commit
1f770c488c
@ -1,6 +1,18 @@
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#for x86
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HAVE_AVX2 := true
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ifneq ($(filter %86 x86_64, $(ARCH)),)
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include $(SRC_PATH)build/x86-common.mk
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ifeq ($(USE_ASM), Yes)
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ifeq ($(HAVE_AVX2), true)
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CFLAGS += -DHAVE_AVX2
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CXXFLAGS += -DHAVE_AVX2
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ASMFLAGS += -DHAVE_AVX2
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endif
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endif
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endif
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#for arm
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ifneq ($(filter-out arm64, $(filter arm%, $(ARCH))),)
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ifeq ($(USE_ASM), Yes)
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ASM_ARCH = arm
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@ -8,6 +20,8 @@ ASMFLAGS += -I$(SRC_PATH)codec/common/arm/
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CFLAGS += -DHAVE_NEON
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endif
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endif
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#for arm64
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ifneq ($(filter arm64 aarch64, $(ARCH)),)
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ifeq ($(USE_ASM), Yes)
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ASM_ARCH = arm64
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@ -56,7 +56,6 @@
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#define WELS_CPU_SSE42 0x00000400 /* sse 4.2 */
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/* CPU features application extensive */
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#define WELS_CPU_AVX 0x00000800 /* Advanced Vector eXtentions */
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#define WELS_CPU_FPU 0x00001000 /* x87-FPU on chip */
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#define WELS_CPU_HTT 0x00002000 /* Hyper-Threading Technology (HTT), Multi-threading enabled feature:
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physical processor package is capable of supporting more than one logic processor
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@ -67,7 +66,13 @@
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#define WELS_CPU_MOVBE 0x00008000 /* MOVBE instruction */
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#define WELS_CPU_AES 0x00010000 /* AES instruction extensions */
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#define WELS_CPU_FMA 0x00020000 /* AVX VEX FMA instruction sets */
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#define WELS_CPU_AVX 0x00000800 /* Advanced Vector eXtentions */
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#ifdef HAVE_AVX2
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#define WELS_CPU_AVX2 0x00040000 /* AVX2 */
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#else
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#define WELS_CPU_AVX2 0x00000000 /* !AVX2 */
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#endif
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#define WELS_CPU_CACHELINE_16 0x10000000 /* CacheLine Size 16 */
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#define WELS_CPU_CACHELINE_32 0x20000000 /* CacheLine Size 32 */
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@ -678,6 +678,7 @@ WELS_EXTERN WelsIDctRecI16x16Dc_sse2
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; AVX2 functions
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;***********************************************************************
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%ifdef HAVE_AVX2
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; out=%1 pPixel1=%2 iStride1=%3 pPixel2=%4 iStride2=%5 wels_shufb0312_movzxw=%6 clobber=%7,%8
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%macro AVX2_LoadDiff16P 8
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vmovq x%1, [%2 ]
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@ -1011,3 +1012,5 @@ WELS_EXTERN WelsIDctT4Rec_avx2
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POP_XMM
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LOAD_5_PARA_POP
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ret
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%endif
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@ -1504,6 +1504,7 @@ loop_get_satd_16x16_right:
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;
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;***********************************************************************
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%ifdef HAVE_AVX2
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; out=%1 pSrcA=%2 pSrcB=%3 HSumSubDB1_256=%4 ymm_clobber=%5
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%macro AVX2_LoadDiffSatd16x1 5
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vbroadcasti128 %1, [%2]
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@ -1723,6 +1724,8 @@ WelsSampleSatd16x4N_avx2:
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%endif
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ret
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%endif
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;***********************************************************************
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;
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;Pixel_satd_wxh_avx2 END
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@ -48,8 +48,10 @@ extern "C" {
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#if defined(X86_ASM)
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void IdctResAddPred_mmx (uint8_t* pPred, const int32_t kiStride, int16_t* pRs);
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void IdctResAddPred_sse2 (uint8_t* pPred, const int32_t kiStride, int16_t* pRs);
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#if defined(HAVE_AVX2)
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void IdctResAddPred_avx2 (uint8_t* pPred, const int32_t kiStride, int16_t* pRs);
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void IdctFourResAddPred_avx2 (uint8_t* pPred, int32_t iStride, int16_t* pRs, const int8_t* pNzc);
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#endif
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#endif//X86_ASM
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#if defined(HAVE_NEON)
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@ -1005,11 +1005,14 @@ void InitPredFunc (PWelsDecoderContext pCtx, uint32_t uiCpuFlag) {
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pCtx->pGetIChromaPredFunc[C_PRED_DC_T] = WelsDecoderIChromaPredDcTop_sse2;
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pCtx->pGetI4x4LumaPredFunc[I4_PRED_H] = WelsDecoderI4x4LumaPredH_sse2;
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}
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#if defined(HAVE_AVX2)
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if (uiCpuFlag & WELS_CPU_AVX2) {
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pCtx->pIdctResAddPredFunc = IdctResAddPred_avx2;
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pCtx->pIdctFourResAddPredFunc = IdctFourResAddPred_avx2;
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}
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#endif
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#endif
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}
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//reset decoder number related statistics info
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@ -370,6 +370,7 @@ WELS_EXTERN WelsDequantIHadamard4x4_sse2
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ret
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%ifdef HAVE_AVX2
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; data=%1 abs_out=%2 ff=%3 mf=%4 7FFFh=%5
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%macro AVX2_Quant 5
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vpabsw %2, %1
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@ -502,3 +503,5 @@ WELS_EXTERN WelsQuantFour4x4Max_avx2
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POP_XMM
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LOAD_4_PARA_POP
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ret
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%endif
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@ -107,10 +107,12 @@ void CDownsampling::InitDownsampleFuncs (SDownsampleFuncs& sDownsampleFunc, int
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sDownsampleFunc.pfQuarterDownsampler = DyadicBilinearQuarterDownsampler_sse4;
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sDownsampleFunc.pfGeneralRatioChroma = GeneralBilinearAccurateDownsamplerWrap_sse41;
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}
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#ifdef HAVE_AVX2
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if (iCpuFlag & WELS_CPU_AVX2) {
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sDownsampleFunc.pfGeneralRatioChroma = GeneralBilinearAccurateDownsamplerWrap_avx2;
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sDownsampleFunc.pfGeneralRatioLuma = GeneralBilinearFastDownsamplerWrap_avx2;
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}
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#endif
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#endif//X86_ASM
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#if defined(HAVE_NEON)
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@ -99,8 +99,10 @@ GeneralDownsampleFunc GeneralBilinearFastDownsamplerWrap_sse2;
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GeneralDownsampleFunc GeneralBilinearAccurateDownsamplerWrap_sse2;
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GeneralDownsampleFunc GeneralBilinearFastDownsamplerWrap_ssse3;
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GeneralDownsampleFunc GeneralBilinearAccurateDownsamplerWrap_sse41;
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#ifdef HAVE_AVX2
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GeneralDownsampleFunc GeneralBilinearFastDownsamplerWrap_avx2;
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GeneralDownsampleFunc GeneralBilinearAccurateDownsamplerWrap_avx2;
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#endif
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SpecificDownsampleFunc DyadicBilinearOneThirdDownsampler_ssse3;
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SpecificDownsampleFunc DyadicBilinearOneThirdDownsampler_sse4;
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@ -120,12 +122,14 @@ void GeneralBilinearFastDownsampler_ssse3 (uint8_t* pDst, int32_t iDstStride, in
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void GeneralBilinearAccurateDownsampler_sse41 (uint8_t* pDst, int32_t iDstStride, int32_t iDstWidth,
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int32_t iDstHeight, uint8_t* pSrc, int32_t iSrcStride, uint32_t uiScaleX,
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uint32_t uiScaleY);
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#ifdef HAVE_AVX2
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void GeneralBilinearFastDownsampler_avx2 (uint8_t* pDst, int32_t iDstStride, int32_t iDstWidth,
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int32_t iDstHeight, uint8_t* pSrc, int32_t iSrcStride, uint32_t uiScaleX,
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uint32_t uiScaleY);
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void GeneralBilinearAccurateDownsampler_avx2 (uint8_t* pDst, int32_t iDstStride, int32_t iDstWidth,
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int32_t iDstHeight, uint8_t* pSrc, int32_t iSrcStride, uint32_t uiScaleX,
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uint32_t uiScaleY);
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#endif
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WELSVP_EXTERN_C_END
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#endif
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@ -284,8 +284,10 @@ DEFINE_GENERAL_BILINEAR_FAST_DOWNSAMPLER_WRAP (sse2)
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DEFINE_GENERAL_BILINEAR_ACCURATE_DOWNSAMPLER_WRAP (sse2)
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DEFINE_GENERAL_BILINEAR_FAST_DOWNSAMPLER_WRAP (ssse3)
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DEFINE_GENERAL_BILINEAR_ACCURATE_DOWNSAMPLER_WRAP (sse41)
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#ifdef HAVE_AVX2
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DEFINE_GENERAL_BILINEAR_FAST_DOWNSAMPLER_WRAP (avx2)
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DEFINE_GENERAL_BILINEAR_ACCURATE_DOWNSAMPLER_WRAP (avx2)
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#endif
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#endif //X86_ASM
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#ifdef HAVE_NEON
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@ -3254,6 +3254,7 @@ WELS_EXTERN GeneralBilinearAccurateDownsampler_sse41
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%undef xmm_xfrac1_begin
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%undef xmm_xfrac_inc
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%ifdef HAVE_AVX2
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; xpos_int=%1 xpos_frac=%2 inc_int+1=%3 inc_frac=%4 tmp=%5
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%macro AVX2_BilinearIncXposuw 5
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vpaddusw %5, %2, %4
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@ -4552,3 +4553,5 @@ WELS_EXTERN GeneralBilinearAccurateDownsampler_avx2
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%undef ymm_xfrac0_begin
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%undef ymm_xfrac1_begin
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%undef ymm_xfrac_inc
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%endif
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@ -2088,6 +2088,7 @@ sqdiff_bgd_width_loop:
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%assign push_num push_num - stack_alloc_num
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%endmacro
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%ifdef HAVE_AVX2
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; Max unsigned byte per quadword
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; out=%1 in=%2 tmp=%3
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%macro AVX2_Maxubq 3
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@ -3557,3 +3558,6 @@ WELS_EXTERN VAACalcSadSsdBgd_avx2
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%undef p_sd8x8
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%undef p_mad8x8
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ret
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%endif
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@ -53,6 +53,7 @@ void SetNonZeroCount_ref (int8_t* pNonZeroCount) {
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}
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#if defined(X86_ASM)
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#if defined(HAVE_AVX2)
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void IdctFourResAddPred_ref (uint8_t* pPred, int32_t iStride, int16_t* pRs) {
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IdctResAddPred_ref (pPred + 0 * iStride + 0, iStride, pRs + 0 * 16);
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IdctResAddPred_ref (pPred + 0 * iStride + 4, iStride, pRs + 1 * 16);
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@ -60,6 +61,7 @@ void IdctFourResAddPred_ref (uint8_t* pPred, int32_t iStride, int16_t* pRs) {
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IdctResAddPred_ref (pPred + 4 * iStride + 4, iStride, pRs + 3 * 16);
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}
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#endif
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#endif
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} // anon ns
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@ -138,9 +140,11 @@ GENERATE_IDCTRESADDPRED (IdctResAddPred_c, 0)
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#if defined(X86_ASM)
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GENERATE_IDCTRESADDPRED (IdctResAddPred_mmx, WELS_CPU_MMXEXT)
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GENERATE_IDCTRESADDPRED (IdctResAddPred_sse2, WELS_CPU_SSE2)
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#if defined(HAVE_AVX2)
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GENERATE_IDCTRESADDPRED (IdctResAddPred_avx2, WELS_CPU_AVX2)
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GENERATE_IDCTFOURRESADDPRED (IdctFourResAddPred_avx2, WELS_CPU_AVX2)
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#endif
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#endif
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#if defined(HAVE_NEON)
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GENERATE_IDCTRESADDPRED (IdctResAddPred_neon, WELS_CPU_NEON)
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@ -372,12 +372,15 @@ GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearFastDownsamplerWrap_ssse3
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WELS_CPU_SSSE3)
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GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearAccurateDownsamplerWrap_sse41,
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GeneralBilinearAccurateDownsampler_ref, 1, WELS_CPU_SSE41)
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#ifdef HAVE_AVX2
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GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearFastDownsamplerWrap_avx2, GeneralBilinearFastDownsampler_ref, 1,
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WELS_CPU_AVX2)
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GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearAccurateDownsamplerWrap_avx2,
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GeneralBilinearAccurateDownsampler_ref, 1, WELS_CPU_AVX2)
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#endif
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#endif
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#if defined(HAVE_NEON)
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GENERATE_DyadicBilinearDownsampler_UT (DyadicBilinearDownsamplerWidthx32_neon, 1, WELS_CPU_NEON)
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GENERATE_DyadicBilinearDownsampler_UT (DyadicBilinearDownsampler_neon, 1, WELS_CPU_NEON)
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