2013-12-09 13:51:09 +01:00
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;*!
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;* \copy
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;* Copyright (c) 2009-2013, Cisco Systems
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;* All rights reserved.
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;*
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;* Redistribution and use in source and binary forms, with or without
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;* modification, are permitted provided that the following conditions
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;* are met:
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;*
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;* ?Redistributions of source code must retain the above copyright
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;* notice, this list of conditions and the following disclaimer.
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;*
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;* ?Redistributions in binary form must reproduce the above copyright
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;* notice, this list of conditions and the following disclaimer in
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;* the documentation and/or other materials provided with the
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;* distribution.
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;*
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;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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;* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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;* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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;* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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;* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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;* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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;* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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;* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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;* POSSIBILITY OF SUCH DAMAGE.
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;*
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;*
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;* dct.asm
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;*
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;* Abstract
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;* WelsDctFourT4_sse2
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;*
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;* History
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;* 8/4/2009 Created
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;*
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;*
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;*************************************************************************/
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%include "asm_inc.asm"
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SECTION .rodata align=16
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;***********************************************************************
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; Constant
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2013-12-13 09:06:44 +01:00
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;***********************************************************************
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2013-12-09 13:51:09 +01:00
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align 16
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2013-12-13 09:06:44 +01:00
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SSE2_DeQuant8 dw 10, 13, 10, 13, 13, 16, 13, 16,
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2013-12-09 13:51:09 +01:00
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dw 10, 13, 10, 13, 13, 16, 13, 16,
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2013-12-13 09:06:44 +01:00
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dw 11, 14, 11, 14, 14, 18, 14, 18,
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2013-12-09 13:51:09 +01:00
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dw 11, 14, 11, 14, 14, 18, 14, 18,
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dw 13, 16, 13, 16, 16, 20, 16, 20,
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2013-12-13 09:06:44 +01:00
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dw 13, 16, 13, 16, 16, 20, 16, 20,
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dw 14, 18, 14, 18, 18, 23, 18, 23,
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2013-12-09 13:51:09 +01:00
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dw 14, 18, 14, 18, 18, 23, 18, 23,
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dw 16, 20, 16, 20, 20, 25, 20, 25,
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2013-12-13 09:06:44 +01:00
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dw 16, 20, 16, 20, 20, 25, 20, 25,
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dw 18, 23, 18, 23, 23, 29, 23, 29,
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2013-12-09 13:51:09 +01:00
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dw 18, 23, 18, 23, 23, 29, 23, 29
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2013-12-13 09:06:44 +01:00
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2013-12-09 13:51:09 +01:00
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;***********************************************************************
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; MMX functions
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2013-12-13 09:06:44 +01:00
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;***********************************************************************
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2013-12-09 13:51:09 +01:00
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%macro MMX_LoadDiff4P 5
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movd %1, [%3]
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movd %2, [%4]
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punpcklbw %1, %5
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punpcklbw %2, %5
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psubw %1, %2
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%endmacro
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%macro MMX_LoadDiff4x4P 10 ;d0, d1, d2, d3, pix1address, pix1stride, pix2address, pix2stride, tmp(mm), 0(mm)
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MMX_LoadDiff4P %1, %9, %5, %7, %10
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MMX_LoadDiff4P %2, %9, %5+%6, %7+%8, %10
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lea %5, [%5+2*%6]
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lea %7, [%7+2*%8]
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MMX_LoadDiff4P %3, %9, %5, %7, %10
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MMX_LoadDiff4P %4, %9, %5+%6, %7+%8, %10
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%endmacro
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%macro MMX_SumSubMul2 3
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movq %3, %1
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2014-01-05 13:38:20 +01:00
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psllw %1, $01
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2013-12-09 13:51:09 +01:00
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paddw %1, %2
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2014-01-05 13:38:20 +01:00
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psllw %2, $01
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2013-12-09 13:51:09 +01:00
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psubw %3, %2
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%endmacro
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%macro MMX_SumSubDiv2 3
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movq %3, %2
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2014-01-05 13:38:20 +01:00
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psraw %3, $01
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2013-12-09 13:51:09 +01:00
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paddw %3, %1
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2014-01-05 13:38:20 +01:00
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psraw %1, $01
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2013-12-09 13:51:09 +01:00
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psubw %1, %2
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%endmacro
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%macro MMX_SumSub 3
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movq %3, %2
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psubw %2, %1
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paddw %1, %3
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%endmacro
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%macro MMX_DCT 6
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MMX_SumSub %4, %1, %6
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MMX_SumSub %3, %2, %6
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MMX_SumSub %3, %4, %6
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2013-12-13 09:06:44 +01:00
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MMX_SumSubMul2 %1, %2, %5
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2013-12-09 13:51:09 +01:00
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%endmacro
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%macro MMX_IDCT 6
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MMX_SumSub %4, %5, %6
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MMX_SumSubDiv2 %3, %2, %1
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MMX_SumSub %1, %4, %6
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MMX_SumSub %3, %5, %6
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%endmacro
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%macro MMX_StoreDiff4P 6
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movd %2, %6
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punpcklbw %2, %4
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paddw %1, %3
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2014-01-05 13:38:20 +01:00
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psraw %1, $06
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2013-12-09 13:51:09 +01:00
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paddsw %1, %2
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packuswb %1, %2
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movd %5, %1
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%endmacro
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2014-01-03 07:49:45 +01:00
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SECTION .text
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2013-12-09 13:51:09 +01:00
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;***********************************************************************
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2014-03-09 11:28:36 +01:00
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; void WelsDctT4_mmx( int16_t *pDct[4], uint8_t *pix1, int32_t i_pix1, uint8_t *pix2, int32_t i_pix2 )
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2013-12-09 13:51:09 +01:00
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;***********************************************************************
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WELS_EXTERN WelsDctT4_mmx
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2014-01-03 07:49:45 +01:00
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%assign push_num 0
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LOAD_5_PARA
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2014-03-14 13:32:41 +01:00
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SIGN_EXTENSION r2, r2d
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SIGN_EXTENSION r4, r4d
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2013-12-09 13:51:09 +01:00
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WELS_Zero mm7
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2013-12-13 09:06:44 +01:00
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2014-01-03 07:49:45 +01:00
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MMX_LoadDiff4x4P mm1, mm2, mm3, mm4, r1, r2, r3, r4, mm0, mm7
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2013-12-09 13:51:09 +01:00
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2013-12-13 09:06:44 +01:00
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MMX_DCT mm1, mm2, mm3 ,mm4, mm5, mm6
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2013-12-09 13:51:09 +01:00
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MMX_Trans4x4W mm3, mm1, mm4, mm5, mm2
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2013-12-13 09:06:44 +01:00
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MMX_DCT mm3, mm5, mm2 ,mm4, mm1, mm6
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2013-12-09 13:51:09 +01:00
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MMX_Trans4x4W mm2, mm3, mm4, mm1, mm5
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2014-01-03 07:49:45 +01:00
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movq [r0+ 0], mm2
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movq [r0+ 8], mm1
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movq [r0+16], mm5
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movq [r0+24], mm4
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WELSEMMS
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LOAD_5_PARA_POP
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2013-12-09 13:51:09 +01:00
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ret
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;***********************************************************************
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2014-03-09 11:28:36 +01:00
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; void WelsIDctT4Rec_mmx(uint8_t *rec, int32_t stride, uint8_t *pred, int32_t pred_stride, int16_t *rs)
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2013-12-09 13:51:09 +01:00
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;***********************************************************************
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WELS_EXTERN WelsIDctT4Rec_mmx
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2014-01-03 07:49:45 +01:00
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%assign push_num 0
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LOAD_5_PARA
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2014-03-14 13:32:41 +01:00
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SIGN_EXTENSION r1, r1d
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SIGN_EXTENSION r3, r3d
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2014-01-03 07:49:45 +01:00
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movq mm0, [r4+ 0]
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movq mm1, [r4+ 8]
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movq mm2, [r4+16]
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movq mm3, [r4+24]
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2013-12-09 13:51:09 +01:00
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MMX_Trans4x4W mm0, mm1, mm2, mm3, mm4
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MMX_IDCT mm1, mm2, mm3, mm4, mm0, mm6
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MMX_Trans4x4W mm1, mm3, mm0, mm4, mm2
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MMX_IDCT mm3, mm0, mm4, mm2, mm1, mm6
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WELS_Zero mm7
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WELS_DW32 mm6
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2013-12-13 09:06:44 +01:00
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2014-01-03 07:49:45 +01:00
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MMX_StoreDiff4P mm3, mm0, mm6, mm7, [r0], [r2]
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MMX_StoreDiff4P mm4, mm0, mm6, mm7, [r0+r1], [r2+r3]
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lea r0, [r0+2*r1]
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lea r2, [r2+2*r3]
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MMX_StoreDiff4P mm1, mm0, mm6, mm7, [r0], [r2]
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MMX_StoreDiff4P mm2, mm0, mm6, mm7, [r0+r1], [r2+r3]
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2013-12-13 09:06:44 +01:00
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2013-12-09 13:51:09 +01:00
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WELSEMMS
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2014-01-03 07:49:45 +01:00
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LOAD_5_PARA_POP
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2013-12-09 13:51:09 +01:00
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ret
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;***********************************************************************
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; SSE2 functions
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;***********************************************************************
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%macro SSE2_Store4x8p 6
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SSE2_XSawp qdq, %2, %3, %6
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SSE2_XSawp qdq, %4, %5, %3
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2013-12-13 09:06:44 +01:00
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MOVDQ [%1+0x00], %2
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MOVDQ [%1+0x10], %4
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MOVDQ [%1+0x20], %6
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MOVDQ [%1+0x30], %3
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2013-12-09 13:51:09 +01:00
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%endmacro
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%macro SSE2_Load4x8p 6
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MOVDQ %2, [%1+0x00]
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2013-12-13 09:06:44 +01:00
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MOVDQ %4, [%1+0x10]
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MOVDQ %6, [%1+0x20]
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MOVDQ %3, [%1+0x30]
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2013-12-09 13:51:09 +01:00
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SSE2_XSawp qdq, %4, %3, %5
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SSE2_XSawp qdq, %2, %6, %3
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%endmacro
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%macro SSE2_SumSubMul2 3
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movdqa %3, %1
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paddw %1, %1
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paddw %1, %2
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psubw %3, %2
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psubw %3, %2
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%endmacro
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%macro SSE2_SumSubDiv2 4
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movdqa %4, %1
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movdqa %3, %2
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2014-01-05 13:38:20 +01:00
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psraw %2, $01
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psraw %4, $01
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2013-12-09 13:51:09 +01:00
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paddw %1, %2
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psubw %4, %3
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%endmacro
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%macro SSE2_StoreDiff8p 6
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paddw %1, %3
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2014-01-05 13:38:20 +01:00
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psraw %1, $06
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2013-12-09 13:51:09 +01:00
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movq %2, %6
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punpcklbw %2, %4
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paddsw %2, %1
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packuswb %2, %2
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movq %5, %2
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%endmacro
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%macro SSE2_StoreDiff8p 5
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movq %2, %5
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punpcklbw %2, %3
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paddsw %2, %1
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packuswb %2, %2
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movq %4, %2
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%endmacro
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%macro SSE2_Load8DC 6
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2013-12-13 09:06:44 +01:00
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movdqa %1, %6 ; %1 = dc0 dc1
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2013-12-09 13:51:09 +01:00
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paddw %1, %5
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2014-01-05 13:38:20 +01:00
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psraw %1, $06 ; (dc + 32) >> 6
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2013-12-13 09:06:44 +01:00
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2013-12-09 13:51:09 +01:00
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movdqa %2, %1
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psrldq %2, 4
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punpcklwd %2, %2
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2013-12-13 09:06:44 +01:00
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punpckldq %2, %2 ; %2 = dc2 dc2 dc2 dc2 dc3 dc3 dc3 dc3
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2013-12-09 13:51:09 +01:00
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movdqa %3, %1
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psrldq %3, 8
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punpcklwd %3, %3
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punpckldq %3, %3 ; %3 = dc4 dc4 dc4 dc4 dc5 dc5 dc5 dc5
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2013-12-13 09:06:44 +01:00
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2013-12-09 13:51:09 +01:00
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movdqa %4, %1
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psrldq %4, 12
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punpcklwd %4, %4
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punpckldq %4, %4 ; %4 = dc6 dc6 dc6 dc6 dc7 dc7 dc7 dc7
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2013-12-13 09:06:44 +01:00
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2013-12-09 13:51:09 +01:00
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punpcklwd %1, %1
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2013-12-13 09:06:44 +01:00
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punpckldq %1, %1 ; %1 = dc0 dc0 dc0 dc0 dc1 dc1 dc1 dc1
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2013-12-09 13:51:09 +01:00
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%endmacro
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%macro SSE2_DCT 6
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2013-12-13 09:06:44 +01:00
|
|
|
SSE2_SumSub %6, %3, %5
|
|
|
|
|
SSE2_SumSub %1, %2, %5
|
|
|
|
|
SSE2_SumSub %3, %2, %5
|
|
|
|
|
SSE2_SumSubMul2 %6, %1, %4
|
2013-12-09 13:51:09 +01:00
|
|
|
%endmacro
|
|
|
|
|
|
|
|
|
|
%macro SSE2_IDCT 7
|
2013-12-13 09:06:44 +01:00
|
|
|
SSE2_SumSub %7, %2, %6
|
|
|
|
|
SSE2_SumSubDiv2 %1, %3, %5, %4
|
|
|
|
|
SSE2_SumSub %2, %1, %5
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_SumSub %7, %4, %5
|
|
|
|
|
%endmacro
|
|
|
|
|
|
|
|
|
|
;***********************************************************************
|
|
|
|
|
; void WelsDctFourT4_sse2(int16_t *pDct, uint8_t *pix1, int32_t i_pix1, uint8_t *pix2, int32_t i_pix2 )
|
|
|
|
|
;***********************************************************************
|
|
|
|
|
WELS_EXTERN WelsDctFourT4_sse2
|
2014-01-03 07:49:45 +01:00
|
|
|
%assign push_num 0
|
|
|
|
|
LOAD_5_PARA
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
PUSH_XMM 8
|
2014-03-14 13:32:41 +01:00
|
|
|
SIGN_EXTENSION r2, r2d
|
|
|
|
|
SIGN_EXTENSION r4, r4d
|
2013-12-09 13:51:09 +01:00
|
|
|
pxor xmm7, xmm7
|
|
|
|
|
;Load 4x8
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_LoadDiff8P xmm0, xmm6, xmm7, [r1], [r3]
|
|
|
|
|
SSE2_LoadDiff8P xmm1, xmm6, xmm7, [r1+r2], [r3+r4]
|
|
|
|
|
lea r1, [r1 + 2 * r2]
|
|
|
|
|
lea r3, [r3 + 2 * r4]
|
|
|
|
|
SSE2_LoadDiff8P xmm2, xmm6, xmm7, [r1], [r3]
|
|
|
|
|
SSE2_LoadDiff8P xmm3, xmm6, xmm7, [r1+r2], [r3+r4]
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_DCT xmm1, xmm2, xmm3, xmm4, xmm5, xmm0
|
|
|
|
|
SSE2_TransTwo4x4W xmm2, xmm0, xmm3, xmm4, xmm1
|
2013-12-13 09:06:44 +01:00
|
|
|
SSE2_DCT xmm0, xmm4, xmm1, xmm3, xmm5, xmm2
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_TransTwo4x4W xmm4, xmm2, xmm1, xmm3, xmm0
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_Store4x8p r0, xmm4, xmm2, xmm3, xmm0, xmm5
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r1, [r1 + 2 * r2]
|
|
|
|
|
lea r3, [r3 + 2 * r4]
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
;Load 4x8
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_LoadDiff8P xmm0, xmm6, xmm7, [r1 ], [r3 ]
|
|
|
|
|
SSE2_LoadDiff8P xmm1, xmm6, xmm7, [r1+r2 ], [r3+r4]
|
|
|
|
|
lea r1, [r1 + 2 * r2]
|
|
|
|
|
lea r3, [r3 + 2 * r4]
|
|
|
|
|
SSE2_LoadDiff8P xmm2, xmm6, xmm7, [r1], [r3]
|
|
|
|
|
SSE2_LoadDiff8P xmm3, xmm6, xmm7, [r1+r2], [r3+r4]
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_DCT xmm1, xmm2, xmm3, xmm4, xmm5, xmm0
|
2013-12-13 09:06:44 +01:00
|
|
|
SSE2_TransTwo4x4W xmm2, xmm0, xmm3, xmm4, xmm1
|
|
|
|
|
SSE2_DCT xmm0, xmm4, xmm1, xmm3, xmm5, xmm2
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_TransTwo4x4W xmm4, xmm2, xmm1, xmm3, xmm0
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r0, [r0+64]
|
|
|
|
|
SSE2_Store4x8p r0, xmm4, xmm2, xmm3, xmm0, xmm5
|
2013-12-13 09:06:44 +01:00
|
|
|
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
POP_XMM
|
2014-01-03 07:49:45 +01:00
|
|
|
LOAD_5_PARA_POP
|
2013-12-09 13:51:09 +01:00
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
;***********************************************************************
|
|
|
|
|
; void WelsIDctFourT4Rec_sse2(uint8_t *rec, int32_t stride, uint8_t *pred, int32_t pred_stride, int16_t *rs);
|
|
|
|
|
;***********************************************************************
|
|
|
|
|
WELS_EXTERN WelsIDctFourT4Rec_sse2
|
2014-01-03 07:49:45 +01:00
|
|
|
%assign push_num 0
|
|
|
|
|
LOAD_5_PARA
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
PUSH_XMM 8
|
2014-03-14 13:32:41 +01:00
|
|
|
SIGN_EXTENSION r1, r1d
|
|
|
|
|
SIGN_EXTENSION r3, r3d
|
2013-12-09 13:51:09 +01:00
|
|
|
;Load 4x8
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_Load4x8p r4, xmm0, xmm1, xmm4, xmm2, xmm5
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_TransTwo4x4W xmm0, xmm1, xmm4, xmm2, xmm3
|
|
|
|
|
SSE2_IDCT xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm0
|
|
|
|
|
SSE2_TransTwo4x4W xmm1, xmm4, xmm0, xmm2, xmm3
|
|
|
|
|
SSE2_IDCT xmm4, xmm2, xmm3, xmm0, xmm5, xmm6, xmm1
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
WELS_Zero xmm7
|
|
|
|
|
WELS_DW32 xmm6
|
|
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_StoreDiff8p xmm4, xmm5, xmm6, xmm7, [r0 ], [r2]
|
|
|
|
|
SSE2_StoreDiff8p xmm0, xmm5, xmm6, xmm7, [r0 + r1 ], [r2 + r3]
|
|
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff8p xmm1, xmm5, xmm6, xmm7, [r0], [r2]
|
|
|
|
|
SSE2_StoreDiff8p xmm2, xmm5, xmm6, xmm7, [r0 + r1 ], [r2 + r3]
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
add r4, 64
|
|
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_Load4x8p r4, xmm0, xmm1, xmm4, xmm2, xmm5
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_TransTwo4x4W xmm0, xmm1, xmm4, xmm2, xmm3
|
2013-12-13 09:06:44 +01:00
|
|
|
SSE2_IDCT xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm0
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_TransTwo4x4W xmm1, xmm4, xmm0, xmm2, xmm3
|
|
|
|
|
SSE2_IDCT xmm4, xmm2, xmm3, xmm0, xmm5, xmm6, xmm1
|
|
|
|
|
|
|
|
|
|
WELS_Zero xmm7
|
|
|
|
|
WELS_DW32 xmm6
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_StoreDiff8p xmm4, xmm5, xmm6, xmm7, [r0 ], [r2]
|
|
|
|
|
SSE2_StoreDiff8p xmm0, xmm5, xmm6, xmm7, [r0 + r1 ], [r2 + r3]
|
|
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff8p xmm1, xmm5, xmm6, xmm7, [r0], [r2]
|
|
|
|
|
SSE2_StoreDiff8p xmm2, xmm5, xmm6, xmm7, [r0 + r1], [r2 + r3]
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
POP_XMM
|
2014-01-03 07:49:45 +01:00
|
|
|
LOAD_5_PARA_POP
|
|
|
|
|
; pop esi
|
|
|
|
|
; pop ebx
|
2013-12-09 13:51:09 +01:00
|
|
|
ret
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-03-14 13:30:47 +01:00
|
|
|
%macro SSE2_StoreDiff4x8p 8
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_StoreDiff8p %1, %3, %4, [%5], [%6]
|
2013-12-13 09:06:44 +01:00
|
|
|
SSE2_StoreDiff8p %1, %3, %4, [%5 + %7], [%6 + %8]
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_StoreDiff8p %2, %3, %4, [%5 + 8], [%6 + 8]
|
2013-12-13 09:06:44 +01:00
|
|
|
SSE2_StoreDiff8p %2, %3, %4, [%5 + %7 + 8], [%6 + %8 + 8]
|
2014-03-14 13:30:47 +01:00
|
|
|
%endmacro
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
;***********************************************************************
|
|
|
|
|
; void WelsIDctRecI16x16Dc_sse2(uint8_t *rec, int32_t stride, uint8_t *pred, int32_t pred_stride, int16_t *dct_dc)
|
|
|
|
|
;***********************************************************************
|
|
|
|
|
WELS_EXTERN WelsIDctRecI16x16Dc_sse2
|
2014-01-03 07:49:45 +01:00
|
|
|
%assign push_num 0
|
|
|
|
|
LOAD_5_PARA
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
PUSH_XMM 8
|
2014-03-14 13:32:41 +01:00
|
|
|
SIGN_EXTENSION r1, r1d
|
|
|
|
|
SIGN_EXTENSION r3, r3d
|
2013-12-09 13:51:09 +01:00
|
|
|
pxor xmm7, xmm7
|
|
|
|
|
WELS_DW32 xmm6
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_Load8DC xmm0, xmm1, xmm2, xmm3, xmm6, [r4]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm0, xmm1, xmm5, xmm7, r0, r2, r1, r3
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm0, xmm1, xmm5, xmm7, r0, r2, r1, r3
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm2, xmm3, xmm5, xmm7, r0, r2, r1, r3
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm2, xmm3, xmm5, xmm7, r0, r2, r1, r3
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_Load8DC xmm0, xmm1, xmm2, xmm3, xmm6, [r4 + 16]
|
|
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm0, xmm1, xmm5, xmm7, r0, r2, r1, r3
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm0, xmm1, xmm5, xmm7, r0, r2, r1, r3
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm2, xmm3, xmm5, xmm7, r0, r2, r1, r3
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2014-01-03 07:49:45 +01:00
|
|
|
lea r0, [r0 + 2 * r1]
|
|
|
|
|
lea r2, [r2 + 2 * r3]
|
|
|
|
|
SSE2_StoreDiff4x8p xmm2, xmm3, xmm5, xmm7, r0, r2, r1, r3
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
POP_XMM
|
2014-01-03 07:49:45 +01:00
|
|
|
LOAD_5_PARA_POP
|
2013-12-09 13:51:09 +01:00
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
%macro SSE2_SumSubD 3
|
|
|
|
|
movdqa %3, %2
|
|
|
|
|
paddd %2, %1
|
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|
|
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psubd %1, %3
|
|
|
|
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%endmacro
|
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|
|
|
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|
|
|
|
%macro SSE2_SumSubDiv2D 4
|
|
|
|
|
paddd %1, %2
|
|
|
|
|
paddd %1, %3
|
|
|
|
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psrad %1, 1
|
|
|
|
|
movdqa %4, %1
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|
|
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|
psubd %4, %2
|
|
|
|
|
%endmacro
|
2014-03-14 13:30:47 +01:00
|
|
|
%macro SSE2_Load4Col 5
|
2014-01-03 07:49:45 +01:00
|
|
|
movsx r2, WORD[%5]
|
|
|
|
|
movd %1, r2d
|
|
|
|
|
movsx r2, WORD[%5 + 0x20]
|
|
|
|
|
movd %2, r2d
|
2013-12-09 13:51:09 +01:00
|
|
|
punpckldq %1, %2
|
2014-01-03 07:49:45 +01:00
|
|
|
movsx r2, WORD[%5 + 0x80]
|
|
|
|
|
movd %3, r2d
|
|
|
|
|
movsx r2, WORD[%5 + 0xa0]
|
|
|
|
|
movd %4, r2d
|
2013-12-09 13:51:09 +01:00
|
|
|
punpckldq %3, %4
|
|
|
|
|
punpcklqdq %1, %3
|
2014-03-14 13:30:47 +01:00
|
|
|
%endmacro
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
;***********************************************************************
|
|
|
|
|
;void WelsHadamardT4Dc_sse2( int16_t *luma_dc, int16_t *pDct)
|
|
|
|
|
;***********************************************************************
|
|
|
|
|
WELS_EXTERN WelsHadamardT4Dc_sse2
|
2014-01-03 07:49:45 +01:00
|
|
|
%assign push_num 0
|
|
|
|
|
LOAD_2_PARA
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
PUSH_XMM 8
|
2014-01-03 07:49:45 +01:00
|
|
|
SSE2_Load4Col xmm1, xmm5, xmm6, xmm0, r1
|
|
|
|
|
SSE2_Load4Col xmm2, xmm5, xmm6, xmm0, r1 + 0x40
|
|
|
|
|
SSE2_Load4Col xmm3, xmm5, xmm6, xmm0, r1 + 0x100
|
|
|
|
|
SSE2_Load4Col xmm4, xmm5, xmm6, xmm0, r1 + 0x140
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_SumSubD xmm1, xmm2, xmm7
|
|
|
|
|
SSE2_SumSubD xmm3, xmm4, xmm7
|
|
|
|
|
SSE2_SumSubD xmm2, xmm4, xmm7
|
2013-12-13 09:06:44 +01:00
|
|
|
SSE2_SumSubD xmm1, xmm3, xmm7
|
2013-12-09 13:51:09 +01:00
|
|
|
|
|
|
|
|
SSE2_Trans4x4D xmm4, xmm2, xmm1, xmm3, xmm5 ; pOut: xmm4,xmm3,xmm5,xmm1
|
2013-12-13 09:06:44 +01:00
|
|
|
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_SumSubD xmm4, xmm3, xmm7
|
|
|
|
|
SSE2_SumSubD xmm5, xmm1, xmm7
|
|
|
|
|
|
2013-12-13 09:06:44 +01:00
|
|
|
WELS_DD1 xmm6
|
2013-12-09 13:51:09 +01:00
|
|
|
SSE2_SumSubDiv2D xmm3, xmm1, xmm6, xmm0 ; pOut: xmm3 = (xmm3+xmm1+1)/2, xmm0 = (xmm3-xmm1+1)/2
|
|
|
|
|
SSE2_SumSubDiv2D xmm4, xmm5, xmm6, xmm1 ; pOut: xmm4 = (xmm4+xmm5+1)/2, xmm1 = (xmm4-xmm5+1)/2
|
|
|
|
|
SSE2_Trans4x4D xmm3, xmm0, xmm1, xmm4, xmm2 ; pOut: xmm3,xmm4,xmm2,xmm1
|
|
|
|
|
|
|
|
|
|
packssdw xmm3, xmm4
|
|
|
|
|
packssdw xmm2, xmm1
|
2014-01-03 07:49:45 +01:00
|
|
|
movdqa [r0+ 0], xmm3
|
|
|
|
|
movdqa [r0+16], xmm2
|
2013-12-13 09:06:44 +01:00
|
|
|
|
Backup/restore the xmm6-xmm15 SSE registers within asm functions on win64
According to the Win64 ABI, these registers need to be preserved,
and compilers are allowed to rely on their content to stay
available - not only for float usage but for any usage, anywhere,
in the calling C++ code.
This adds a macro which pushes the clobbered registers onto the
stack if targeting win64 (and a matching one which restores them).
The parameter to the macro is the number of xmm registers used
(e.g. if using xmm0 - xmm7, the parameter is 8), or in other
words, the number of the highest xmm register used plus one.
This is similar to how the same issue is handled for the NEON
registers q4-q7 with the vpush instruction, except that they needed
to be preserved on all platforms, not only on one particular platform.
This allows removing the XMMREG_PROTECT_* hacks, which can
easily fail if the compiler chooses to use the callee saved
xmm registers in an unexpected spot.
2014-03-14 09:29:53 +01:00
|
|
|
POP_XMM
|
2013-12-13 09:06:44 +01:00
|
|
|
ret
|
