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openh264/codec/encoder/core/arm/pixel_neon.S

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ArmAsm
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Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
/*!
* \copy
* Copyright (c) 2013, Cisco Systems
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifdef HAVE_NEON
.text
#include "arm_arch_common_macro.S"
.macro SATD_16x4
Add arm asm code for processing.
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vld1.64 {q0}, [r0,:128], r1
vld1.64 {q1}, [r2], r3
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q8, d0, d2
Add arm asm code for processing.
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vld1.64 {q2}, [r0,:128], r1
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q10, d1, d3
Add arm asm code for processing.
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vld1.64 {q3}, [r2], r3
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q9, d4, d6
Add arm asm code for processing.
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vld1.64 {q0}, [r0,:128], r1
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q11, d5, d7
Partly add arm asm code to encoder.
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vld1.64 {q1}, [r2], r3
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q12, d0, d2
Add arm asm code for processing.
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vld1.64 {q2}, [r0,:128], r1
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q14, d1, d3
vadd.s16 q0, q8, q9
Partly add arm asm code to encoder.
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Add arm asm code for processing.
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vld1.64 {q3}, [r2], r3
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsub.s16 q1, q8, q9
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q13, d4, d6
vsubl.u8 q15, d5, d7
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q2, q12, q13
vsub.s16 q3, q12, q13
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q8, q10, q11
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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vsub.s16 q9, q10, q11
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q10, q14, q15
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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vsub.s16 q11, q14, q15
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q12, q0, q2
vsub.s16 q14, q0, q2
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q13, q8, q10
vsub.s16 q15, q8, q10
Partly add arm asm code to encoder.
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Add arm asm code for processing.
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vsub.s16 q0, q1, q3
vadd.s16 q2, q1, q3
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsub.s16 q1, q9, q11
vadd.s16 q3, q9, q11
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vtrn.16 q12, q14
vtrn.16 q13, q15
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q8, q12, q14
vabd.s16 q10, q12, q14
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q9, q13, q15
vabd.s16 q11, q13, q15
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vabs.s16 q8, q8
vabs.s16 q9, q9
Partly add arm asm code to encoder.
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Add arm asm code for processing.
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vtrn.16 q0, q2
vtrn.16 q1, q3
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q12, q0, q2
vabd.s16 q14, q0, q2
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q13, q1, q3
vabd.s16 q15, q1, q3
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vabs.s16 q12, q12
vabs.s16 q13, q13
Partly add arm asm code to encoder.
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vtrn.32 q8, q10
vtrn.32 q9, q11
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vtrn.32 q12, q14
vtrn.32 q13, q15
vmax.s16 q0, q8, q10
vmax.s16 q1, q9, q11
vmax.s16 q2, q12, q14
vmax.s16 q3, q13, q15
Partly add arm asm code to encoder.
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vadd.u16 q0, q0, q1
vadd.u16 q2, q2, q3
.endm
.macro SATD_8x4
vld1.64 {d0}, [r0,:64], r1
vld1.64 {d1}, [r2], r3
vld1.64 {d2}, [r0,:64], r1
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q8, d0, d1
Partly add arm asm code to encoder.
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vld1.64 {d3}, [r2], r3
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vsubl.u8 q9, d2, d3
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vld1.64 {d4}, [r0,:64], r1
vld1.64 {d5}, [r2], r3
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q12, q8, q9
vsubl.u8 q10, d4, d5
Partly add arm asm code to encoder.
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vld1.64 {d6}, [r0,:64], r1
vld1.64 {d7}, [r2], r3
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vsubl.u8 q11, d6, d7
vsub.s16 q13, q8, q9
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.s16 q14, q10, q11
vsub.s16 q15, q10, q11
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vadd.s16 q0, q12, q14
vsub.s16 q1, q12, q14
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vsub.s16 q2, q13, q15
vadd.s16 q3, q13, q15
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vtrn.16 q0, q1
vtrn.16 q2, q3
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.s16 q8, q0, q1
vabd.s16 q9, q0, q1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vabs.s16 q8, q8
vadd.s16 q10, q2, q3
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vabd.s16 q11, q2, q3
vabs.s16 q10, q10
Partly add arm asm code to encoder.
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Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vtrn.32 q8, q9
vtrn.32 q10, q11
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vmax.s16 q0, q8, q9
vmax.s16 q1, q10, q11
Partly add arm asm code to encoder.
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.endm
.macro SAD_16x4
vld1.64 {q6}, [r0, :128], r1
vabal.u8 q10, d8, d10
vld1.64 {q7}, [r2], r3
vabal.u8 q11, d9, d11
vld1.64 {q0}, [r0, :128], r1
vabal.u8 q12, d12, d14
vld1.64 {q1}, [r2], r3
vabal.u8 q13, d13, d15
vld1.64 {q2}, [r0, :128], r1
vabal.u8 q10, d0, d2
vld1.64 {q3}, [r2], r3
vabal.u8 q11, d1, d3
vld1.64 {q4}, [r0, :128], r1
vabal.u8 q12, d4, d6
vld1.64 {q5}, [r2], r3
vabal.u8 q13, d5, d7
.endm
.macro SAD_8x4
vld1.64 {d0}, [r0, :64], r1
vld1.64 {d1}, [r2], r3
vabal.u8 q10, d0, d1
vld1.64 {d2}, [r0, :64], r1
vld1.64 {d3}, [r2], r3
vabal.u8 q11, d2, d3
vld1.64 {d4}, [r0, :64], r1
vld1.64 {d5}, [r2], r3
vabal.u8 q12, d4, d5
vld1.64 {d6}, [r0, :64], r1
vld1.64 {d7}, [r2], r3
vabal.u8 q13, d6, d7
.endm
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSad16x16_neon
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vpush {q4-q7}
Partly add arm asm code to encoder.
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vld1.64 {q0}, [r0, :128], r1
vld1.64 {q1}, [r2], r3
vabdl.u8 q10, d0, d2
vld1.64 {q2}, [r0, :128], r1
vabdl.u8 q11, d1, d3
vld1.64 {q3}, [r2], r3
vld1.64 {q4}, [r0, :128], r1
vabdl.u8 q12, d4, d6
vld1.64 {q5}, [r2], r3
vabdl.u8 q13, d5, d7
SAD_16x4
SAD_16x4
SAD_16x4
vld1.64 {q6}, [r0, :128], r1
vabal.u8 q10, d8, d10
vld1.64 {q7}, [r2], r3
vabal.u8 q11, d9, d11
vabal.u8 q12, d12, d14
vabal.u8 q13, d13, d15
vadd.u16 q14, q10, q11
vadd.u16 q15, q12, q13
vadd.u16 q15, q14, q15
vadd.u16 d0, d30, d31
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.u32 r0, d0[0]
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vpop {q4-q7}
Partly add arm asm code to encoder.
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WELS_ASM_FUNC_END
Add arm asm code for processing.
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WELS_ASM_FUNC_BEGIN WelsSampleSad16x8_neon
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vpush {q4-q7}
Partly add arm asm code to encoder.
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vld1.64 {q0}, [r0, :128], r1
vld1.64 {q1}, [r2], r3
vabdl.u8 q10, d0, d2
vld1.64 {q2}, [r0, :128], r1
vabdl.u8 q11, d1, d3
vld1.64 {q3}, [r2], r3
vld1.64 {q4}, [r0, :128], r1
vabdl.u8 q12, d4, d6
vld1.64 {q5}, [r2], r3
vabdl.u8 q13, d5, d7
SAD_16x4
vld1.64 {q6}, [r0, :128], r1
vabal.u8 q10, d8, d10
vld1.64 {q7}, [r2], r3
vabal.u8 q11, d9, d11
vabal.u8 q12, d12, d14
vabal.u8 q13, d13, d15
vadd.u16 q14, q10, q11
vadd.u16 q15, q12, q13
vadd.u16 q15, q14, q15
vadd.u16 d0, d30, d31
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.u32 r0, d0[0]
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
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vpop {q4-q7}
Partly add arm asm code to encoder.
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WELS_ASM_FUNC_END
Add arm asm code for processing.
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WELS_ASM_FUNC_BEGIN WelsSampleSad8x16_neon
Partly add arm asm code to encoder.
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vld1.64 {d0}, [r0, :64], r1
vld1.64 {d1}, [r2], r3
vabdl.u8 q10, d0, d1
vld1.64 {d2}, [r0, :64], r1
vld1.64 {d3}, [r2], r3
vabdl.u8 q11, d2, d3
vld1.64 {d4}, [r0, :64], r1
vld1.64 {d5}, [r2], r3
vabdl.u8 q12, d4, d5
vld1.64 {d6}, [r0, :64], r1
vld1.64 {d7}, [r2], r3
vabdl.u8 q13, d6, d7
SAD_8x4
SAD_8x4
SAD_8x4
vadd.u16 q14, q10, q11
vadd.u16 q15, q12, q13
vadd.u16 q15, q15, q14
vadd.u16 d0, d30, d31
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.u32 r0, d0[0]
WELS_ASM_FUNC_END
Add arm asm code for processing.
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WELS_ASM_FUNC_BEGIN WelsSampleSad8x8_neon
Partly add arm asm code to encoder.
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vld1.64 {d0}, [r0, :64], r1
vld1.64 {d1}, [r2], r3
vabdl.u8 q10, d0, d1
vld1.64 {d2}, [r0, :64], r1
vld1.64 {d3}, [r2], r3
vabdl.u8 q11, d2, d3
vld1.64 {d4}, [r0, :64], r1
vld1.64 {d5}, [r2], r3
vabdl.u8 q12, d4, d5
vld1.64 {d6}, [r0, :64], r1
vld1.64 {d7}, [r2], r3
vabdl.u8 q13, d6, d7
SAD_8x4
vadd.u16 q14, q10, q11
vadd.u16 q15, q12, q13
vadd.u16 q15, q15, q14
vadd.u16 d0, d30, d31
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.u32 r0, d0[0]
WELS_ASM_FUNC_END
Add arm asm code for processing.
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WELS_ASM_FUNC_BEGIN WelsSampleSad4x4_neon
Partly add arm asm code to encoder.
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stmdb sp!, {r4-r5, lr}
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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//Loading a horizontal line data (4 bytes)
//line 0
ldr r4, [r0], r1
ldr r5, [r2], r3
usad8 lr, r4, r5
Partly add arm asm code to encoder.
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//line 1
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldr r4, [r0], r1
ldr r5, [r2], r3
usada8 lr, r4, r5, lr
Partly add arm asm code to encoder.
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Add arm asm code for processing.
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//line 2
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldr r4, [r0], r1
ldr r5, [r2], r3
usada8 lr, r4, r5, lr
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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//line 3
ldr r4, [r0]
ldr r5, [r2]
usada8 r0, r4, r5, lr
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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ldmia sp!, {r4-r5, lr}
Partly add arm asm code to encoder.
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WELS_ASM_FUNC_END
Add arm asm code for processing.
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WELS_ASM_FUNC_BEGIN WelsSampleSadFour16x16_neon
Partly add arm asm code to encoder.
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stmdb sp!, {r4-r5, lr}
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Generate the pix2 start addr
sub r4, r2, #1
add r5, r2, #1
sub r2, r3
Add arm asm code for processing.
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Partly add arm asm code to encoder.
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//Loading a horizontal line data (16 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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vld1.8 {q0}, [r0], r1 //save pix1
Add arm asm code for processing.
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Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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vld1.8 {q1}, [r2], r3 //save pix2 - stride
vld1.8 {q10}, [r2], r3 //save pix2
vld1.8 {q2}, [r2], r3 //save pix2 + stride
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {q3}, [r4], r3 //save pix2 - 1
vld1.8 {q8}, [r5], r3 //save pix2 + 1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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//Do the SAD for 16 bytes
vabdl.u8 q15, d0, d2
vabal.u8 q15, d1, d3
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q13, d0, d4
vabal.u8 q13, d1, d5
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q11, d0, d6
vabal.u8 q11, d1, d7
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q9, d0, d16
vabal.u8 q9, d1, d17
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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mov lr, #15
Partly add arm asm code to encoder.
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pixel_sad_4_16x16_loop_0:
//Loading a horizontal line data (16 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {q0}, [r0], r1 //save pix1
vmov.8 q1, q10 //save pix2 - stride
vmov.8 q10, q2
vabal.u8 q15, d0, d2
vld1.8 {q2}, [r2], r3 //save pix2 + stride
vabal.u8 q15, d1, d3
vld1.8 {q3}, [r4], r3 //save pix2 - 1
vabal.u8 q13, d0, d4
vld1.8 {q8}, [r5], r3 //save pix2 + 1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vabal.u8 q13, d1, d5
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
subs lr, #1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabal.u8 q11, d0, d6
vabal.u8 q11, d1, d7
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabal.u8 q9, d0, d16
vabal.u8 q9, d1, d17
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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bne pixel_sad_4_16x16_loop_0
Partly add arm asm code to encoder.
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//Save SAD to 'r0'
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldr r0, [sp, #12]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vadd.u16 d0, d30, d31
vadd.u16 d1, d26, d27
vadd.u16 d2, d22, d23
vadd.u16 d3, d18, d19
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u16 q0, q0
vpaddl.u16 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u32 q0, q0
vpaddl.u32 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vst4.32 {d0[0],d1[0],d2[0],d3[0]}, [r0]
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
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ldmia sp!, {r4-r5, lr}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSadFour16x8_neon
Partly add arm asm code to encoder.
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stmdb sp!, {r4-r5, lr}
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Generate the pix2 start addr
sub r4, r2, #1
add r5, r2, #1
sub r2, r3
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Loading a horizontal line data (16 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {q0}, [r0], r1 //save pix1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {q1}, [r2], r3 //save pix2 - stride
vld1.8 {q10}, [r2], r3 //save pix2
vld1.8 {q2}, [r2], r3 //save pix2 + stride
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {q3}, [r4], r3 //save pix2 - 1
vld1.8 {q8}, [r5], r3 //save pix2 + 1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Do the SAD for 16 bytes
vabdl.u8 q15, d0, d2
vabal.u8 q15, d1, d3
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q13, d0, d4
vabal.u8 q13, d1, d5
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q11, d0, d6
vabal.u8 q11, d1, d7
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q9, d0, d16
vabal.u8 q9, d1, d17
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
mov lr, #7
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
pixel_sad_4_16x8_loop_0:
//Loading a horizontal line data (16 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {q0}, [r0], r1 //save pix1
vmov.8 q1, q10 //save pix2 - stride
vmov.8 q10, q2
vabal.u8 q15, d0, d2
vld1.8 {q2}, [r2], r3 //save pix2 + stride
vabal.u8 q15, d1, d3
vld1.8 {q3}, [r4], r3 //save pix2 - 1
vabal.u8 q13, d0, d4
vld1.8 {q8}, [r5], r3 //save pix2 + 1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vabal.u8 q13, d1, d5
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
subs lr, #1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabal.u8 q11, d0, d6
vabal.u8 q11, d1, d7
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabal.u8 q9, d0, d16
vabal.u8 q9, d1, d17
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
bne pixel_sad_4_16x8_loop_0
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Save SAD to 'r0'
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldr r0, [sp, #12]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vadd.u16 d0, d30, d31
vadd.u16 d1, d26, d27
vadd.u16 d2, d22, d23
vadd.u16 d3, d18, d19
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u16 q0, q0
vpaddl.u16 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u32 q0, q0
vpaddl.u32 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vst4.32 {d0[0],d1[0],d2[0],d3[0]}, [r0]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldmia sp!, {r4-r5, lr}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSadFour8x16_neon
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
stmdb sp!, {r4-r5, lr}
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Generate the pix2 start addr
sub r4, r2, #1
add r5, r2, #1
sub r2, r3
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Loading a horizontal line data (8 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d0}, [r0], r1 //save pix1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d1}, [r2], r3 //save pix2 - stride
vld1.8 {d6}, [r2], r3 //save pix2
vld1.8 {d2}, [r2], r3 //save pix2 + stride
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d3}, [r4], r3 //save pix2 - 1
vld1.8 {d4}, [r5], r3 //save pix2 + 1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Do the SAD for 8 bytes
vabdl.u8 q15, d0, d1
vabdl.u8 q14, d0, d2
vabdl.u8 q13, d0, d3
vabdl.u8 q12, d0, d4
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
mov lr, #15
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
pixel_sad_4_8x16_loop_0:
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Loading a horizontal line data (8 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d0}, [r0], r1 //save pix1
vmov.8 d1, d6 //save pix2 - stride
vmov.8 d6, d2
vld1.8 {d2}, [r2], r3 //save pix2 + stride
vld1.8 {d3}, [r4], r3 //save pix2 - 1
vabal.u8 q15, d0, d1
vld1.8 {d4}, [r5], r3 //save pix2 + 1
//Do the SAD for 8 bytes
vabal.u8 q14, d0, d2
vabal.u8 q13, d0, d3
vabal.u8 q12, d0, d4
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
subs lr, #1
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
bne pixel_sad_4_8x16_loop_0
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Save SAD to 'r0'
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldr r0, [sp, #12]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vadd.u16 d0, d30, d31
vadd.u16 d1, d28, d29
vadd.u16 d2, d26, d27
vadd.u16 d3, d24, d25
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u16 q0, q0
vpaddl.u16 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u32 q0, q0
vpaddl.u32 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vst4.32 {d0[0],d1[0],d2[0],d3[0]}, [r0]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldmia sp!, {r4-r5, lr}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSadFour8x8_neon
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
stmdb sp!, {r4-r5, lr}
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Generate the pix2 start addr
sub r4, r2, #1
add r5, r2, #1
sub r2, r3
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Loading a horizontal line data (8 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d0}, [r0], r1 //save pix1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d1}, [r2], r3 //save pix2 - stride
vld1.8 {d6}, [r2], r3 //save pix2
vld1.8 {d2}, [r2], r3 //save pix2 + stride
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d3}, [r4], r3 //save pix2 - 1
vld1.8 {d4}, [r5], r3 //save pix2 + 1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Do the SAD for 8 bytes
vabdl.u8 q15, d0, d1
vabdl.u8 q14, d0, d2
vabdl.u8 q13, d0, d3
vabdl.u8 q12, d0, d4
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
mov lr, #7
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
pixel_sad_4_8x8_loop_0:
//Loading a horizontal line data (8 bytes)
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.8 {d0}, [r0], r1 //save pix1
vmov.8 d1, d6 //save pix2 - stride
vmov.8 d6, d2
vld1.8 {d2}, [r2], r3 //save pix2 + stride
vld1.8 {d3}, [r4], r3 //save pix2 - 1
vabal.u8 q15, d0, d1
vld1.8 {d4}, [r5], r3 //save pix2 + 1
//Do the SAD for 8 bytes
vabal.u8 q14, d0, d2
vabal.u8 q13, d0, d3
vabal.u8 q12, d0, d4
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
subs lr, #1
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
bne pixel_sad_4_8x8_loop_0
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Save SAD to 'r0'
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldr r0, [sp, #12]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vadd.u16 d0, d30, d31
vadd.u16 d1, d28, d29
vadd.u16 d2, d26, d27
vadd.u16 d3, d24, d25
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u16 q0, q0
vpaddl.u16 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u32 q0, q0
vpaddl.u32 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vst4.32 {d0[0],d1[0],d2[0],d3[0]}, [r0]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
ldmia sp!, {r4-r5, lr}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSadFour4x4_neon
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.32 {d0[0]}, [r0], r1
vld1.32 {d0[1]}, [r0], r1
vld1.32 {d1[0]}, [r0], r1
vld1.32 {d1[1]}, [r0]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
sub r0, r2, r3
vld1.32 {d2[0]}, [r0], r3
vld1.32 {d2[1]}, [r0], r3
vld1.32 {d3[0]}, [r0], r3
vld1.32 {d3[1]}, [r0], r3
vld1.32 {d4[0]}, [r0], r3
vld1.32 {d4[1]}, [r0]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
sub r0, r2, #1
vld1.32 {d5[0]}, [r0], r3
vld1.32 {d5[1]}, [r0], r3
vld1.32 {d6[0]}, [r0], r3
vld1.32 {d6[1]}, [r0]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
add r0, r2, #1
vld1.32 {d7[0]}, [r0], r3
vld1.32 {d7[1]}, [r0], r3
vld1.32 {d8[0]}, [r0], r3
vld1.32 {d8[1]}, [r0]
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q15, d0, d2
vabdl.u8 q14, d1, d3
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q13, d0, d3
vabdl.u8 q12, d1, d4
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q11, d0, d5
vabdl.u8 q10, d1, d6
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vabdl.u8 q9, d0, d7
vabdl.u8 q8, d1, d8
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
//Save SAD to 'r4'
ldr r0, [sp]
vadd.u16 q0, q14, q15
vadd.u16 q1, q12, q13
vadd.u16 q2, q10, q11
vadd.u16 q3, q8 , q9
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vadd.u16 d0, d1
vadd.u16 d1, d2, d3
vadd.u16 d2, d4, d5
vadd.u16 d3, d6, d7
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u16 q0, q0
vpaddl.u16 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vpaddl.u32 q0, q0
vpaddl.u32 q1, q1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vst4.32 {d0[0],d1[0],d2[0],d3[0]}, [r0]
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSatd16x16_neon
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpush {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_16x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q0, q2
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_16x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q2
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_16x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q2
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_16x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q2
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 d0, d14, d15
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.32 r0, d0[0]
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpop {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSatd16x8_neon
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpush {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_16x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q0, q2
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_16x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q2
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 d0, d14, d15
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.32 r0, d0[0]
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpop {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSatd8x16_neon
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpush {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_8x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q0, q1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_8x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_8x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_8x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 d0, d14, d15
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.32 r0, d0[0]
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpop {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSatd8x8_neon
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpush {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_8x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q0, q1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
SATD_8x4
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 q7, q7, q0
vadd.u16 q7, q7, q1
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vadd.u16 d0, d14, d15
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
vmov.32 r0, d0[0]
Push clobbered neon registers on the stack According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use more than 12 of the qX registers must push the clobbered registers on the stack in order to be able to restore them afterwards. In functions that don't use all 16 registers, but clobber some of the callee saved registers q4-q7, one or more of them are remapped to reduce the number of registers that have to be saved/restored. This incurs a very small (around 0.5%) slowdown in the decoder and encoder.
2014-03-09 11:53:38 +01:00
vpop {q7}
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
WELS_ASM_FUNC_END
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
WELS_ASM_FUNC_BEGIN WelsSampleSatd4x4_neon
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Load the pix1 data --- 16 bytes
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.32 {d0[0]}, [r0], r1
vld1.32 {d0[1]}, [r0], r1
vld1.32 {d1[0]}, [r0], r1
vld1.32 {d1[1]}, [r0]
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
//Load the pix2 data --- 16 bytes
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vld1.32 {d2[0]}, [r2], r3
vld1.32 {d2[1]}, [r2], r3
vld1.32 {d3[0]}, [r2], r3
vld1.32 {d3[1]}, [r2]
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
//Get the difference
vsubl.u8 q15, d0, d2 //{0,1,2,3,4,5,6,7}
vsubl.u8 q14, d1, d3 //{8,9,10,11,12,13,14,15}
//Do the vertical transform
vadd.s16 q13, q15, q14 //{0,4,8,12,1,5,9,13}
vsub.s16 q12, q15, q14 //{2,6,10,14,3,7,11,15}
vswp d27, d24
vadd.s16 q15, q13, q12 //{0,1,2,3,4,5,6,7}
vsub.s16 q14, q13, q12 //{12,13,14,15,8,9,10,11}
//Do the horizontal transform
vtrn.32 q15, q14
vadd.s16 q13, q15, q14
vsub.s16 q12, q15, q14
vtrn.16 q13, q12
vadd.s16 q15, q13, q12
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
//Do the SAD
vabs.s16 q15, q15
Partly add arm asm code to encoder.
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vabd.s16 q14, q13, q12
vadd.u16 q0, q15, q14
vrhadd.u16 d0, d1
Add arm asm code for processing.
2014-03-05 09:54:05 +01:00
vpaddl.u16 d0, d0
vpaddl.u32 d0, d0
Partly add arm asm code to encoder.
2014-03-04 09:49:34 +01:00
Convert all tabs to spaces in assembly sources, unify indentation Previously the assembly sources had mixed indentation consisting of both spaces and tabs, making it quite hard to read unless the right tab size was used in the editor. Tabs have been interpreted as 4 spaces in most cases, matching the surrounding code.
2014-05-31 13:13:34 +02:00
vmov.u32 r0, d0[0]
Partly add arm asm code to encoder.
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WELS_ASM_FUNC_END
#endif
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