972 lines
29 KiB
C
972 lines
29 KiB
C
/*
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* Copyright (C) 2010 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* ChangeLog for this library:
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*
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* NDK r8d: Add android_setCpu().
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*
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* NDK r8c: Add new ARM CPU features: VFPv2, VFP_D32, VFP_FP16,
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* VFP_FMA, NEON_FMA, IDIV_ARM, IDIV_THUMB2 and iWMMXt.
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*
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* Rewrite the code to parse /proc/self/auxv instead of
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* the "Features" field in /proc/cpuinfo.
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*
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* Dynamically allocate the buffer that hold the content
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* of /proc/cpuinfo to deal with newer hardware.
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*
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* NDK r7c: Fix CPU count computation. The old method only reported the
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* number of _active_ CPUs when the library was initialized,
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* which could be less than the real total.
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*
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* NDK r5: Handle buggy kernels which report a CPU Architecture number of 7
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* for an ARMv6 CPU (see below).
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*
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* Handle kernels that only report 'neon', and not 'vfpv3'
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* (VFPv3 is mandated by the ARM architecture is Neon is implemented)
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*
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* Handle kernels that only report 'vfpv3d16', and not 'vfpv3'
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*
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* Fix x86 compilation. Report ANDROID_CPU_FAMILY_X86 in
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* android_getCpuFamily().
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*
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* NDK r4: Initial release
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*/
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#include <sys/system_properties.h>
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#ifdef __arm__
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#include <machine/cpu-features.h>
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#endif
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#include <pthread.h>
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#include "cpu-features.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <fcntl.h>
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#include <errno.h>
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static pthread_once_t g_once;
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static int g_inited;
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static AndroidCpuFamily g_cpuFamily;
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static uint64_t g_cpuFeatures;
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static int g_cpuCount;
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static const int android_cpufeatures_debug = 0;
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#ifdef __arm__
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# define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_ARM
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#elif defined __i386__
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# define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_X86
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#else
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# define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_UNKNOWN
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#endif
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#define D(...) \
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do { \
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if (android_cpufeatures_debug) { \
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printf(__VA_ARGS__); fflush(stdout); \
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} \
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} while (0)
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#ifdef __i386__
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static __inline__ void x86_cpuid(int func, int values[4])
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{
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int a, b, c, d;
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/* We need to preserve ebx since we're compiling PIC code */
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/* this means we can't use "=b" for the second output register */
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__asm__ __volatile__ ( \
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"push %%ebx\n"
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"cpuid\n" \
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"mov %%ebx, %1\n"
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"pop %%ebx\n"
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: "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
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: "a" (func) \
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);
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values[0] = a;
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values[1] = b;
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values[2] = c;
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values[3] = d;
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}
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#endif
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/* Get the size of a file by reading it until the end. This is needed
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* because files under /proc do not always return a valid size when
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* using fseek(0, SEEK_END) + ftell(). Nor can they be mmap()-ed.
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*/
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static int
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get_file_size(const char* pathname)
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{
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int fd, ret, result = 0;
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char buffer[256];
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fd = open(pathname, O_RDONLY);
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if (fd < 0) {
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D("Can't open %s: %s\n", pathname, strerror(errno));
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return -1;
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}
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for (;;) {
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int ret = read(fd, buffer, sizeof buffer);
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if (ret < 0) {
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if (errno == EINTR)
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continue;
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D("Error while reading %s: %s\n", pathname, strerror(errno));
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break;
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}
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if (ret == 0)
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break;
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result += ret;
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}
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close(fd);
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return result;
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}
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/* Read the content of /proc/cpuinfo into a user-provided buffer.
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* Return the length of the data, or -1 on error. Does *not*
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* zero-terminate the content. Will not read more
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* than 'buffsize' bytes.
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*/
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static int
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read_file(const char* pathname, char* buffer, size_t buffsize)
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{
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int fd, count;
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fd = open(pathname, O_RDONLY);
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if (fd < 0) {
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D("Could not open %s: %s\n", pathname, strerror(errno));
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return -1;
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}
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count = 0;
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while (count < (int)buffsize) {
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int ret = read(fd, buffer + count, buffsize - count);
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if (ret < 0) {
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if (errno == EINTR)
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continue;
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D("Error while reading from %s: %s\n", pathname, strerror(errno));
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if (count == 0)
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count = -1;
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break;
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}
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if (ret == 0)
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break;
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count += ret;
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}
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close(fd);
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return count;
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}
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/* Extract the content of a the first occurence of a given field in
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* the content of /proc/cpuinfo and return it as a heap-allocated
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* string that must be freed by the caller.
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*
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* Return NULL if not found
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*/
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static char*
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extract_cpuinfo_field(const char* buffer, int buflen, const char* field)
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{
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int fieldlen = strlen(field);
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const char* bufend = buffer + buflen;
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char* result = NULL;
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int len, ignore;
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const char *p, *q;
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/* Look for first field occurence, and ensures it starts the line. */
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p = buffer;
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bufend = buffer + buflen;
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for (;;) {
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p = memmem(p, bufend-p, field, fieldlen);
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if (p == NULL)
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goto EXIT;
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if (p == buffer || p[-1] == '\n')
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break;
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p += fieldlen;
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}
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/* Skip to the first column followed by a space */
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p += fieldlen;
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p = memchr(p, ':', bufend-p);
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if (p == NULL || p[1] != ' ')
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goto EXIT;
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/* Find the end of the line */
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p += 2;
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q = memchr(p, '\n', bufend-p);
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if (q == NULL)
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q = bufend;
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/* Copy the line into a heap-allocated buffer */
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len = q-p;
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result = malloc(len+1);
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if (result == NULL)
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goto EXIT;
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memcpy(result, p, len);
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result[len] = '\0';
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EXIT:
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return result;
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}
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/* Like strlen(), but for constant string literals */
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#define STRLEN_CONST(x) ((sizeof(x)-1)
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/* Checks that a space-separated list of items contains one given 'item'.
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* Returns 1 if found, 0 otherwise.
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*/
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static int
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has_list_item(const char* list, const char* item)
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{
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const char* p = list;
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int itemlen = strlen(item);
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if (list == NULL)
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return 0;
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while (*p) {
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const char* q;
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/* skip spaces */
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while (*p == ' ' || *p == '\t')
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p++;
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/* find end of current list item */
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q = p;
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while (*q && *q != ' ' && *q != '\t')
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q++;
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if (itemlen == q-p && !memcmp(p, item, itemlen))
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return 1;
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/* skip to next item */
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p = q;
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}
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return 0;
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}
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/* Parse an decimal integer starting from 'input', but not going further
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* than 'limit'. Return the value into '*result'.
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*
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* NOTE: Does not skip over leading spaces, or deal with sign characters.
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* NOTE: Ignores overflows.
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*
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* The function returns NULL in case of error (bad format), or the new
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* position after the decimal number in case of success (which will always
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* be <= 'limit').
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*/
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static const char*
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parse_decimal(const char* input, const char* limit, int* result)
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{
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const char* p = input;
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int val = 0;
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while (p < limit) {
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int d = (*p - '0');
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if ((unsigned)d >= 10U)
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break;
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val = val*10 + d;
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p++;
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}
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if (p == input)
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return NULL;
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*result = val;
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return p;
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}
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/* This small data type is used to represent a CPU list / mask, as read
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* from sysfs on Linux. See http://www.kernel.org/doc/Documentation/cputopology.txt
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*
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* For now, we don't expect more than 32 cores on mobile devices, so keep
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* everything simple.
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*/
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typedef struct {
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uint32_t mask;
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} CpuList;
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static __inline__ void
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cpulist_init(CpuList* list) {
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list->mask = 0;
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}
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static __inline__ void
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cpulist_and(CpuList* list1, CpuList* list2) {
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list1->mask &= list2->mask;
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}
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static __inline__ void
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cpulist_set(CpuList* list, int index) {
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if ((unsigned)index < 32) {
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list->mask |= (uint32_t)(1U << index);
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}
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}
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static __inline__ int
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cpulist_count(CpuList* list) {
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return __builtin_popcount(list->mask);
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}
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/* Parse a textual list of cpus and store the result inside a CpuList object.
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* Input format is the following:
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* - comma-separated list of items (no spaces)
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* - each item is either a single decimal number (cpu index), or a range made
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* of two numbers separated by a single dash (-). Ranges are inclusive.
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*
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* Examples: 0
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* 2,4-127,128-143
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* 0-1
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*/
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static void
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cpulist_parse(CpuList* list, const char* line, int line_len)
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{
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const char* p = line;
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const char* end = p + line_len;
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const char* q;
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/* NOTE: the input line coming from sysfs typically contains a
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* trailing newline, so take care of it in the code below
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*/
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while (p < end && *p != '\n')
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{
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int val, start_value, end_value;
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|
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/* Find the end of current item, and put it into 'q' */
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q = memchr(p, ',', end-p);
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if (q == NULL) {
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q = end;
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}
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/* Get first value */
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p = parse_decimal(p, q, &start_value);
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if (p == NULL)
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goto BAD_FORMAT;
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end_value = start_value;
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/* If we're not at the end of the item, expect a dash and
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* and integer; extract end value.
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*/
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if (p < q && *p == '-') {
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p = parse_decimal(p+1, q, &end_value);
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if (p == NULL)
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goto BAD_FORMAT;
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}
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/* Set bits CPU list bits */
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for (val = start_value; val <= end_value; val++) {
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cpulist_set(list, val);
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}
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/* Jump to next item */
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p = q;
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if (p < end)
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p++;
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}
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BAD_FORMAT:
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;
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}
|
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|
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/* Read a CPU list from one sysfs file */
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static void
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cpulist_read_from(CpuList* list, const char* filename)
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{
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char file[64];
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int filelen;
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cpulist_init(list);
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|
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filelen = read_file(filename, file, sizeof file);
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if (filelen < 0) {
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D("Could not read %s: %s\n", filename, strerror(errno));
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return;
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}
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cpulist_parse(list, file, filelen);
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}
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|
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// See <asm/hwcap.h> kernel header.
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#define HWCAP_VFP (1 << 6)
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#define HWCAP_IWMMXT (1 << 9)
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#define HWCAP_NEON (1 << 12)
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#define HWCAP_VFPv3 (1 << 13)
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#define HWCAP_VFPv3D16 (1 << 14)
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#define HWCAP_VFPv4 (1 << 16)
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#define HWCAP_IDIVA (1 << 17)
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#define HWCAP_IDIVT (1 << 18)
|
|
|
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#define AT_HWCAP 16
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|
|
#if defined(__arm__)
|
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/* Compute the ELF HWCAP flags.
|
|
*/
|
|
static uint32_t
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get_elf_hwcap(const char* cpuinfo, int cpuinfo_len)
|
|
{
|
|
/* IMPORTANT:
|
|
* Accessing /proc/self/auxv doesn't work anymore on all
|
|
* platform versions. More specifically, when running inside
|
|
* a regular application process, most of /proc/self/ will be
|
|
* non-readable, including /proc/self/auxv. This doesn't
|
|
* happen however if the application is debuggable, or when
|
|
* running under the "shell" UID, which is why this was not
|
|
* detected appropriately.
|
|
*/
|
|
#if 0
|
|
uint32_t result = 0;
|
|
const char filepath[] = "/proc/self/auxv";
|
|
int fd = open(filepath, O_RDONLY);
|
|
if (fd < 0) {
|
|
D("Could not open %s: %s\n", filepath, strerror(errno));
|
|
return 0;
|
|
}
|
|
|
|
struct { uint32_t tag; uint32_t value; } entry;
|
|
|
|
for (;;) {
|
|
int ret = read(fd, (char*)&entry, sizeof entry);
|
|
if (ret < 0) {
|
|
if (errno == EINTR)
|
|
continue;
|
|
D("Error while reading %s: %s\n", filepath, strerror(errno));
|
|
break;
|
|
}
|
|
// Detect end of list.
|
|
if (ret == 0 || (entry.tag == 0 && entry.value == 0))
|
|
break;
|
|
if (entry.tag == AT_HWCAP) {
|
|
result = entry.value;
|
|
break;
|
|
}
|
|
}
|
|
close(fd);
|
|
return result;
|
|
#else
|
|
// Recreate ELF hwcaps by parsing /proc/cpuinfo Features tag.
|
|
uint32_t hwcaps = 0;
|
|
|
|
char* cpuFeatures = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "Features");
|
|
|
|
if (cpuFeatures != NULL) {
|
|
D("Found cpuFeatures = '%s'\n", cpuFeatures);
|
|
|
|
if (has_list_item(cpuFeatures, "vfp"))
|
|
hwcaps |= HWCAP_VFP;
|
|
if (has_list_item(cpuFeatures, "vfpv3"))
|
|
hwcaps |= HWCAP_VFPv3;
|
|
if (has_list_item(cpuFeatures, "vfpv3d16"))
|
|
hwcaps |= HWCAP_VFPv3D16;
|
|
if (has_list_item(cpuFeatures, "vfpv4"))
|
|
hwcaps |= HWCAP_VFPv4;
|
|
if (has_list_item(cpuFeatures, "neon"))
|
|
hwcaps |= HWCAP_NEON;
|
|
if (has_list_item(cpuFeatures, "idiva"))
|
|
hwcaps |= HWCAP_IDIVA;
|
|
if (has_list_item(cpuFeatures, "idivt"))
|
|
hwcaps |= HWCAP_IDIVT;
|
|
if (has_list_item(cpuFeatures, "idiv"))
|
|
hwcaps |= HWCAP_IDIVA | HWCAP_IDIVT;
|
|
if (has_list_item(cpuFeatures, "iwmmxt"))
|
|
hwcaps |= HWCAP_IWMMXT;
|
|
|
|
free(cpuFeatures);
|
|
}
|
|
return hwcaps;
|
|
#endif
|
|
}
|
|
#endif /* __arm__ */
|
|
|
|
/* Return the number of cpus present on a given device.
|
|
*
|
|
* To handle all weird kernel configurations, we need to compute the
|
|
* intersection of the 'present' and 'possible' CPU lists and count
|
|
* the result.
|
|
*/
|
|
static int
|
|
get_cpu_count(void)
|
|
{
|
|
CpuList cpus_present[1];
|
|
CpuList cpus_possible[1];
|
|
|
|
cpulist_read_from(cpus_present, "/sys/devices/system/cpu/present");
|
|
cpulist_read_from(cpus_possible, "/sys/devices/system/cpu/possible");
|
|
|
|
/* Compute the intersection of both sets to get the actual number of
|
|
* CPU cores that can be used on this device by the kernel.
|
|
*/
|
|
cpulist_and(cpus_present, cpus_possible);
|
|
|
|
return cpulist_count(cpus_present);
|
|
}
|
|
|
|
static void
|
|
android_cpuInitFamily(void)
|
|
{
|
|
#if defined(__ARM_ARCH__)
|
|
g_cpuFamily = ANDROID_CPU_FAMILY_ARM;
|
|
#elif defined(__i386__)
|
|
g_cpuFamily = ANDROID_CPU_FAMILY_X86;
|
|
#elif defined(_MIPS_ARCH)
|
|
g_cpuFamily = ANDROID_CPU_FAMILY_MIPS;
|
|
#else
|
|
g_cpuFamily = ANDROID_CPU_FAMILY_UNKNOWN;
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
android_cpuInit(void)
|
|
{
|
|
char* cpuinfo = NULL;
|
|
int cpuinfo_len;
|
|
|
|
android_cpuInitFamily();
|
|
|
|
g_cpuFeatures = 0;
|
|
g_cpuCount = 1;
|
|
g_inited = 1;
|
|
|
|
cpuinfo_len = get_file_size("/proc/cpuinfo");
|
|
if (cpuinfo_len < 0) {
|
|
D("cpuinfo_len cannot be computed!");
|
|
return;
|
|
}
|
|
cpuinfo = malloc(cpuinfo_len);
|
|
if (cpuinfo == NULL) {
|
|
D("cpuinfo buffer could not be allocated");
|
|
return;
|
|
}
|
|
cpuinfo_len = read_file("/proc/cpuinfo", cpuinfo, cpuinfo_len);
|
|
D("cpuinfo_len is (%d):\n%.*s\n", cpuinfo_len,
|
|
cpuinfo_len >= 0 ? cpuinfo_len : 0, cpuinfo);
|
|
|
|
if (cpuinfo_len < 0) /* should not happen */ {
|
|
free(cpuinfo);
|
|
return;
|
|
}
|
|
|
|
/* Count the CPU cores, the value may be 0 for single-core CPUs */
|
|
g_cpuCount = get_cpu_count();
|
|
if (g_cpuCount == 0) {
|
|
g_cpuCount = 1;
|
|
}
|
|
|
|
D("found cpuCount = %d\n", g_cpuCount);
|
|
|
|
#ifdef __ARM_ARCH__
|
|
{
|
|
char* features = NULL;
|
|
char* architecture = NULL;
|
|
|
|
/* Extract architecture from the "CPU Architecture" field.
|
|
* The list is well-known, unlike the the output of
|
|
* the 'Processor' field which can vary greatly.
|
|
*
|
|
* See the definition of the 'proc_arch' array in
|
|
* $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in
|
|
* same file.
|
|
*/
|
|
char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture");
|
|
|
|
if (cpuArch != NULL) {
|
|
char* end;
|
|
long archNumber;
|
|
int hasARMv7 = 0;
|
|
|
|
D("found cpuArch = '%s'\n", cpuArch);
|
|
|
|
/* read the initial decimal number, ignore the rest */
|
|
archNumber = strtol(cpuArch, &end, 10);
|
|
|
|
/* Here we assume that ARMv8 will be upwards compatible with v7
|
|
* in the future. Unfortunately, there is no 'Features' field to
|
|
* indicate that Thumb-2 is supported.
|
|
*/
|
|
if (end > cpuArch && archNumber >= 7) {
|
|
hasARMv7 = 1;
|
|
}
|
|
|
|
/* Unfortunately, it seems that certain ARMv6-based CPUs
|
|
* report an incorrect architecture number of 7!
|
|
*
|
|
* See http://code.google.com/p/android/issues/detail?id=10812
|
|
*
|
|
* We try to correct this by looking at the 'elf_format'
|
|
* field reported by the 'Processor' field, which is of the
|
|
* form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for
|
|
* an ARMv6-one.
|
|
*/
|
|
if (hasARMv7) {
|
|
char* cpuProc = extract_cpuinfo_field(cpuinfo, cpuinfo_len,
|
|
"Processor");
|
|
if (cpuProc != NULL) {
|
|
D("found cpuProc = '%s'\n", cpuProc);
|
|
if (has_list_item(cpuProc, "(v6l)")) {
|
|
D("CPU processor and architecture mismatch!!\n");
|
|
hasARMv7 = 0;
|
|
}
|
|
free(cpuProc);
|
|
}
|
|
}
|
|
|
|
if (hasARMv7) {
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_ARMv7;
|
|
}
|
|
|
|
/* The LDREX / STREX instructions are available from ARMv6 */
|
|
if (archNumber >= 6) {
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_LDREX_STREX;
|
|
}
|
|
|
|
free(cpuArch);
|
|
}
|
|
|
|
/* Extract the list of CPU features from ELF hwcaps */
|
|
uint32_t hwcaps = get_elf_hwcap(cpuinfo, cpuinfo_len);
|
|
|
|
if (hwcaps != 0) {
|
|
int has_vfp = (hwcaps & HWCAP_VFP);
|
|
int has_vfpv3 = (hwcaps & HWCAP_VFPv3);
|
|
int has_vfpv3d16 = (hwcaps & HWCAP_VFPv3D16);
|
|
int has_vfpv4 = (hwcaps & HWCAP_VFPv4);
|
|
int has_neon = (hwcaps & HWCAP_NEON);
|
|
int has_idiva = (hwcaps & HWCAP_IDIVA);
|
|
int has_idivt = (hwcaps & HWCAP_IDIVT);
|
|
int has_iwmmxt = (hwcaps & HWCAP_IWMMXT);
|
|
|
|
// The kernel does a poor job at ensuring consistency when
|
|
// describing CPU features. So lots of guessing is needed.
|
|
|
|
// 'vfpv4' implies VFPv3|VFP_FMA|FP16
|
|
if (has_vfpv4)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 |
|
|
ANDROID_CPU_ARM_FEATURE_VFP_FP16 |
|
|
ANDROID_CPU_ARM_FEATURE_VFP_FMA;
|
|
|
|
// 'vfpv3' or 'vfpv3d16' imply VFPv3. Note that unlike GCC,
|
|
// a value of 'vfpv3' doesn't necessarily mean that the D32
|
|
// feature is present, so be conservative. All CPUs in the
|
|
// field that support D32 also support NEON, so this should
|
|
// not be a problem in practice.
|
|
if (has_vfpv3 || has_vfpv3d16)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3;
|
|
|
|
// 'vfp' is super ambiguous. Depending on the kernel, it can
|
|
// either mean VFPv2 or VFPv3. Make it depend on ARMv7.
|
|
if (has_vfp) {
|
|
if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_ARMv7)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3;
|
|
else
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2;
|
|
}
|
|
|
|
// Neon implies VFPv3|D32, and if vfpv4 is detected, NEON_FMA
|
|
if (has_neon) {
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 |
|
|
ANDROID_CPU_ARM_FEATURE_NEON |
|
|
ANDROID_CPU_ARM_FEATURE_VFP_D32;
|
|
if (has_vfpv4)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_NEON_FMA;
|
|
}
|
|
|
|
// VFPv3 implies VFPv2 and ARMv7
|
|
if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_VFPv3)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2 |
|
|
ANDROID_CPU_ARM_FEATURE_ARMv7;
|
|
|
|
// Note that some buggy kernels do not report these even when
|
|
// the CPU actually support the division instructions. However,
|
|
// assume that if 'vfpv4' is detected, then the CPU supports
|
|
// sdiv/udiv properly.
|
|
if (has_idiva || has_vfpv4)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM;
|
|
if (has_idivt || has_vfpv4)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2;
|
|
|
|
if (has_iwmmxt)
|
|
g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_iWMMXt;
|
|
}
|
|
}
|
|
#endif /* __ARM_ARCH__ */
|
|
|
|
#ifdef __i386__
|
|
int regs[4];
|
|
|
|
/* According to http://en.wikipedia.org/wiki/CPUID */
|
|
#define VENDOR_INTEL_b 0x756e6547
|
|
#define VENDOR_INTEL_c 0x6c65746e
|
|
#define VENDOR_INTEL_d 0x49656e69
|
|
|
|
x86_cpuid(0, regs);
|
|
int vendorIsIntel = (regs[1] == VENDOR_INTEL_b &&
|
|
regs[2] == VENDOR_INTEL_c &&
|
|
regs[3] == VENDOR_INTEL_d);
|
|
|
|
x86_cpuid(1, regs);
|
|
if ((regs[2] & (1 << 9)) != 0) {
|
|
g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSSE3;
|
|
}
|
|
if ((regs[2] & (1 << 23)) != 0) {
|
|
g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT;
|
|
}
|
|
if (vendorIsIntel && (regs[2] & (1 << 22)) != 0) {
|
|
g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
|
|
}
|
|
#endif
|
|
|
|
free(cpuinfo);
|
|
}
|
|
|
|
|
|
AndroidCpuFamily
|
|
android_getCpuFamily(void)
|
|
{
|
|
pthread_once(&g_once, android_cpuInit);
|
|
return g_cpuFamily;
|
|
}
|
|
|
|
|
|
uint64_t
|
|
android_getCpuFeatures(void)
|
|
{
|
|
pthread_once(&g_once, android_cpuInit);
|
|
return g_cpuFeatures;
|
|
}
|
|
|
|
|
|
int
|
|
android_getCpuCount(void)
|
|
{
|
|
pthread_once(&g_once, android_cpuInit);
|
|
return g_cpuCount;
|
|
}
|
|
|
|
static void
|
|
android_cpuInitDummy(void)
|
|
{
|
|
g_inited = 1;
|
|
}
|
|
|
|
int
|
|
android_setCpu(int cpu_count, uint64_t cpu_features)
|
|
{
|
|
/* Fail if the library was already initialized. */
|
|
if (g_inited)
|
|
return 0;
|
|
|
|
android_cpuInitFamily();
|
|
g_cpuCount = (cpu_count <= 0 ? 1 : cpu_count);
|
|
g_cpuFeatures = cpu_features;
|
|
pthread_once(&g_once, android_cpuInitDummy);
|
|
|
|
return 1;
|
|
}
|
|
|
|
/*
|
|
* Technical note: Making sense of ARM's FPU architecture versions.
|
|
*
|
|
* FPA was ARM's first attempt at an FPU architecture. There is no Android
|
|
* device that actually uses it since this technology was already obsolete
|
|
* when the project started. If you see references to FPA instructions
|
|
* somewhere, you can be sure that this doesn't apply to Android at all.
|
|
*
|
|
* FPA was followed by "VFP", soon renamed "VFPv1" due to the emergence of
|
|
* new versions / additions to it. ARM considers this obsolete right now,
|
|
* and no known Android device implements it either.
|
|
*
|
|
* VFPv2 added a few instructions to VFPv1, and is an *optional* extension
|
|
* supported by some ARMv5TE, ARMv6 and ARMv6T2 CPUs. Note that a device
|
|
* supporting the 'armeabi' ABI doesn't necessarily support these.
|
|
*
|
|
* VFPv3-D16 adds a few instructions on top of VFPv2 and is typically used
|
|
* on ARMv7-A CPUs which implement a FPU. Note that it is also mandated
|
|
* by the Android 'armeabi-v7a' ABI. The -D16 suffix in its name means
|
|
* that it provides 16 double-precision FPU registers (d0-d15) and 32
|
|
* single-precision ones (s0-s31) which happen to be mapped to the same
|
|
* register banks.
|
|
*
|
|
* VFPv3-D32 is the name of an extension to VFPv3-D16 that provides 16
|
|
* additional double precision registers (d16-d31). Note that there are
|
|
* still only 32 single precision registers.
|
|
*
|
|
* VFPv3xD is a *subset* of VFPv3-D16 that only provides single-precision
|
|
* registers. It is only used on ARMv7-M (i.e. on micro-controllers) which
|
|
* are not supported by Android. Note that it is not compatible with VFPv2.
|
|
*
|
|
* NOTE: The term 'VFPv3' usually designate either VFPv3-D16 or VFPv3-D32
|
|
* depending on context. For example GCC uses it for VFPv3-D32, but
|
|
* the Linux kernel code uses it for VFPv3-D16 (especially in
|
|
* /proc/cpuinfo). Always try to use the full designation when
|
|
* possible.
|
|
*
|
|
* NEON, a.k.a. "ARM Advanced SIMD" is an extension that provides
|
|
* instructions to perform parallel computations on vectors of 8, 16,
|
|
* 32, 64 and 128 bit quantities. NEON requires VFPv32-D32 since all
|
|
* NEON registers are also mapped to the same register banks.
|
|
*
|
|
* VFPv4-D16, adds a few instructions on top of VFPv3-D16 in order to
|
|
* perform fused multiply-accumulate on VFP registers, as well as
|
|
* half-precision (16-bit) conversion operations.
|
|
*
|
|
* VFPv4-D32 is VFPv4-D16 with 32, instead of 16, FPU double precision
|
|
* registers.
|
|
*
|
|
* VPFv4-NEON is VFPv4-D32 with NEON instructions. It also adds fused
|
|
* multiply-accumulate instructions that work on the NEON registers.
|
|
*
|
|
* NOTE: Similarly, "VFPv4" might either reference VFPv4-D16 or VFPv4-D32
|
|
* depending on context.
|
|
*
|
|
* The following information was determined by scanning the binutils-2.22
|
|
* sources:
|
|
*
|
|
* Basic VFP instruction subsets:
|
|
*
|
|
* #define FPU_VFP_EXT_V1xD 0x08000000 // Base VFP instruction set.
|
|
* #define FPU_VFP_EXT_V1 0x04000000 // Double-precision insns.
|
|
* #define FPU_VFP_EXT_V2 0x02000000 // ARM10E VFPr1.
|
|
* #define FPU_VFP_EXT_V3xD 0x01000000 // VFPv3 single-precision.
|
|
* #define FPU_VFP_EXT_V3 0x00800000 // VFPv3 double-precision.
|
|
* #define FPU_NEON_EXT_V1 0x00400000 // Neon (SIMD) insns.
|
|
* #define FPU_VFP_EXT_D32 0x00200000 // Registers D16-D31.
|
|
* #define FPU_VFP_EXT_FP16 0x00100000 // Half-precision extensions.
|
|
* #define FPU_NEON_EXT_FMA 0x00080000 // Neon fused multiply-add
|
|
* #define FPU_VFP_EXT_FMA 0x00040000 // VFP fused multiply-add
|
|
*
|
|
* FPU types (excluding NEON)
|
|
*
|
|
* FPU_VFP_V1xD (EXT_V1xD)
|
|
* |
|
|
* +--------------------------+
|
|
* | |
|
|
* FPU_VFP_V1 (+EXT_V1) FPU_VFP_V3xD (+EXT_V2+EXT_V3xD)
|
|
* | |
|
|
* | |
|
|
* FPU_VFP_V2 (+EXT_V2) FPU_VFP_V4_SP_D16 (+EXT_FP16+EXT_FMA)
|
|
* |
|
|
* FPU_VFP_V3D16 (+EXT_Vx3D+EXT_V3)
|
|
* |
|
|
* +--------------------------+
|
|
* | |
|
|
* FPU_VFP_V3 (+EXT_D32) FPU_VFP_V4D16 (+EXT_FP16+EXT_FMA)
|
|
* | |
|
|
* | FPU_VFP_V4 (+EXT_D32)
|
|
* |
|
|
* FPU_VFP_HARD (+EXT_FMA+NEON_EXT_FMA)
|
|
*
|
|
* VFP architectures:
|
|
*
|
|
* ARCH_VFP_V1xD (EXT_V1xD)
|
|
* |
|
|
* +------------------+
|
|
* | |
|
|
* | ARCH_VFP_V3xD (+EXT_V2+EXT_V3xD)
|
|
* | |
|
|
* | ARCH_VFP_V3xD_FP16 (+EXT_FP16)
|
|
* | |
|
|
* | ARCH_VFP_V4_SP_D16 (+EXT_FMA)
|
|
* |
|
|
* ARCH_VFP_V1 (+EXT_V1)
|
|
* |
|
|
* ARCH_VFP_V2 (+EXT_V2)
|
|
* |
|
|
* ARCH_VFP_V3D16 (+EXT_V3xD+EXT_V3)
|
|
* |
|
|
* +-------------------+
|
|
* | |
|
|
* | ARCH_VFP_V3D16_FP16 (+EXT_FP16)
|
|
* |
|
|
* +-------------------+
|
|
* | |
|
|
* | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA)
|
|
* | |
|
|
* | ARCH_VFP_V4 (+EXT_D32)
|
|
* | |
|
|
* | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA)
|
|
* |
|
|
* ARCH_VFP_V3 (+EXT_D32)
|
|
* |
|
|
* +-------------------+
|
|
* | |
|
|
* | ARCH_VFP_V3_FP16 (+EXT_FP16)
|
|
* |
|
|
* ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON)
|
|
* |
|
|
* ARCH_NEON_FP16 (+EXT_FP16)
|
|
*
|
|
* -fpu=<name> values and their correspondance with FPU architectures above:
|
|
*
|
|
* {"vfp", FPU_ARCH_VFP_V2},
|
|
* {"vfp9", FPU_ARCH_VFP_V2},
|
|
* {"vfp3", FPU_ARCH_VFP_V3}, // For backwards compatbility.
|
|
* {"vfp10", FPU_ARCH_VFP_V2},
|
|
* {"vfp10-r0", FPU_ARCH_VFP_V1},
|
|
* {"vfpxd", FPU_ARCH_VFP_V1xD},
|
|
* {"vfpv2", FPU_ARCH_VFP_V2},
|
|
* {"vfpv3", FPU_ARCH_VFP_V3},
|
|
* {"vfpv3-fp16", FPU_ARCH_VFP_V3_FP16},
|
|
* {"vfpv3-d16", FPU_ARCH_VFP_V3D16},
|
|
* {"vfpv3-d16-fp16", FPU_ARCH_VFP_V3D16_FP16},
|
|
* {"vfpv3xd", FPU_ARCH_VFP_V3xD},
|
|
* {"vfpv3xd-fp16", FPU_ARCH_VFP_V3xD_FP16},
|
|
* {"neon", FPU_ARCH_VFP_V3_PLUS_NEON_V1},
|
|
* {"neon-fp16", FPU_ARCH_NEON_FP16},
|
|
* {"vfpv4", FPU_ARCH_VFP_V4},
|
|
* {"vfpv4-d16", FPU_ARCH_VFP_V4D16},
|
|
* {"fpv4-sp-d16", FPU_ARCH_VFP_V4_SP_D16},
|
|
* {"neon-vfpv4", FPU_ARCH_NEON_VFP_V4},
|
|
*
|
|
*
|
|
* Simplified diagram that only includes FPUs supported by Android:
|
|
* Only ARCH_VFP_V3D16 is actually mandated by the armeabi-v7a ABI,
|
|
* all others are optional and must be probed at runtime.
|
|
*
|
|
* ARCH_VFP_V3D16 (EXT_V1xD+EXT_V1+EXT_V2+EXT_V3xD+EXT_V3)
|
|
* |
|
|
* +-------------------+
|
|
* | |
|
|
* | ARCH_VFP_V3D16_FP16 (+EXT_FP16)
|
|
* |
|
|
* +-------------------+
|
|
* | |
|
|
* | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA)
|
|
* | |
|
|
* | ARCH_VFP_V4 (+EXT_D32)
|
|
* | |
|
|
* | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA)
|
|
* |
|
|
* ARCH_VFP_V3 (+EXT_D32)
|
|
* |
|
|
* +-------------------+
|
|
* | |
|
|
* | ARCH_VFP_V3_FP16 (+EXT_FP16)
|
|
* |
|
|
* ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON)
|
|
* |
|
|
* ARCH_NEON_FP16 (+EXT_FP16)
|
|
*
|
|
*/
|