diff --git a/modules/gpu/src/cuda/dynamic_smem.hpp b/modules/gpu/src/cuda/dynamic_smem.hpp new file mode 100644 index 000000000..d420c1eb5 --- /dev/null +++ b/modules/gpu/src/cuda/dynamic_smem.hpp @@ -0,0 +1,83 @@ +/*M/////////////////////////////////////////////////////////////////////////////////////// +// +// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. +// +// By downloading, copying, installing or using the software you agree to this license. +// If you do not agree to this license, do not download, install, +// copy or use the software. +// +// +// License Agreement +// For Open Source Computer Vision Library +// +// Copyright (C) 2000-2008, Intel Corporation, all rights reserved. +// Copyright (C) 2009, Willow Garage Inc., all rights reserved. +// Third party copyrights are property of their respective owners. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// +// * Redistribution's of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// * Redistribution's in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// * The name of the copyright holders may not be used to endorse or promote products +// derived from this software without specific prior written permission. +// +// This software is provided by the copyright holders and contributors "as is" and +// any express or implied warranties, including, but not limited to, the implied +// warranties of merchantability and fitness for a particular purpose are disclaimed. +// In no event shall the Intel Corporation or contributors be liable for any direct, +// indirect, incidental, special, exemplary, or consequential damages +// (including, but not limited to, procurement of substitute goods or services; +// loss of use, data, or profits; or business interruption) however caused +// and on any theory of liability, whether in contract, strict liability, +// or tort (including negligence or otherwise) arising in any way out of +// the use of this software, even if advised of the possibility of such damage. +// +//M*/ + + +namespace cv +{ + namespace gpu + { + namespace device + { + template struct DynamicSharedMem + { + __device__ operator T*() + { + extern __shared__ int __smem[]; + return (T*)__smem; + } + + __device__ operator const T*() const + { + extern __shared__ int __smem[]; + return (T*)__smem; + } + }; + + // specialize for double to avoid unaligned memory access compile errors + template<> struct DynamicSharedMem + { + __device__ operator double*() + { + extern __shared__ double __smem_d[]; + return (double*)__smem_d; + } + + __device__ operator const double*() const + { + extern __shared__ double __smem_d[]; + return (double*)__smem_d; + } + }; + } + + } +} \ No newline at end of file diff --git a/modules/gpu/src/cuda/limits_gpu.hpp b/modules/gpu/src/cuda/limits_gpu.hpp new file mode 100644 index 000000000..83a0743b5 --- /dev/null +++ b/modules/gpu/src/cuda/limits_gpu.hpp @@ -0,0 +1,208 @@ +/*M/////////////////////////////////////////////////////////////////////////////////////// +// +// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. +// +// By downloading, copying, installing or using the software you agree to this license. +// If you do not agree to this license, do not download, install, +// copy or use the software. +// +// +// License Agreement +// For Open Source Computer Vision Library +// +// Copyright (C) 2000-2008, Intel Corporation, all rights reserved. +// Copyright (C) 2009, Willow Garage Inc., all rights reserved. +// Third party copyrights are property of their respective owners. +// +// Redistribution and use in source and binary forms, with or without modification, +// are permitted provided that the following conditions are met: +// +// * Redistribution's of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// * Redistribution's in binary form must reproduce the above copyright notice, +// this list of conditions and the following disclaimer in the documentation +// and/or other materials provided with the distribution. +// +// * The name of the copyright holders may not be used to endorse or promote products +// derived from this software without specific prior written permission. +// +// This software is provided by the copyright holders and contributors "as is" and +// any express or implied warranties, including, but not limited to, the implied +// warranties of merchantability and fitness for a particular purpose are disclaimed. +// In no event shall the Intel Corporation or contributors be liable for any direct, +// indirect, incidental, special, exemplary, or consequential damages +// (including, but not limited to, procurement of substitute goods or services; +// loss of use, data, or profits; or business interruption) however caused +// and on any theory of liability, whether in contract, strict liability, +// or tort (including negligence or otherwise) arising in any way out of +// the use of this software, even if advised of the possibility of such damage. +// +//M*/ + + +namespace cv +{ + namespace gpu + { + namespace device + { + template struct numeric_limits_gpu + { + typedef T type; + __device__ static type min() { return type(); }; + __device__ static type max() { return type(); }; + __device__ static type epsilon() { return type(); } + __device__ static type round_error() { return type(); } + __device__ static type denorm_min() { return type(); } + __device__ static type infinity() { return type(); } + __device__ static type quiet_NaN() { return type(); } + __device__ static type signaling_NaN() { return T(); } + }; + + template<> struct numeric_limits_gpu + { + typedef bool type; + __device__ static type min() { return false; }; + __device__ static type max() { return true; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef char type; + __device__ static type min() { return CHAR_MIN; }; + __device__ static type max() { return CHAR_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef unsigned char type; + __device__ static type min() { return 0; }; + __device__ static type max() { return UCHAR_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef short type; + __device__ static type min() { return SHRT_MIN; }; + __device__ static type max() { return SHRT_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef unsigned short type; + __device__ static type min() { return 0; }; + __device__ static type max() { return USHRT_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef int type; + __device__ static type min() { return INT_MIN; }; + __device__ static type max() { return INT_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + + template<> struct numeric_limits_gpu + { + typedef unsigned int type; + __device__ static type min() { return 0; }; + __device__ static type max() { return UINT_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef long type; + __device__ static type min() { return LONG_MIN; }; + __device__ static type max() { return LONG_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef unsigned long type; + __device__ static type min() { return 0; }; + __device__ static type max() { return ULONG_MAX; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef float type; + __device__ static type min() { return 1.175494351e-38f/*FLT_MIN*/; }; + __device__ static type max() { return 3.402823466e+38f/*FLT_MAX*/; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + + template<> struct numeric_limits_gpu + { + typedef double type; + __device__ static type min() { return 2.2250738585072014e-308/*DBL_MIN*/; }; + __device__ static type max() { return 1.7976931348623158e+308/*DBL_MAX*/; }; + __device__ static type epsilon(); + __device__ static type round_error(); + __device__ static type denorm_min(); + __device__ static type infinity(); + __device__ static type quiet_NaN(); + __device__ static type signaling_NaN(); + }; + } + } +} \ No newline at end of file diff --git a/modules/gpu/src/error.cpp b/modules/gpu/src/error.cpp index 432e9302b..a30679e93 100644 --- a/modules/gpu/src/error.cpp +++ b/modules/gpu/src/error.cpp @@ -135,7 +135,8 @@ namespace cv } void error(const char *error_string, const char *file, const int line, const char *func) - { + { + //if (uncaught_exception()) cv::error( cv::Exception(CV_GpuApiCallError, error_string, func, file, line) ); } } diff --git a/modules/gpu/src/matrix_operations.cpp b/modules/gpu/src/matrix_operations.cpp index 99db93af5..153c52452 100644 --- a/modules/gpu/src/matrix_operations.cpp +++ b/modules/gpu/src/matrix_operations.cpp @@ -572,7 +572,7 @@ void cv::gpu::GpuMat::release() //////////////////////////////// CudaMem ////////////////////////////// /////////////////////////////////////////////////////////////////////// -bool cv::gpu::CudaMem::can_device_map_to_host() +bool cv::gpu::CudaMem::canMapHostMemory() { cudaDeviceProp prop; cudaGetDeviceProperties(&prop, 0); @@ -581,7 +581,7 @@ bool cv::gpu::CudaMem::can_device_map_to_host() void cv::gpu::CudaMem::create(int _rows, int _cols, int _type, int _alloc_type) { - if (_alloc_type == ALLOC_ZEROCOPY && !can_device_map_to_host()) + if (_alloc_type == ALLOC_ZEROCOPY && !canMapHostMemory()) cv::gpu::error("ZeroCopy is not supported by current device", __FILE__, __LINE__); _type &= TYPE_MASK;