avx2
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@@ -82,6 +82,22 @@
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pop ebx
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}
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}
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static void __cpuidex(int* cpuid_data, int, int)
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{
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__asm
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{
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push edi
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mov edi, cpuid_data
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mov eax, 7
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mov ecx, 0
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cpuid
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mov [edi], eax
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mov [edi + 4], ebx
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mov [edi + 8], ecx
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mov [edi + 12], edx
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pop edi
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}
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}
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#endif
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#endif
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@@ -203,7 +219,7 @@ struct HWFeatures
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enum { MAX_FEATURE = CV_HARDWARE_MAX_FEATURE };
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HWFeatures(void)
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{
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{
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memset( have, 0, sizeof(have) );
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x86_family = 0;
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}
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@@ -251,6 +267,40 @@ struct HWFeatures
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f.have[CV_CPU_SSE4_2] = (cpuid_data[2] & (1<<20)) != 0;
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f.have[CV_CPU_POPCNT] = (cpuid_data[2] & (1<<23)) != 0;
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f.have[CV_CPU_AVX] = (((cpuid_data[2] & (1<<28)) != 0)&&((cpuid_data[2] & (1<<27)) != 0));//OS uses XSAVE_XRSTORE and CPU support AVX
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// make the second call to the cpuid command in order to get
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// information about extended features like AVX2
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#if defined _MSC_VER && (defined _M_IX86 || defined _M_X64)
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__cpuidex(cpuid_data, 7, 0);
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#elif defined __GNUC__ && (defined __i386__ || defined __x86_64__)
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#ifdef __x86_64__
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asm __volatile__
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(
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"movl $7, %%eax\n\t"
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"movl $0, %%ecx\n\t"
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"cpuid\n\t"
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:[eax]"=a"(cpuid_data[0]),[ebx]"=b"(cpuid_data[1]),[ecx]"=c"(cpuid_data[2]),[edx]"=d"(cpuid_data[3])
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:
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: "cc"
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);
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#else
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asm volatile
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(
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"pushl %%eax\n\t"
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"pushl %%edx\n\t"
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"movl $7,%%eax\n\t"
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"movl $0,%%ecx\n\t"
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"cpuid\n\t"
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"popl %%edx\n\t"
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"popl %%eax\n\t"
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: "=b"(cpuid_data[1]), "=c"(cpuid_data[2])
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:
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: "cc"
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);
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#endif
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#endif
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f.have[CV_CPU_AVX2] = (cpuid_data[1] & (1<<5)) != 0;
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}
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return f;
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@@ -290,6 +340,7 @@ IPPInitializer ippInitializer;
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volatile bool USE_SSE2 = featuresEnabled.have[CV_CPU_SSE2];
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volatile bool USE_SSE4_2 = featuresEnabled.have[CV_CPU_SSE4_2];
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volatile bool USE_AVX = featuresEnabled.have[CV_CPU_AVX];
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volatile bool USE_AVX2 = featuresEnabled.have[CV_CPU_AVX2];
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void setUseOptimized( bool flag )
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{
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