renamed gpunvidia -> gpulegacy
This commit is contained in:
Vladislav Vinogradov
335
modules/gpulegacy/test/TestHaarCascadeApplication.cpp
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335
modules/gpulegacy/test/TestHaarCascadeApplication.cpp
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/*M///////////////////////////////////////////////////////////////////////////////////////
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//
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// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
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//
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// By downloading, copying, installing or using the software you agree to this license.
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// If you do not agree to this license, do not download, install,
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// copy or use the software.
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//
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//
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// License Agreement
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// For Open Source Computer Vision Library
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//
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// Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
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// Copyright (C) 2009, Willow Garage Inc., all rights reserved.
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// Third party copyrights are property of their respective owners.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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//
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// * Redistribution's of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// * Redistribution's in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// * The name of the copyright holders may not be used to endorse or promote products
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// derived from this software without specific prior written permission.
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//
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// This software is provided by the copyright holders and contributors "as is" and
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// any express or implied warranties, including, but not limited to, the implied
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// warranties of merchantability and fitness for a particular purpose are disclaimed.
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// In no event shall the Intel Corporation or contributors be liable for any direct,
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// indirect, incidental, special, exemplary, or consequential damages
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// (including, but not limited to, procurement of substitute goods or services;
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// loss of use, data, or profits; or business interruption) however caused
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// and on any theory of liability, whether in contract, strict liability,
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// or tort (including negligence or otherwise) arising in any way out of
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// the use of this software, even if advised of the possibility of such damage.
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//
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//M*/
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#include "test_precomp.hpp"
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namespace
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{
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// http://www.christian-seiler.de/projekte/fpmath/
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class FpuControl
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{
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public:
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FpuControl();
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~FpuControl();
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private:
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#if defined(__GNUC__) && !defined(__APPLE__) && !defined(__arm__)
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fpu_control_t fpu_oldcw, fpu_cw;
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#elif defined(_WIN32) && !defined(_WIN64)
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unsigned int fpu_oldcw, fpu_cw;
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#endif
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};
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FpuControl::FpuControl()
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{
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#if defined(__GNUC__) && !defined(__APPLE__) && !defined(__arm__)
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_FPU_GETCW(fpu_oldcw);
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fpu_cw = (fpu_oldcw & ~_FPU_EXTENDED & ~_FPU_DOUBLE & ~_FPU_SINGLE) | _FPU_SINGLE;
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_FPU_SETCW(fpu_cw);
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#elif defined(_WIN32) && !defined(_WIN64)
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_controlfp_s(&fpu_cw, 0, 0);
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fpu_oldcw = fpu_cw;
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_controlfp_s(&fpu_cw, _PC_24, _MCW_PC);
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#endif
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}
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FpuControl::~FpuControl()
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{
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#if defined(__GNUC__) && !defined(__APPLE__) && !defined(__arm__)
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_FPU_SETCW(fpu_oldcw);
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#elif defined(_WIN32) && !defined(_WIN64)
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_controlfp_s(&fpu_cw, fpu_oldcw, _MCW_PC);
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#endif
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}
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}
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TestHaarCascadeApplication::TestHaarCascadeApplication(std::string testName_, NCVTestSourceProvider<Ncv8u> &src_,
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std::string cascadeName_, Ncv32u width_, Ncv32u height_)
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:
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NCVTestProvider(testName_),
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src(src_),
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cascadeName(cascadeName_),
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width(width_),
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height(height_)
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{
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}
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bool TestHaarCascadeApplication::toString(std::ofstream &strOut)
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{
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strOut << "cascadeName=" << cascadeName << std::endl;
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strOut << "width=" << width << std::endl;
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strOut << "height=" << height << std::endl;
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return true;
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}
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bool TestHaarCascadeApplication::init()
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{
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return true;
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}
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bool TestHaarCascadeApplication::process()
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{
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NCVStatus ncvStat;
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bool rcode = false;
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Ncv32u numStages, numNodes, numFeatures;
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ncvStat = ncvHaarGetClassifierSize(this->cascadeName, numStages, numNodes, numFeatures);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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NCVVectorAlloc<HaarStage64> h_HaarStages(*this->allocatorCPU.get(), numStages);
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ncvAssertReturn(h_HaarStages.isMemAllocated(), false);
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NCVVectorAlloc<HaarClassifierNode128> h_HaarNodes(*this->allocatorCPU.get(), numNodes);
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ncvAssertReturn(h_HaarNodes.isMemAllocated(), false);
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NCVVectorAlloc<HaarFeature64> h_HaarFeatures(*this->allocatorCPU.get(), numFeatures);
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ncvAssertReturn(h_HaarFeatures.isMemAllocated(), false);
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NCVVectorAlloc<HaarStage64> d_HaarStages(*this->allocatorGPU.get(), numStages);
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ncvAssertReturn(d_HaarStages.isMemAllocated(), false);
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NCVVectorAlloc<HaarClassifierNode128> d_HaarNodes(*this->allocatorGPU.get(), numNodes);
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ncvAssertReturn(d_HaarNodes.isMemAllocated(), false);
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NCVVectorAlloc<HaarFeature64> d_HaarFeatures(*this->allocatorGPU.get(), numFeatures);
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ncvAssertReturn(d_HaarFeatures.isMemAllocated(), false);
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HaarClassifierCascadeDescriptor haar;
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haar.ClassifierSize.width = haar.ClassifierSize.height = 1;
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haar.bNeedsTiltedII = false;
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haar.NumClassifierRootNodes = numNodes;
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haar.NumClassifierTotalNodes = numNodes;
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haar.NumFeatures = numFeatures;
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haar.NumStages = numStages;
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NCV_SET_SKIP_COND(this->allocatorGPU.get()->isCounting());
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NCV_SKIP_COND_BEGIN
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ncvStat = ncvHaarLoadFromFile_host(this->cascadeName, haar, h_HaarStages, h_HaarNodes, h_HaarFeatures);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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ncvAssertReturn(NCV_SUCCESS == h_HaarStages.copySolid(d_HaarStages, 0), false);
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ncvAssertReturn(NCV_SUCCESS == h_HaarNodes.copySolid(d_HaarNodes, 0), false);
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ncvAssertReturn(NCV_SUCCESS == h_HaarFeatures.copySolid(d_HaarFeatures, 0), false);
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ncvAssertCUDAReturn(cudaStreamSynchronize(0), false);
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NCV_SKIP_COND_END
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NcvSize32s srcRoi, srcIIRoi, searchRoi;
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srcRoi.width = this->width;
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srcRoi.height = this->height;
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srcIIRoi.width = srcRoi.width + 1;
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srcIIRoi.height = srcRoi.height + 1;
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searchRoi.width = srcIIRoi.width - haar.ClassifierSize.width;
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searchRoi.height = srcIIRoi.height - haar.ClassifierSize.height;
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if (searchRoi.width <= 0 || searchRoi.height <= 0)
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{
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return false;
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}
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NcvSize32u searchRoiU(searchRoi.width, searchRoi.height);
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NCVMatrixAlloc<Ncv8u> d_img(*this->allocatorGPU.get(), this->width, this->height);
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ncvAssertReturn(d_img.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv8u> h_img(*this->allocatorCPU.get(), this->width, this->height);
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ncvAssertReturn(h_img.isMemAllocated(), false);
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Ncv32u integralWidth = this->width + 1;
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Ncv32u integralHeight = this->height + 1;
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NCVMatrixAlloc<Ncv32u> d_integralImage(*this->allocatorGPU.get(), integralWidth, integralHeight);
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ncvAssertReturn(d_integralImage.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv64u> d_sqIntegralImage(*this->allocatorGPU.get(), integralWidth, integralHeight);
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ncvAssertReturn(d_sqIntegralImage.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv32u> h_integralImage(*this->allocatorCPU.get(), integralWidth, integralHeight);
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ncvAssertReturn(h_integralImage.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv64u> h_sqIntegralImage(*this->allocatorCPU.get(), integralWidth, integralHeight);
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ncvAssertReturn(h_sqIntegralImage.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv32f> d_rectStdDev(*this->allocatorGPU.get(), this->width, this->height);
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ncvAssertReturn(d_rectStdDev.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv32u> d_pixelMask(*this->allocatorGPU.get(), this->width, this->height);
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ncvAssertReturn(d_pixelMask.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv32f> h_rectStdDev(*this->allocatorCPU.get(), this->width, this->height);
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ncvAssertReturn(h_rectStdDev.isMemAllocated(), false);
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NCVMatrixAlloc<Ncv32u> h_pixelMask(*this->allocatorCPU.get(), this->width, this->height);
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ncvAssertReturn(h_pixelMask.isMemAllocated(), false);
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NCVVectorAlloc<NcvRect32u> d_hypotheses(*this->allocatorGPU.get(), this->width * this->height);
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ncvAssertReturn(d_hypotheses.isMemAllocated(), false);
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NCVVectorAlloc<NcvRect32u> h_hypotheses(*this->allocatorCPU.get(), this->width * this->height);
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ncvAssertReturn(h_hypotheses.isMemAllocated(), false);
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NCVStatus nppStat;
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Ncv32u szTmpBufIntegral, szTmpBufSqIntegral;
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nppStat = nppiStIntegralGetSize_8u32u(NcvSize32u(this->width, this->height), &szTmpBufIntegral, this->devProp);
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ncvAssertReturn(nppStat == NPPST_SUCCESS, false);
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nppStat = nppiStSqrIntegralGetSize_8u64u(NcvSize32u(this->width, this->height), &szTmpBufSqIntegral, this->devProp);
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ncvAssertReturn(nppStat == NPPST_SUCCESS, false);
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NCVVectorAlloc<Ncv8u> d_tmpIIbuf(*this->allocatorGPU.get(), std::max(szTmpBufIntegral, szTmpBufSqIntegral));
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ncvAssertReturn(d_tmpIIbuf.isMemAllocated(), false);
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Ncv32u detectionsOnThisScale_d = 0;
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Ncv32u detectionsOnThisScale_h = 0;
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NCV_SKIP_COND_BEGIN
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ncvAssertReturn(this->src.fill(h_img), false);
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ncvStat = h_img.copySolid(d_img, 0);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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ncvAssertCUDAReturn(cudaStreamSynchronize(0), false);
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nppStat = nppiStIntegral_8u32u_C1R(d_img.ptr(), d_img.pitch(),
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d_integralImage.ptr(), d_integralImage.pitch(),
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NcvSize32u(d_img.width(), d_img.height()),
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d_tmpIIbuf.ptr(), szTmpBufIntegral, this->devProp);
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ncvAssertReturn(nppStat == NPPST_SUCCESS, false);
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nppStat = nppiStSqrIntegral_8u64u_C1R(d_img.ptr(), d_img.pitch(),
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d_sqIntegralImage.ptr(), d_sqIntegralImage.pitch(),
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NcvSize32u(d_img.width(), d_img.height()),
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d_tmpIIbuf.ptr(), szTmpBufSqIntegral, this->devProp);
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ncvAssertReturn(nppStat == NPPST_SUCCESS, false);
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const NcvRect32u rect(
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HAAR_STDDEV_BORDER,
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HAAR_STDDEV_BORDER,
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haar.ClassifierSize.width - 2*HAAR_STDDEV_BORDER,
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haar.ClassifierSize.height - 2*HAAR_STDDEV_BORDER);
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nppStat = nppiStRectStdDev_32f_C1R(
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d_integralImage.ptr(), d_integralImage.pitch(),
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d_sqIntegralImage.ptr(), d_sqIntegralImage.pitch(),
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d_rectStdDev.ptr(), d_rectStdDev.pitch(),
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NcvSize32u(searchRoi.width, searchRoi.height), rect,
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1.0f, true);
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ncvAssertReturn(nppStat == NPPST_SUCCESS, false);
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ncvStat = d_integralImage.copySolid(h_integralImage, 0);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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ncvStat = d_rectStdDev.copySolid(h_rectStdDev, 0);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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for (Ncv32u i=0; i<searchRoiU.height; i++)
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{
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for (Ncv32u j=0; j<h_pixelMask.stride(); j++)
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{
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if (j<searchRoiU.width)
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{
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h_pixelMask.ptr()[i*h_pixelMask.stride()+j] = (i << 16) | j;
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}
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else
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{
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h_pixelMask.ptr()[i*h_pixelMask.stride()+j] = OBJDET_MASK_ELEMENT_INVALID_32U;
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}
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}
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}
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ncvAssertReturn(cudaSuccess == cudaStreamSynchronize(0), false);
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{
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// calculations here
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FpuControl fpu;
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(void) fpu;
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ncvStat = ncvApplyHaarClassifierCascade_host(
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h_integralImage, h_rectStdDev, h_pixelMask,
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detectionsOnThisScale_h,
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haar, h_HaarStages, h_HaarNodes, h_HaarFeatures, false,
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searchRoiU, 1, 1.0f);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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}
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NCV_SKIP_COND_END
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int devId;
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ncvAssertCUDAReturn(cudaGetDevice(&devId), false);
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cudaDeviceProp _devProp;
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ncvAssertCUDAReturn(cudaGetDeviceProperties(&_devProp, devId), false);
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ncvStat = ncvApplyHaarClassifierCascade_device(
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d_integralImage, d_rectStdDev, d_pixelMask,
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detectionsOnThisScale_d,
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haar, h_HaarStages, d_HaarStages, d_HaarNodes, d_HaarFeatures, false,
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searchRoiU, 1, 1.0f,
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*this->allocatorGPU.get(), *this->allocatorCPU.get(),
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_devProp, 0);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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NCVMatrixAlloc<Ncv32u> h_pixelMask_d(*this->allocatorCPU.get(), this->width, this->height);
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ncvAssertReturn(h_pixelMask_d.isMemAllocated(), false);
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//bit-to-bit check
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bool bLoopVirgin = true;
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NCV_SKIP_COND_BEGIN
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ncvStat = d_pixelMask.copySolid(h_pixelMask_d, 0);
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ncvAssertReturn(ncvStat == NCV_SUCCESS, false);
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if (detectionsOnThisScale_d != detectionsOnThisScale_h)
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{
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bLoopVirgin = false;
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}
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else
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{
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std::sort(h_pixelMask_d.ptr(), h_pixelMask_d.ptr() + detectionsOnThisScale_d);
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for (Ncv32u i=0; i<detectionsOnThisScale_d && bLoopVirgin; i++)
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{
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if (h_pixelMask.ptr()[i] != h_pixelMask_d.ptr()[i])
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{
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bLoopVirgin = false;
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}
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}
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}
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NCV_SKIP_COND_END
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if (bLoopVirgin)
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{
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rcode = true;
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}
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return rcode;
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}
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bool TestHaarCascadeApplication::deinit()
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{
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return true;
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}
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