From 50299c1d5e3b2cdec425aa7f1e6d23c892ea7d2f Mon Sep 17 00:00:00 2001
From: Vadim Pisarevsky <vadim.pisarevsky@gmail.com>
Date: Thu, 31 Jan 2013 22:57:46 +0400
Subject: [PATCH] disabled the use of SSE4 instructions as well to make the
 code compatible with the old Intel and AMD chips

---
 modules/objdetect/src/haar.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/modules/objdetect/src/haar.cpp b/modules/objdetect/src/haar.cpp
index 7544b761a..aa062c38e 100644
--- a/modules/objdetect/src/haar.cpp
+++ b/modules/objdetect/src/haar.cpp
@@ -45,8 +45,8 @@
 #include <stdio.h>
 #include "opencv2/core/internal.hpp"
 
-#if CV_SSE2 || CV_SSE3
-#   if !CV_SSE4_1 && !CV_SSE4_2
+#if CV_SSE2
+#   if 1 /*!CV_SSE4_1 && !CV_SSE4_2*/
 #       define _mm_blendv_pd(a, b, m) _mm_xor_pd(a, _mm_and_pd(_mm_xor_pd(b, a), m))
 #       define _mm_blendv_ps(a, b, m) _mm_xor_ps(a, _mm_and_ps(_mm_xor_ps(b, a), m))
 #   endif
@@ -58,7 +58,7 @@
 #    pragma warning( disable : 4752 )
 #  endif
 #else
-#  if CV_SSE2 || CV_SSE3
+#  if CV_SSE2
 #    define CV_HAAR_USE_SSE 1
 #  endif
 #endif