optimizations:
- new reduce implementation (with kepler optimizations) - saturate_cast via asm command - video SIMD instructions in element operations - float arithmetics instead of double - new deviceSupports function
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@@ -65,6 +65,8 @@
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#include "NPP_staging/NPP_staging.hpp"
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#include "NCVRuntimeTemplates.hpp"
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#include "NCVHaarObjectDetection.hpp"
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#include "opencv2/gpu/device/warp.hpp"
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#include "opencv2/gpu/device/warp_shuffle.hpp"
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//==============================================================================
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@@ -81,6 +83,20 @@ NCV_CT_ASSERT(K_WARP_SIZE == 32); //this is required for the manual unroll of th
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//assuming size <= WARP_SIZE and size is power of 2
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__device__ Ncv32u warpScanInclusive(Ncv32u idata, volatile Ncv32u *s_Data)
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{
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#if __CUDA_ARCH__ >= 300
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const unsigned int laneId = cv::gpu::device::Warp::laneId();
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// scan on shuffl functions
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#pragma unroll
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for (int i = 1; i <= (K_WARP_SIZE / 2); i *= 2)
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{
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const Ncv32u n = cv::gpu::device::shfl_up(idata, i);
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if (laneId >= i)
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idata += n;
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}
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return idata;
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#else
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Ncv32u pos = 2 * threadIdx.x - (threadIdx.x & (K_WARP_SIZE - 1));
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s_Data[pos] = 0;
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pos += K_WARP_SIZE;
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@@ -93,6 +109,7 @@ __device__ Ncv32u warpScanInclusive(Ncv32u idata, volatile Ncv32u *s_Data)
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s_Data[pos] += s_Data[pos - 16];
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return s_Data[pos];
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#endif
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}
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__device__ __forceinline__ Ncv32u warpScanExclusive(Ncv32u idata, volatile Ncv32u *s_Data)
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@@ -2317,4 +2334,4 @@ NCVStatus ncvHaarStoreNVBIN_host(const std::string &filename,
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return NCV_SUCCESS;
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}
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#endif /* CUDA_DISABLER */
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#endif /* CUDA_DISABLER */
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@@ -44,6 +44,8 @@
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#include <vector>
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#include <cuda_runtime.h>
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#include "NPP_staging.hpp"
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#include "opencv2/gpu/device/warp.hpp"
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#include "opencv2/gpu/device/warp_shuffle.hpp"
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texture<Ncv8u, 1, cudaReadModeElementType> tex8u;
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@@ -90,6 +92,36 @@ NCV_CT_ASSERT(K_WARP_SIZE == 32); //this is required for the manual unroll of th
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//assuming size <= WARP_SIZE and size is power of 2
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template <class T>
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inline __device__ T warpScanInclusive(T idata, volatile T *s_Data)
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{
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#if __CUDA_ARCH__ >= 300
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const unsigned int laneId = cv::gpu::device::Warp::laneId();
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// scan on shuffl functions
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#pragma unroll
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for (int i = 1; i <= (K_WARP_SIZE / 2); i *= 2)
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{
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const T n = cv::gpu::device::shfl_up(idata, i);
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if (laneId >= i)
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idata += n;
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}
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return idata;
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#else
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Ncv32u pos = 2 * threadIdx.x - (threadIdx.x & (K_WARP_SIZE - 1));
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s_Data[pos] = 0;
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pos += K_WARP_SIZE;
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s_Data[pos] = idata;
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s_Data[pos] += s_Data[pos - 1];
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s_Data[pos] += s_Data[pos - 2];
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s_Data[pos] += s_Data[pos - 4];
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s_Data[pos] += s_Data[pos - 8];
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s_Data[pos] += s_Data[pos - 16];
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return s_Data[pos];
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#endif
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}
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inline __device__ Ncv64u warpScanInclusive(Ncv64u idata, volatile Ncv64u *s_Data)
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{
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Ncv32u pos = 2 * threadIdx.x - (threadIdx.x & (K_WARP_SIZE - 1));
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s_Data[pos] = 0;
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@@ -2578,4 +2610,4 @@ NCVStatus nppiStResize_32f_C1R(const Ncv32f *pSrc,
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return status;
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}
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#endif /* CUDA_DISABLER */
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#endif /* CUDA_DISABLER */
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