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fixed build issues related to changes in IPP calls.

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This commit is contained in:
Vladimir Dudnik
2011-04-18 21:24:57 +00:00
parent 8e7768379f
commit 2057f2c452
4 changed files with 404 additions and 302 deletions
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186
modules/core/src/arithm.cpp
View File

@@ -56,7 +56,7 @@ struct IPPArithmInitializer
{
IPPArithmInitializer(void)
{
IppStatus status = ippStaticInit();
ippStaticInit();
}
};
@@ -522,7 +522,7 @@ static void add8u( const uchar* src1, size_t step1,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_8u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz, 0),
ippiAdd_8u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz, 0),
(vBinOp8<uchar, OpAdd<uchar>, IF_SIMD(_VAdd8u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -538,7 +538,7 @@ static void add16u( const ushort* src1, size_t step1,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_16u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz, 0),
ippiAdd_16u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz, 0),
(vBinOp16<ushort, OpAdd<ushort>, IF_SIMD(_VAdd16u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -547,7 +547,7 @@ static void add16s( const short* src1, size_t step1,
short* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_16s_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz, 0),
ippiAdd_16s_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz, 0),
(vBinOp16<short, OpAdd<short>, IF_SIMD(_VAdd16s)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -563,7 +563,7 @@ static void add32f( const float* src1, size_t step1,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_32f_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz, 0),
ippiAdd_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz),
(vBinOp32f<OpAdd<float>, IF_SIMD(_VAdd32f)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -579,7 +579,7 @@ static void sub8u( const uchar* src1, size_t step1,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_8u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (IppiSize&)sz, 0),
ippiSub_8u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, (IppiSize&)sz, 0),
(vBinOp8<uchar, OpSub<uchar>, IF_SIMD(_VSub8u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -595,7 +595,7 @@ static void sub16u( const ushort* src1, size_t step1,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_16u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (IppiSize&)sz, 0),
ippiSub_16u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, (IppiSize&)sz, 0),
(vBinOp16<ushort, OpSub<ushort>, IF_SIMD(_VSub16u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -604,7 +604,7 @@ static void sub16s( const short* src1, size_t step1,
short* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_16s_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (IppiSize&)sz, 0),
ippiSub_16s_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, (IppiSize&)sz, 0),
(vBinOp16<short, OpSub<short>, IF_SIMD(_VSub16s)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -620,7 +620,7 @@ static void sub32f( const float* src1, size_t step1,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_32f_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (IppiSize&)sz, 0),
ippiSub_32f_C1R(src2, (int)step2, src1, (int)step1, dst, (int)step, (IppiSize&)sz),
(vBinOp32f<OpSub<float>, IF_SIMD(_VSub32f)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -638,9 +638,27 @@ static void max8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMaxEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp8<uchar, OpMax<uchar>, IF_SIMD(_VMax8u)>(src1, step1, src2, step2, dst, step, sz)));
#if (ARITHM_USE_IPP == 1)
{
uchar* s1 = (uchar*)src1;
uchar* s2 = (uchar*)src2;
uchar* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMaxEvery_8u(s1, s2, d, sz.width);
s1 += step1;
s2 += step2;
d += step;
}
}
#else
vBinOp8<uchar, OpMax<uchar>, IF_SIMD(_VMax8u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp8<uchar, OpMax<uchar>, IF_SIMD(_VMax8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void max8s( const schar* src1, size_t step1,
@@ -654,18 +672,34 @@ static void max16u( const ushort* src1, size_t step1,
const ushort* src2, size_t step2,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMaxEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp16<ushort, OpMax<ushort>, IF_SIMD(_VMax16u)>(src1, step1, src2, step2, dst, step, sz)));
#if (ARITHM_USE_IPP == 1)
{
ushort* s1 = (ushort*)src1;
ushort* s2 = (ushort*)src2;
ushort* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMaxEvery_16u(s1, s2, d, sz.width);
s1 = (ushort*)((uchar*)s1 + step1);
s2 = (ushort*)((uchar*)s2 + step2);
d = (ushort*)((uchar*)d + step);
}
}
#else
vBinOp16<ushort, OpMax<ushort>, IF_SIMD(_VMax16u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp16<ushort, OpMax<ushort>, IF_SIMD(_VMax16u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void max16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMaxEvery_16s_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp16<short, OpMax<short>, IF_SIMD(_VMax16s)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp16<short, OpMax<short>, IF_SIMD(_VMax16s)>(src1, step1, src2, step2, dst, step, sz);
}
static void max32s( const int* src1, size_t step1,
@@ -679,9 +713,26 @@ static void max32f( const float* src1, size_t step1,
const float* src2, size_t step2,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMaxEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp32f<OpMax<float>, IF_SIMD(_VMax32f)>(src1, step1, src2, step2, dst, step, sz)));
#if (ARITHM_USE_IPP == 1)
{
float* s1 = (float*)src1;
float* s2 = (float*)src2;
float* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMaxEvery_32f(s1, s2, d, sz.width);
s1 = (float*)((uchar*)s1 + step1);
s2 = (float*)((uchar*)s2 + step2);
d = (float*)((uchar*)d + step);
}
}
#else
vBinOp32f<OpMax<float>, IF_SIMD(_VMax32f)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp32f<OpMax<float>, IF_SIMD(_VMax32f)>(src1, step1, src2, step2, dst, step, sz)));
}
static void max64f( const double* src1, size_t step1,
@@ -695,9 +746,27 @@ static void min8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMinEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp8<uchar, OpMin<uchar>, IF_SIMD(_VMin8u)>(src1, step1, src2, step2, dst, step, sz)));
#if (ARITHM_USE_IPP == 1)
{
uchar* s1 = (uchar*)src1;
uchar* s2 = (uchar*)src2;
uchar* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMinEvery_8u(s1, s2, d, sz.width);
s1 += step1;
s2 += step2;
d += step;
}
}
#else
vBinOp8<uchar, OpMin<uchar>, IF_SIMD(_VMin8u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp8<uchar, OpMin<uchar>, IF_SIMD(_VMin8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void min8s( const schar* src1, size_t step1,
@@ -711,18 +780,34 @@ static void min16u( const ushort* src1, size_t step1,
const ushort* src2, size_t step2,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMinEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp16<ushort, OpMin<ushort>, IF_SIMD(_VMin16u)>(src1, step1, src2, step2, dst, step, sz)));
#if (ARITHM_USE_IPP == 1)
{
ushort* s1 = (ushort*)src1;
ushort* s2 = (ushort*)src2;
ushort* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMinEvery_16u(s1, s2, d, sz.width);
s1 = (ushort*)((uchar*)s1 + step1);
s2 = (ushort*)((uchar*)s2 + step2);
d = (ushort*)((uchar*)d + step);
}
}
#else
vBinOp16<ushort, OpMin<ushort>, IF_SIMD(_VMin16u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp16<ushort, OpMin<ushort>, IF_SIMD(_VMin16u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void min16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMinEvery_16s_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp16<short, OpMin<short>, IF_SIMD(_VMin16s)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp16<short, OpMin<short>, IF_SIMD(_VMin16s)>(src1, step1, src2, step2, dst, step, sz);
}
static void min32s( const int* src1, size_t step1,
@@ -736,9 +821,26 @@ static void min32f( const float* src1, size_t step1,
const float* src2, size_t step2,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiMinEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp32f<OpMin<float>, IF_SIMD(_VMin32f)>(src1, step1, src2, step2, dst, step, sz)));
#if (ARITHM_USE_IPP == 1)
{
float* s1 = (float*)src1;
float* s2 = (float*)src2;
float* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMinEvery_32f(s1, s2, d, sz.width);
s1 = (float*)((uchar*)s1 + step1);
s2 = (float*)((uchar*)s2 + step2);
d = (float*)((uchar*)d + step);
}
}
#else
vBinOp32f<OpMin<float>, IF_SIMD(_VMin32f)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
// (vBinOp32f<OpMin<float>, IF_SIMD(_VMin32f)>(src1, step1, src2, step2, dst, step, sz)));
}
static void min64f( const double* src1, size_t step1,
@@ -753,7 +855,7 @@ static void absdiff8u( const uchar* src1, size_t step1,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAbsDiff_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
ippiAbsDiff_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz),
(vBinOp8<uchar, OpAbsDiff<uchar>, IF_SIMD(_VAbsDiff8u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -769,7 +871,7 @@ static void absdiff16u( const ushort* src1, size_t step1,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAbsDiff_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
ippiAbsDiff_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz),
(vBinOp16<ushort, OpAbsDiff<ushort>, IF_SIMD(_VAbsDiff16u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -777,9 +879,7 @@ static void absdiff16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAbsDiff_16s_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
(vBinOp16<short, OpAbsDiff<short>, IF_SIMD(_VAbsDiff16s)>(src1, step1, src2, step2, dst, step, sz)));
vBinOp16<short, OpAbsDiff<short>, IF_SIMD(_VAbsDiff16s)>(src1, step1, src2, step2, dst, step, sz);
}
static void absdiff32s( const int* src1, size_t step1,
@@ -794,7 +894,7 @@ static void absdiff32f( const float* src1, size_t step1,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAbsDiff_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
ippiAbsDiff_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz),
(vBinOp32f<OpAbsDiff<float>, IF_SIMD(_VAbsDiff32f)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -811,7 +911,7 @@ static void and8u( const uchar* src1, size_t step1,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAnd_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
ippiAnd_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz),
(vBinOp8<uchar, OpAnd<uchar>, IF_SIMD(_VAnd8u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -820,7 +920,7 @@ static void or8u( const uchar* src1, size_t step1,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiOr_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
ippiOr_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz),
(vBinOp8<uchar, OpOr<uchar>, IF_SIMD(_VOr8u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -829,7 +929,7 @@ static void xor8u( const uchar* src1, size_t step1,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiXor_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (IppiSize&)sz),
ippiXor_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, (IppiSize&)sz),
(vBinOp8<uchar, OpXor<uchar>, IF_SIMD(_VXor8u)>(src1, step1, src2, step2, dst, step, sz)));
}
@@ -838,7 +938,7 @@ static void not8u( const uchar* src1, size_t step1,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiNot_8u_C1R(src1, (int)step1, dst, (IppiSize&)sz),
ippiNot_8u_C1R(src1, (int)step1, dst, (int)step, (IppiSize&)sz),
(vBinOp8<uchar, OpNot<uchar>, IF_SIMD(_VNot8u)>(src1, step1, src2, step2, dst, step, sz)));
}

1
modules/core/src/matmul.cpp
View File

@@ -2590,6 +2590,7 @@ static double dotProd_8u(const uchar* src1, const uchar* src2, int len)
ippiDotProd_8u64f_C1R(src1, (int)(len*sizeof(src1[0])),
src2, (int)(len*sizeof(src2[0])),
ippiSize(len, 1), &r);
return r;
#else
int i = 0;

4
modules/core/src/precomp.hpp
View File

@@ -182,8 +182,8 @@ BinaryFunc getCopyMaskFunc(size_t esz);
enum { BLOCK_SIZE = 1024 };
#ifdef HAVE_IPP
static inline IppiSize ippiSize(int width, int height) { IppiSize sz={width, height}; return sz; }
static inline IppiSize ippiSize(Size _sz) { reIppiSize sz={_sz.width, _sz.height}; return sz; }
static inline IppiSize ippiSize(int width, int height) { IppiSize sz = { width, height}; return sz; }
static inline IppiSize ippiSize(Size _sz) { IppiSize sz = { _sz.width, _sz.height}; return sz; }
#endif
#if defined HAVE_IPP && (IPP_VERSION_MAJOR >= 7)

3
modules/core/src/system.cpp
View File

@@ -170,9 +170,10 @@ struct IPPInitializer
IPPInitializer ippInitializer;
#else
volatile bool useOptimizedFlag = false;
volatile bool USE_SSE2 = false;
#endif
volatile bool USE_SSE2 = false;
void setUseOptimized( bool flag )
{
useOptimizedFlag = flag;