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5d7724898d
The third parameter must be 32bit register . Those assmebly put 64bit register here , it is wrong . Change-Id: Iebe17516b555a6a9b94ea7baa4778ad4b9dd0878 Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
265 lines
8.2 KiB
ArmAsm
265 lines
8.2 KiB
ArmAsm
/**********************************************************************
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Copyright(c) 2019 Arm Corporation All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Arm Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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.arch armv8-a+crc
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.text
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.align 2
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#include "lz0a_const_aarch64.h"
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#include "data_struct_aarch64.h"
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#include "huffman_aarch64.h"
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#include "bitbuf2_aarch64.h"
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#include "stdmac_aarch64.h"
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/*
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declare Macros
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*/
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.macro declare_generic_reg name:req,reg:req,default:req
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\name .req \default\reg
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w_\name .req w\reg
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x_\name .req x\reg
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.endm
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.macro update_state stream:req,start_in:req,next_in:req,end_in:req, \
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m_out_buf:req,m_out_start:req,tmp0:req,tmp1:req
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//m_out_buf=bytes_written
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sub x_\m_out_buf,x_\m_out_buf,x_\m_out_start
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cmp next_in,start_in
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bls skip_has_hist
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mov w_\tmp0,1
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strb w_\tmp0,[x_\stream,_internal_state_has_hist]
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skip_has_hist:
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ldr w_\tmp0,[\stream,_total_in]
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ldr x_\m_out_start,[\stream,_next_out] //m_out_start = next_out
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str x_\next_in,[\stream,_next_in]
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sub x_\start_in,x_\next_in,x_\start_in
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sub x_\end_in,x_\end_in,x_\next_in
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add w_\tmp0,w_\tmp0,w_\start_in
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stp w_\end_in,w_\tmp0,[\stream,_avail_in]
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//next_in=avail_out,start_in=total_out
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ldp w_\next_in,w_\start_in,[\stream,_avail_out]
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add x_\m_out_start,x_\m_out_start,x_\m_out_buf
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str x_\m_out_start,[\stream,_next_out]
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add w_\start_in,w_\start_in,w_\m_out_buf
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sub w_\next_in,w_\next_in,w_\m_out_buf
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stp w_\next_in,w_\start_in,[\stream,_avail_out]
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.endm
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.global isal_deflate_finish_aarch64
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.arch armv8-a+crc
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.type isal_deflate_finish_aarch64, %function
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/*
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void isal_deflate_finish_aarch64(struct isal_zstream *stream)
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*/
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declare_generic_reg stream, 0,x //struct isal_zstream *stream
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declare_generic_reg state, 8,x //&stream->state
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declare_generic_reg avail_in, 9,w
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declare_generic_reg end_of_stream, 10,w //can be used in loop
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declare_generic_reg hash_mask, 11,w
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declare_generic_reg match_length, 12,w
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declare_generic_reg hufftables, 13,x
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declare_generic_reg m_out_buf, 14,x
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declare_generic_reg m_out_start, 15,x
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declare_generic_reg m_out_end, 16,x
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declare_generic_reg m_bits, 17,x
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declare_generic_reg m_bit_count, 18,w
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declare_generic_reg start_in, 19,x
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declare_generic_reg end_in, 20,x
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declare_generic_reg next_in, 21,x
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declare_generic_reg loop_end_cnt, 22,x
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declare_generic_reg literal, 23,w
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declare_generic_reg hash, 24,w
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declare_generic_reg dist, 25,w
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declare_generic_reg last_seen, 26,x
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declare_generic_reg file_start, 27,x
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declare_generic_reg hist_size, 28,w
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declare_generic_reg tmp0, 5 ,w
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declare_generic_reg tmp1, 6 ,w
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declare_generic_reg tmp2, 7 ,w
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declare_generic_reg code, 3,x
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declare_generic_reg code_len, 24,x
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declare_generic_reg code2, 10,x
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declare_generic_reg code_len2, 4,x
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isal_deflate_finish_aarch64:
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//save registers
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push_stack
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// set_buf(&state->bitbuf, stream->next_out, stream->avail_out);
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ldr w_m_out_end,[stream,_avail_out]
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ldr m_out_buf,[stream,_next_out]
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add m_out_end,m_out_buf,w_m_out_end,uxtw
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sub m_out_end,m_out_end , 8
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mov m_out_start,m_out_buf
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stp m_out_buf,m_out_end,[stream, _bitbuf + _internal_state + _m_out_buf]
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str m_out_start,[stream, _bitbuf + _internal_state + _m_out_start]
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ldr m_bit_count ,[stream,_internal_state_bitbuf_m_bit_count]
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ldr m_bits ,[stream,_internal_state_bitbuf_m_bits]
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//init variables
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//last_seen=&stream.internal_state.head = _internal_state+_head
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add last_seen,stream,65536
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add last_seen,last_seen,_internal_state+_head -65536
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//start_in=stream->next_in;next_in=start_in
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ldr avail_in, [stream, _avail_in]
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ldr start_in,[stream,_next_in]
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mov next_in,start_in
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add end_in,start_in,avail_in,uxtw //avail_in reg is free now
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ldr hufftables,[stream,_hufftables]
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cbz avail_in, update_not_full
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sub loop_end_cnt,end_in,4 //loop end
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cmp next_in,loop_end_cnt
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//file_start = (uint8_t *) ((uintptr_t) stream->next_in - stream->total_in);
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ldr w_file_start,[stream,_total_in]
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sub file_start, next_in, w_file_start, uxtw
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//uint32_t hist_size = state->dist_mask;
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ldr hist_size,[stream,_internal_state + _dist_mask]
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//uint32_t hash_mask = state->hash_mask;
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ldr hash_mask,[stream,_internal_state + _hash_mask]
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bhi main_loop_end
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main_loop_start:
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//is_full(&state->bitbuf)
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cmp m_out_buf,m_out_end
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bhi update_state_exit
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ldr literal,[next_in]
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crc32cw hash,wzr,literal
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and hash,hash,hash_mask
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///dist = (next_in - file_start - last_seen[hash]) & 0xFFFF;
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ldrh w_tmp0,[last_seen,x_hash,lsl 1] //tmp_w last_seen[hash]
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sub x_dist,next_in,file_start
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//last_seen[hash] = (uint64_t) (next_in - file_start);
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strh dist,[last_seen,x_hash,lsl 1]
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sub dist,dist,w_tmp0
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and dist,dist,0xffff
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sub w_tmp0,dist,1
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cmp hist_size,w_tmp0
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bls get_lit_code
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/// match_length = compare258(next_in - dist, next_in, 258);
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sub x_tmp2,next_in,x_dist
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sub x_hash,end_in,next_in
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compare_max_258_bytes tmp2,next_in,hash,match_length,tmp0,tmp1
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cmp match_length,3
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bls get_lit_code
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get_len_code hufftables,match_length,code,code_len,tmp0
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get_dist_code hufftables,dist,code2,code_len2,tmp0,tmp1,tmp2
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//code |= code2 << code_len;
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//code_len += code_len2;
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lsl code2,code2,code_len
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orr code,code,code2
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add code_len,code_len,code_len2
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//next_in += match_length;
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add next_in,next_in,match_length,uxtw
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//write_bits(&state->bitbuf, code, code_len);
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update_bits stream,code,code_len,m_bits,m_bit_count,m_out_buf
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cmp next_in,loop_end_cnt
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bls main_loop_start
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b main_loop_end
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get_lit_code:
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//get_lit_code(stream->hufftables, literal & 0xFF, &code, &code_len);
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and literal,literal,0xff
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get_lit_code hufftables,literal,code,code_len
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//next_in++;
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add next_in,next_in,1
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//write_bits(&state->bitbuf, code, code_len);
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update_bits stream,code,code_len,m_bits,m_bit_count,m_out_buf
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cmp next_in,loop_end_cnt
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bls main_loop_start
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main_loop_end:
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sub loop_end_cnt,end_in,1
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cmp next_in,loop_end_cnt
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bhi update_not_full
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second_loop_start:
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cmp m_out_buf,m_out_end
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bhi update_state_exit
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ldr literal,[next_in]
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and literal,literal,0xff
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get_lit_code hufftables,literal,code,code_len
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//next_in++;
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add next_in,next_in,1
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//write_bits(&state->bitbuf, code, code_len);
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update_bits stream,code,code_len,m_bits,m_bit_count,m_out_buf
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cmp next_in,loop_end_cnt
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bls second_loop_start
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update_not_full:
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cmp m_out_buf,m_out_end
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bhi update_state_exit
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mov literal,256
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get_lit_code hufftables,literal,code,code_len
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//write_bits(&state->bitbuf, code, code_len);
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update_bits stream,code,code_len,m_bits,m_bit_count,m_out_buf
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ldrh w_end_of_stream, [stream, _end_of_stream]
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mov w_tmp0,1
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strb w_tmp0,[stream,_internal_state_has_eob]
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cmp w_end_of_stream,w_tmp0
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mov w_tmp0, ZSTATE_TRL
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mov w_tmp1, ZSTATE_SYNC_FLUSH
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csel w_tmp0,w_tmp0,w_tmp1,eq
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str w_tmp0, [stream, _internal_state+_state]
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update_state_exit:
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update_state stream,start_in,next_in,end_in,m_out_buf,m_out_start,tmp0,tmp1
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pop_stack
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ret
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.size isal_deflate_finish_aarch64, .-isal_deflate_finish_aarch64
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