mirror of
https://github.com/intel/isa-l.git
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363 lines
9.6 KiB
NASM
363 lines
9.6 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;1;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2023 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;
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;;; gf_2vect_dot_prod_avx2_gfni(len, vec, *g_tbls, **buffs, **dests);
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;;;
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%include "reg_sizes.asm"
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%include "gf_vect_gfni.inc"
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%include "memcpy.asm"
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%if AS_FEATURE_LEVEL >= 10
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%ifidn __OUTPUT_FORMAT__, elf64
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%define arg0 rdi
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%define arg1 rsi
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%define arg2 rdx
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%define arg3 rcx
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%define arg4 r8
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%define arg5 r9
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%define tmp r11
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%define tmp2 r10
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%define tmp3 r13 ; must be saved and restored
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%define tmp4 r12 ; must be saved and restored
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%define tmp5 r14 ; must be saved and restored
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%define stack_size 3*8
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%define func(x) x: endbranch
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%macro FUNC_SAVE 0
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sub rsp, stack_size
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mov [rsp + 0*8], r12
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mov [rsp + 1*8], r13
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mov [rsp + 2*8], r14
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%endmacro
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%macro FUNC_RESTORE 0
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mov r12, [rsp + 0*8]
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mov r13, [rsp + 1*8]
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mov r14, [rsp + 2*8]
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add rsp, stack_size
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%endmacro
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%endif
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%ifidn __OUTPUT_FORMAT__, win64
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%define arg0 rcx
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%define arg1 rdx
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%define arg2 r8
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%define arg3 r9
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%define arg4 r12 ; must be saved, loaded and restored
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%define arg5 r15 ; must be saved and restored
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%define tmp r11
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%define tmp2 r10
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%define tmp3 r13 ; must be saved and restored
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%define tmp4 r14 ; must be saved and restored
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%define tmp5 rdi ; must be saved and restored
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%define stack_size 7*16 + 5*8 ; must be an odd multiple of 8
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%define arg(x) [rsp + stack_size + 8 + 8*x]
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%define func(x) proc_frame x
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%macro FUNC_SAVE 0
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alloc_stack stack_size
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vmovdqa [rsp + 0*16], xmm6
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vmovdqa [rsp + 1*16], xmm7
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vmovdqa [rsp + 2*16], xmm8
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vmovdqa [rsp + 3*16], xmm9
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vmovdqa [rsp + 4*16], xmm10
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vmovdqa [rsp + 5*16], xmm11
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vmovdqa [rsp + 6*16], xmm12
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mov [rsp + 7*16 + 0*8], r12
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mov [rsp + 7*16 + 1*8], r13
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mov [rsp + 7*16 + 2*8], r14
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mov [rsp + 7*16 + 3*8], r15
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mov [rsp + 7*16 + 4*8], rdi
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end_prolog
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mov arg4, arg(4)
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%endmacro
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%macro FUNC_RESTORE 0
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vmovdqa xmm6, [rsp + 0*16]
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vmovdqa xmm7, [rsp + 1*16]
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vmovdqa xmm8, [rsp + 2*16]
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vmovdqa xmm9, [rsp + 3*16]
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vmovdqa xmm10, [rsp + 4*16]
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vmovdqa xmm11, [rsp + 5*16]
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vmovdqa xmm12, [rsp + 6*16]
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mov r12, [rsp + 7*16 + 0*8]
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mov r13, [rsp + 7*16 + 1*8]
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mov r14, [rsp + 7*16 + 2*8]
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mov r15, [rsp + 7*16 + 3*8]
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mov rdi, [rsp + 7*16 + 4*8]
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add rsp, stack_size
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%endmacro
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%endif
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%define len arg0
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%define vec arg1
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%define mul_array arg2
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%define src arg3
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%define dest arg4
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%define ptr arg5
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%define vec_i tmp2
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%define dest2 tmp3
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%define dest1 tmp5
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%define pos rax
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%ifndef EC_ALIGNED_ADDR
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;;; Use Un-aligned load/store
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%define XLDR vmovdqu
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%define XSTR vmovdqu
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%else
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;;; Use Non-temporal load/stor
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%ifdef NO_NT_LDST
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%define XLDR vmovdqa
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%define XSTR vmovdqa
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%else
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%define XLDR vmovntdqa
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%define XSTR vmovntdq
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%endif
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%endif
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%define x0l ymm0
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%define x0h ymm1
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%define x0x ymm2
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%define xgft1 ymm3
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%define xgft2 ymm4
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%define xtmp1 ymm5
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%define xtmp2 ymm6
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%define xp1l ymm7
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%define xp2l ymm8
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%define xp1h ymm9
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%define xp2h ymm10
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%define xp1x ymm11
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%define xp2x ymm12
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%define x0 x0l
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%define xp1 xp1l
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%define xp2 xp2l
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default rel
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[bits 64]
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section .text
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;;
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;; Encodes 96 bytes of all "k" sources into 2x 96 bytes (parity disk)
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;;
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%macro ENCODE_96B_2 0
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vpxor xp1l, xp1l, xp1l
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vpxor xp1h, xp1h, xp1h
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vpxor xp1x, xp1x, xp1x
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vpxor xp2l, xp2l, xp2l
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vpxor xp2h, xp2h, xp2h
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vpxor xp2x, xp2x, xp2x
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mov tmp, mul_array
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xor vec_i, vec_i
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%%next_vect:
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;; load next source vector
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mov ptr, [src + vec_i]
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XLDR x0l, [ptr + pos]
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XLDR x0h, [ptr + pos + 32]
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XLDR x0x, [ptr + pos + 64]
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add vec_i, 8
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vbroadcastsd xgft1, [tmp]
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vbroadcastsd xgft2, [tmp + vec]
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GF_MUL_XOR VEX, x0l, xgft1, xtmp1, xp1l, xgft2, xtmp2, xp2l
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GF_MUL_XOR VEX, x0h, xgft1, xtmp1, xp1h, xgft2, xtmp2, xp2h
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GF_MUL_XOR VEX, x0x, xgft1, xtmp1, xp1x, xgft2, xtmp2, xp2x
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add tmp, 8
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cmp vec_i, vec
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jl %%next_vect
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XSTR [dest1 + pos], xp1l
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XSTR [dest1 + pos + 32], xp1h
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XSTR [dest1 + pos + 64], xp1x
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XSTR [dest2 + pos], xp2l
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XSTR [dest2 + pos + 32], xp2h
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XSTR [dest2 + pos + 64], xp2x
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%endmacro
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;;
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;; Encodes 64 bytes of all "k" sources into 2x 64 bytes (parity disks)
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;;
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%macro ENCODE_64B_2 0
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vpxor xp1l, xp1l, xp1l
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vpxor xp1h, xp1h, xp1h
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vpxor xp2l, xp2l, xp2l
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vpxor xp2h, xp2h, xp2h
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mov tmp, mul_array
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xor vec_i, vec_i
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%%next_vect:
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mov ptr, [src + vec_i]
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XLDR x0l, [ptr + pos] ;; Get next source vector low 32 bytes
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XLDR x0h, [ptr + pos + 32] ;; Get next source vector high 32 bytes
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add vec_i, 8
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vbroadcastsd xgft1, [tmp]
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vbroadcastsd xgft2, [tmp + vec]
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add tmp, 8
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GF_MUL_XOR VEX, x0l, xgft1, xtmp1, xp1l, xgft2, xtmp2, xp2l
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GF_MUL_XOR VEX, x0h, xgft1, xgft1, xp1h, xgft2, xgft2, xp2h
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cmp vec_i, vec
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jl %%next_vect
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XSTR [dest1 + pos], xp1l
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XSTR [dest1 + pos + 32], xp1h
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XSTR [dest2 + pos], xp2l
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XSTR [dest2 + pos + 32], xp2h
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%endmacro
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;;
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;; Encodes 32 bytes of all "k" sources into 2x 32 bytes (parity disks)
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;;
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%macro ENCODE_32B_2 0
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vpxor xp1, xp1, xp1
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vpxor xp2, xp2, xp2
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mov tmp, mul_array
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xor vec_i, vec_i
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%%next_vect:
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mov ptr, [src + vec_i]
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XLDR x0, [ptr + pos] ;Get next source vector (32 bytes)
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add vec_i, 8
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vbroadcastsd xgft1, [tmp]
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vbroadcastsd xgft2, [tmp + vec]
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add tmp, 8
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GF_MUL_XOR VEX, x0, xgft1, xgft1, xp1, xgft2, xgft2, xp2
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cmp vec_i, vec
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jl %%next_vect
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XSTR [dest1 + pos], xp1
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XSTR [dest2 + pos], xp2
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%endmacro
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;;
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;; Encodes less than 32 bytes of all "k" sources into 2 parity disks
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;;
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%macro ENCODE_LT_32B_2 1
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%define %%LEN %1
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vpxor xp1, xp1, xp1
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vpxor xp2, xp2, xp2
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xor vec_i, vec_i
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%%next_vect:
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mov ptr, [src + vec_i]
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simd_load_avx2 x0, ptr + pos, %%LEN, tmp, tmp4 ;Get next source vector
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add vec_i, 8
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vbroadcastsd xgft1, [mul_array]
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vbroadcastsd xgft2, [mul_array + vec]
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add mul_array, 8
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GF_MUL_XOR VEX, x0, xgft1, xgft1, xp1, xgft2, xgft2, xp2
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cmp vec_i, vec
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jl %%next_vect
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;Store updated encoded data
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lea ptr, [dest1 + pos]
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simd_store_avx2 ptr, xp1, %%LEN, tmp, tmp4
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lea ptr, [dest2 + pos]
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simd_store_avx2 ptr, xp2, %%LEN, tmp, tmp4
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%endmacro
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align 16
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mk_global gf_2vect_dot_prod_avx2_gfni, function
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func(gf_2vect_dot_prod_avx2_gfni)
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FUNC_SAVE
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xor pos, pos
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shl vec, 3 ;; vec *= 8. Make vec_i count by 8
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mov dest1, [dest]
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mov dest2, [dest + 8]
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cmp len, 96
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jl .len_lt_96
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.loop96:
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ENCODE_96B_2
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add pos, 96 ;; Loop on 96 bytes at a time first
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sub len, 96
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cmp len, 96
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jge .loop96
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.len_lt_96:
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cmp len, 64
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jl .len_lt_64
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ENCODE_64B_2
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add pos, 64 ;; encode next 64 bytes
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sub len, 64
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.len_lt_64:
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cmp len, 32
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jl .len_lt_32
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ENCODE_32B_2
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add pos, 32 ;; encode next 32 bytes
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sub len, 32
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.len_lt_32:
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cmp len, 0
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jle .exit
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ENCODE_LT_32B_2 len ;; encode remaining bytes
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.exit:
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vzeroupper
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FUNC_RESTORE
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ret
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endproc_frame
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%endif ; if AS_FEATURE_LEVEL >= 10
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