mirror of
https://github.com/intel/isa-l.git
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2e212f28fa
Change-Id: I9ee86a3e32876d3860477c8365fc459d94a8920e Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
582 lines
15 KiB
NASM
582 lines
15 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Function API:
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; uint64_t crc64_jones_norm_by8(
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; uint64_t init_crc, //initial CRC value, 64 bits
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; const unsigned char *buf, //buffer pointer to calculate CRC on
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; uint64_t len //buffer length in bytes (64-bit data)
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; );
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;
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%include "reg_sizes.asm"
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%define fetch_dist 1024
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[bits 64]
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default rel
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section .text
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%ifidn __OUTPUT_FORMAT__, win64
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%xdefine arg1 rcx
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%xdefine arg2 rdx
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%xdefine arg3 r8
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%else
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%xdefine arg1 rdi
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%xdefine arg2 rsi
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%xdefine arg3 rdx
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%endif
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%define TMP 16*0
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%ifidn __OUTPUT_FORMAT__, win64
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%define XMM_SAVE 16*2
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%define VARIABLE_OFFSET 16*10+8
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%else
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%define VARIABLE_OFFSET 16*2+8
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%endif
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align 16
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global crc64_jones_norm_by8:ISAL_SYM_TYPE_FUNCTION
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crc64_jones_norm_by8:
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not arg1 ;~init_crc
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sub rsp,VARIABLE_OFFSET
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%ifidn __OUTPUT_FORMAT__, win64
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; push the xmm registers into the stack to maintain
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movdqa [rsp + XMM_SAVE + 16*0], xmm6
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movdqa [rsp + XMM_SAVE + 16*1], xmm7
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movdqa [rsp + XMM_SAVE + 16*2], xmm8
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movdqa [rsp + XMM_SAVE + 16*3], xmm9
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movdqa [rsp + XMM_SAVE + 16*4], xmm10
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movdqa [rsp + XMM_SAVE + 16*5], xmm11
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movdqa [rsp + XMM_SAVE + 16*6], xmm12
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movdqa [rsp + XMM_SAVE + 16*7], xmm13
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%endif
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; check if smaller than 256
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cmp arg3, 256
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; for sizes less than 256, we can't fold 128B at a time...
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jl _less_than_256
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; load the initial crc value
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movq xmm10, arg1 ; initial crc
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; crc value does not need to be byte-reflected, but it needs to be moved to the high part of the register.
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; because data will be byte-reflected and will align with initial crc at correct place.
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pslldq xmm10, 8
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movdqa xmm11, [SHUF_MASK]
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; receive the initial 128B data, xor the initial crc value
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movdqu xmm0, [arg2+16*0]
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movdqu xmm1, [arg2+16*1]
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movdqu xmm2, [arg2+16*2]
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movdqu xmm3, [arg2+16*3]
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movdqu xmm4, [arg2+16*4]
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movdqu xmm5, [arg2+16*5]
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movdqu xmm6, [arg2+16*6]
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movdqu xmm7, [arg2+16*7]
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pshufb xmm0, xmm11
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; XOR the initial_crc value
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pxor xmm0, xmm10
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pshufb xmm1, xmm11
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pshufb xmm2, xmm11
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pshufb xmm3, xmm11
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pshufb xmm4, xmm11
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pshufb xmm5, xmm11
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pshufb xmm6, xmm11
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pshufb xmm7, xmm11
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movdqa xmm10, [rk3] ;xmm10 has rk3 and rk4
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;imm value of pclmulqdq instruction will determine which constant to use
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; we subtract 256 instead of 128 to save one instruction from the loop
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sub arg3, 256
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; at this section of the code, there is 128*x+y (0<=y<128) bytes of buffer. The _fold_128_B_loop
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; loop will fold 128B at a time until we have 128+y Bytes of buffer
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; fold 128B at a time. This section of the code folds 8 xmm registers in parallel
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_fold_128_B_loop:
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; update the buffer pointer
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add arg2, 128 ; buf += 128;
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prefetchnta [arg2+fetch_dist+0]
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movdqu xmm9, [arg2+16*0]
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movdqu xmm12, [arg2+16*1]
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pshufb xmm9, xmm11
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pshufb xmm12, xmm11
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movdqa xmm8, xmm0
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movdqa xmm13, xmm1
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pclmulqdq xmm0, xmm10, 0x0
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pclmulqdq xmm8, xmm10 , 0x11
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pclmulqdq xmm1, xmm10, 0x0
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pclmulqdq xmm13, xmm10 , 0x11
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pxor xmm0, xmm9
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xorps xmm0, xmm8
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pxor xmm1, xmm12
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xorps xmm1, xmm13
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prefetchnta [arg2+fetch_dist+32]
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movdqu xmm9, [arg2+16*2]
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movdqu xmm12, [arg2+16*3]
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pshufb xmm9, xmm11
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pshufb xmm12, xmm11
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movdqa xmm8, xmm2
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movdqa xmm13, xmm3
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pclmulqdq xmm2, xmm10, 0x0
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pclmulqdq xmm8, xmm10 , 0x11
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pclmulqdq xmm3, xmm10, 0x0
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pclmulqdq xmm13, xmm10 , 0x11
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pxor xmm2, xmm9
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xorps xmm2, xmm8
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pxor xmm3, xmm12
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xorps xmm3, xmm13
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prefetchnta [arg2+fetch_dist+64]
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movdqu xmm9, [arg2+16*4]
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movdqu xmm12, [arg2+16*5]
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pshufb xmm9, xmm11
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pshufb xmm12, xmm11
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movdqa xmm8, xmm4
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movdqa xmm13, xmm5
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pclmulqdq xmm4, xmm10, 0x0
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pclmulqdq xmm8, xmm10 , 0x11
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pclmulqdq xmm5, xmm10, 0x0
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pclmulqdq xmm13, xmm10 , 0x11
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pxor xmm4, xmm9
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xorps xmm4, xmm8
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pxor xmm5, xmm12
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xorps xmm5, xmm13
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prefetchnta [arg2+fetch_dist+96]
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movdqu xmm9, [arg2+16*6]
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movdqu xmm12, [arg2+16*7]
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pshufb xmm9, xmm11
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pshufb xmm12, xmm11
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movdqa xmm8, xmm6
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movdqa xmm13, xmm7
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pclmulqdq xmm6, xmm10, 0x0
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pclmulqdq xmm8, xmm10 , 0x11
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pclmulqdq xmm7, xmm10, 0x0
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pclmulqdq xmm13, xmm10 , 0x11
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pxor xmm6, xmm9
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xorps xmm6, xmm8
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pxor xmm7, xmm12
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xorps xmm7, xmm13
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sub arg3, 128
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; check if there is another 128B in the buffer to be able to fold
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jge _fold_128_B_loop
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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add arg2, 128
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; at this point, the buffer pointer is pointing at the last y Bytes of the buffer, where 0 <= y < 128
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; the 128B of folded data is in 8 of the xmm registers: xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
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; fold the 8 xmm registers to 1 xmm register with different constants
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movdqa xmm10, [rk9]
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movdqa xmm8, xmm0
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pclmulqdq xmm0, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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xorps xmm7, xmm0
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movdqa xmm10, [rk11]
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movdqa xmm8, xmm1
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pclmulqdq xmm1, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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xorps xmm7, xmm1
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movdqa xmm10, [rk13]
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movdqa xmm8, xmm2
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pclmulqdq xmm2, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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pxor xmm7, xmm2
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movdqa xmm10, [rk15]
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movdqa xmm8, xmm3
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pclmulqdq xmm3, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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xorps xmm7, xmm3
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movdqa xmm10, [rk17]
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movdqa xmm8, xmm4
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pclmulqdq xmm4, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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pxor xmm7, xmm4
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movdqa xmm10, [rk19]
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movdqa xmm8, xmm5
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pclmulqdq xmm5, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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xorps xmm7, xmm5
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movdqa xmm10, [rk1] ;xmm10 has rk1 and rk2
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movdqa xmm8, xmm6
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pclmulqdq xmm6, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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pxor xmm7, xmm6
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; instead of 128, we add 112 to the loop counter to save 1 instruction from the loop
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; instead of a cmp instruction, we use the negative flag with the jl instruction
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add arg3, 128-16
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jl _final_reduction_for_128
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; now we have 16+y bytes left to reduce. 16 Bytes is in register xmm7 and the rest is in memory
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; we can fold 16 bytes at a time if y>=16
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; continue folding 16B at a time
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_16B_reduction_loop:
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movdqa xmm8, xmm7
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pclmulqdq xmm7, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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movdqu xmm0, [arg2]
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pshufb xmm0, xmm11
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pxor xmm7, xmm0
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add arg2, 16
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sub arg3, 16
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; instead of a cmp instruction, we utilize the flags with the jge instruction
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; equivalent of: cmp arg3, 16-16
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; check if there is any more 16B in the buffer to be able to fold
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jge _16B_reduction_loop
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;now we have 16+z bytes left to reduce, where 0<= z < 16.
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;first, we reduce the data in the xmm7 register
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_final_reduction_for_128:
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; check if any more data to fold. If not, compute the CRC of the final 128 bits
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add arg3, 16
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je _128_done
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; here we are getting data that is less than 16 bytes.
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; since we know that there was data before the pointer, we can offset the input pointer before the actual point, to receive exactly 16 bytes.
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; after that the registers need to be adjusted.
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_get_last_two_xmms:
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movdqa xmm2, xmm7
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movdqu xmm1, [arg2 - 16 + arg3]
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pshufb xmm1, xmm11
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; get rid of the extra data that was loaded before
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; load the shift constant
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lea rax, [pshufb_shf_table + 16]
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sub rax, arg3
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movdqu xmm0, [rax]
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; shift xmm2 to the left by arg3 bytes
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pshufb xmm2, xmm0
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; shift xmm7 to the right by 16-arg3 bytes
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pxor xmm0, [mask1]
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pshufb xmm7, xmm0
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pblendvb xmm1, xmm2 ;xmm0 is implicit
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; fold 16 Bytes
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movdqa xmm2, xmm1
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movdqa xmm8, xmm7
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pclmulqdq xmm7, xmm10, 0x11
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pclmulqdq xmm8, xmm10, 0x0
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pxor xmm7, xmm8
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pxor xmm7, xmm2
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_128_done:
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; compute crc of a 128-bit value
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movdqa xmm10, [rk5] ; rk5 and rk6 in xmm10
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movdqa xmm0, xmm7
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;64b fold
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pclmulqdq xmm7, xmm10, 0x01 ; H*L
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pslldq xmm0, 8
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pxor xmm7, xmm0
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;barrett reduction
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_barrett:
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movdqa xmm10, [rk7] ; rk7 and rk8 in xmm10
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movdqa xmm0, xmm7
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movdqa xmm1, xmm7
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pand xmm1, [mask3]
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pclmulqdq xmm7, xmm10, 0x01
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pxor xmm7, xmm1
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pclmulqdq xmm7, xmm10, 0x11
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pxor xmm7, xmm0
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pextrq rax, xmm7, 0
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_cleanup:
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not rax
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%ifidn __OUTPUT_FORMAT__, win64
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movdqa xmm6, [rsp + XMM_SAVE + 16*0]
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movdqa xmm7, [rsp + XMM_SAVE + 16*1]
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movdqa xmm8, [rsp + XMM_SAVE + 16*2]
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movdqa xmm9, [rsp + XMM_SAVE + 16*3]
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movdqa xmm10, [rsp + XMM_SAVE + 16*4]
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movdqa xmm11, [rsp + XMM_SAVE + 16*5]
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movdqa xmm12, [rsp + XMM_SAVE + 16*6]
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movdqa xmm13, [rsp + XMM_SAVE + 16*7]
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%endif
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add rsp, VARIABLE_OFFSET
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ret
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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align 16
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_less_than_256:
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; check if there is enough buffer to be able to fold 16B at a time
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cmp arg3, 32
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jl _less_than_32
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movdqa xmm11, [SHUF_MASK]
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; if there is, load the constants
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movdqa xmm10, [rk1] ; rk1 and rk2 in xmm10
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movq xmm0, arg1 ; get the initial crc value
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pslldq xmm0, 8 ; align it to its correct place
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movdqu xmm7, [arg2] ; load the plaintext
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pshufb xmm7, xmm11 ; byte-reflect the plaintext
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pxor xmm7, xmm0
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; update the buffer pointer
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add arg2, 16
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; update the counter. subtract 32 instead of 16 to save one instruction from the loop
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sub arg3, 32
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jmp _16B_reduction_loop
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align 16
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_less_than_32:
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; mov initial crc to the return value. this is necessary for zero-length buffers.
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mov rax, arg1
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test arg3, arg3
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je _cleanup
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movdqa xmm11, [SHUF_MASK]
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movq xmm0, arg1 ; get the initial crc value
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pslldq xmm0, 8 ; align it to its correct place
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cmp arg3, 16
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je _exact_16_left
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jl _less_than_16_left
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movdqu xmm7, [arg2] ; load the plaintext
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pshufb xmm7, xmm11 ; byte-reflect the plaintext
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pxor xmm7, xmm0 ; xor the initial crc value
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add arg2, 16
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sub arg3, 16
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movdqa xmm10, [rk1] ; rk1 and rk2 in xmm10
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jmp _get_last_two_xmms
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align 16
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_less_than_16_left:
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; use stack space to load data less than 16 bytes, zero-out the 16B in memory first.
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pxor xmm1, xmm1
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mov r11, rsp
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movdqa [r11], xmm1
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; backup the counter value
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mov r9, arg3
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cmp arg3, 8
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jl _less_than_8_left
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; load 8 Bytes
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mov rax, [arg2]
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mov [r11], rax
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add r11, 8
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sub arg3, 8
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add arg2, 8
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_less_than_8_left:
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cmp arg3, 4
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jl _less_than_4_left
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; load 4 Bytes
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mov eax, [arg2]
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mov [r11], eax
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add r11, 4
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sub arg3, 4
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add arg2, 4
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_less_than_4_left:
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cmp arg3, 2
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jl _less_than_2_left
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; load 2 Bytes
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mov ax, [arg2]
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mov [r11], ax
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add r11, 2
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sub arg3, 2
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add arg2, 2
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_less_than_2_left:
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cmp arg3, 1
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jl _zero_left
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; load 1 Byte
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mov al, [arg2]
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mov [r11], al
|
|
_zero_left:
|
|
movdqa xmm7, [rsp]
|
|
pshufb xmm7, xmm11
|
|
pxor xmm7, xmm0 ; xor the initial crc value
|
|
|
|
; shl r9, 4
|
|
lea rax, [pshufb_shf_table + 16]
|
|
sub rax, r9
|
|
|
|
cmp r9, 8
|
|
jl _end_1to7
|
|
|
|
_end_8to15:
|
|
movdqu xmm0, [rax]
|
|
pxor xmm0, [mask1]
|
|
|
|
pshufb xmm7, xmm0
|
|
jmp _128_done
|
|
|
|
_end_1to7:
|
|
; Right shift (8-length) bytes in XMM
|
|
add rax, 8
|
|
movdqu xmm0, [rax]
|
|
pshufb xmm7,xmm0
|
|
|
|
jmp _barrett
|
|
align 16
|
|
_exact_16_left:
|
|
movdqu xmm7, [arg2]
|
|
pshufb xmm7, xmm11
|
|
pxor xmm7, xmm0 ; xor the initial crc value
|
|
|
|
jmp _128_done
|
|
|
|
section .data
|
|
|
|
; precomputed constants
|
|
align 16
|
|
|
|
rk1:
|
|
DQ 0x4445ed2750017038
|
|
rk2:
|
|
DQ 0x698b74157cfbd736
|
|
rk3:
|
|
DQ 0x0cfcfb5101c4b775
|
|
rk4:
|
|
DQ 0x65403fd47cbec866
|
|
rk5:
|
|
DQ 0x4445ed2750017038
|
|
rk6:
|
|
DQ 0x0000000000000000
|
|
rk7:
|
|
DQ 0xddf3eeb298be6cf8
|
|
rk8:
|
|
DQ 0xad93d23594c935a9
|
|
rk9:
|
|
DQ 0xd8dc208e2ba527b4
|
|
rk10:
|
|
DQ 0xf032cfec76bb2bc5
|
|
rk11:
|
|
DQ 0xb536044f357f4238
|
|
rk12:
|
|
DQ 0xfdbf104d938ba67a
|
|
rk13:
|
|
DQ 0xeeddad9297a843e7
|
|
rk14:
|
|
DQ 0x3550bce629466473
|
|
rk15:
|
|
DQ 0x4e501e58ca43d25e
|
|
rk16:
|
|
DQ 0x13c961588f27f643
|
|
rk17:
|
|
DQ 0x3b60d00dcb1099bc
|
|
rk18:
|
|
DQ 0x44bf1f468c53b9a3
|
|
rk19:
|
|
DQ 0x96f2236e317179ee
|
|
rk20:
|
|
DQ 0xf00839aa0dd64bac
|
|
|
|
mask1:
|
|
dq 0x8080808080808080, 0x8080808080808080
|
|
mask2:
|
|
dq 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF
|
|
mask3:
|
|
dq 0x0000000000000000, 0xFFFFFFFFFFFFFFFF
|
|
|
|
SHUF_MASK:
|
|
dq 0x08090A0B0C0D0E0F, 0x0001020304050607
|
|
|
|
pshufb_shf_table:
|
|
; use these values for shift constants for the pshufb instruction
|
|
; different alignments result in values as shown:
|
|
; dq 0x8887868584838281, 0x008f8e8d8c8b8a89 ; shl 15 (16-1) / shr1
|
|
; dq 0x8988878685848382, 0x01008f8e8d8c8b8a ; shl 14 (16-3) / shr2
|
|
; dq 0x8a89888786858483, 0x0201008f8e8d8c8b ; shl 13 (16-4) / shr3
|
|
; dq 0x8b8a898887868584, 0x030201008f8e8d8c ; shl 12 (16-4) / shr4
|
|
; dq 0x8c8b8a8988878685, 0x04030201008f8e8d ; shl 11 (16-5) / shr5
|
|
; dq 0x8d8c8b8a89888786, 0x0504030201008f8e ; shl 10 (16-6) / shr6
|
|
; dq 0x8e8d8c8b8a898887, 0x060504030201008f ; shl 9 (16-7) / shr7
|
|
; dq 0x8f8e8d8c8b8a8988, 0x0706050403020100 ; shl 8 (16-8) / shr8
|
|
; dq 0x008f8e8d8c8b8a89, 0x0807060504030201 ; shl 7 (16-9) / shr9
|
|
; dq 0x01008f8e8d8c8b8a, 0x0908070605040302 ; shl 6 (16-10) / shr10
|
|
; dq 0x0201008f8e8d8c8b, 0x0a09080706050403 ; shl 5 (16-11) / shr11
|
|
; dq 0x030201008f8e8d8c, 0x0b0a090807060504 ; shl 4 (16-12) / shr12
|
|
; dq 0x04030201008f8e8d, 0x0c0b0a0908070605 ; shl 3 (16-13) / shr13
|
|
; dq 0x0504030201008f8e, 0x0d0c0b0a09080706 ; shl 2 (16-14) / shr14
|
|
; dq 0x060504030201008f, 0x0e0d0c0b0a090807 ; shl 1 (16-15) / shr15
|
|
dq 0x8786858483828100, 0x8f8e8d8c8b8a8988
|
|
dq 0x0706050403020100, 0x0f0e0d0c0b0a0908
|
|
dq 0x8080808080808080, 0x0f0e0d0c0b0a0908
|
|
dq 0x8080808080808080, 0x8080808080808080
|
|
|
|
;;; func core, ver, snum
|
|
slversion crc64_jones_norm_by8, 01, 00, 0026
|