mirror of
https://github.com/intel/isa-l.git
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5f23c03415
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
102 lines
4.4 KiB
NASM
102 lines
4.4 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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%include "reg_sizes.asm"
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%include "multibinary.asm"
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%ifidn __OUTPUT_FORMAT__, elf32
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[bits 32]
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%else
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default rel
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[bits 64]
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extern ec_encode_data_update_sse
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extern ec_encode_data_update_avx
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extern ec_encode_data_update_avx2
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%ifdef HAVE_AS_KNOWS_AVX512
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extern ec_encode_data_avx512
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extern gf_vect_dot_prod_avx512
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extern ec_encode_data_update_avx512
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extern gf_vect_mad_avx512
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%endif
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extern gf_vect_mul_sse
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extern gf_vect_mul_avx
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extern gf_vect_mad_sse
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extern gf_vect_mad_avx
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extern gf_vect_mad_avx2
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%endif
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%if (AS_FEATURE_LEVEL) >= 10
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extern ec_init_tables_gfni
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extern ec_encode_data_avx512_gfni
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extern ec_encode_data_avx2_gfni
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extern ec_encode_data_update_avx512_gfni
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extern ec_encode_data_update_avx2_gfni
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%endif
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extern ec_init_tables_base
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extern gf_vect_mul_base
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extern ec_encode_data_base
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extern ec_encode_data_update_base
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extern gf_vect_dot_prod_base
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extern gf_vect_mad_base
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extern gf_vect_dot_prod_sse
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extern gf_vect_dot_prod_avx
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extern gf_vect_dot_prod_avx2
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extern ec_encode_data_sse
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extern ec_encode_data_avx
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extern ec_encode_data_avx2
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mbin_interface ec_encode_data
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mbin_interface gf_vect_dot_prod
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mbin_interface gf_vect_mul
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mbin_interface ec_encode_data_update
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mbin_interface gf_vect_mad
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mbin_interface ec_init_tables
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%ifidn __OUTPUT_FORMAT__, elf32
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mbin_dispatch_init5 ec_encode_data, ec_encode_data_base, ec_encode_data_sse, ec_encode_data_avx, ec_encode_data_avx2
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mbin_dispatch_init5 gf_vect_dot_prod, gf_vect_dot_prod_base, gf_vect_dot_prod_sse, gf_vect_dot_prod_avx, gf_vect_dot_prod_avx2
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mbin_dispatch_init2 gf_vect_mul, gf_vect_mul_base
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mbin_dispatch_init2 ec_encode_data_update, ec_encode_data_update_base
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mbin_dispatch_init2 gf_vect_mad, gf_vect_mad_base
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mbin_dispatch_init2 ec_init_tables, ec_init_tables_base
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%else
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mbin_dispatch_init5 gf_vect_mul, gf_vect_mul_base, gf_vect_mul_sse, gf_vect_mul_avx, gf_vect_mul_avx
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mbin_dispatch_init8 ec_encode_data, ec_encode_data_base, ec_encode_data_sse, ec_encode_data_avx, ec_encode_data_avx2, ec_encode_data_avx512, ec_encode_data_avx2_gfni, ec_encode_data_avx512_gfni
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mbin_dispatch_init8 ec_encode_data_update, ec_encode_data_update_base, ec_encode_data_update_sse, ec_encode_data_update_avx, ec_encode_data_update_avx2, ec_encode_data_update_avx512, ec_encode_data_update_avx2_gfni, ec_encode_data_update_avx512_gfni
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mbin_dispatch_init6 gf_vect_mad, gf_vect_mad_base, gf_vect_mad_sse, gf_vect_mad_avx, gf_vect_mad_avx2, gf_vect_mad_avx512
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mbin_dispatch_init6 gf_vect_dot_prod, gf_vect_dot_prod_base, gf_vect_dot_prod_sse, gf_vect_dot_prod_avx, gf_vect_dot_prod_avx2, gf_vect_dot_prod_avx512
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mbin_dispatch_init8 ec_init_tables, ec_init_tables_base, ec_init_tables_base, ec_init_tables_base, ec_init_tables_base, ec_init_tables_base, ec_init_tables_gfni, ec_init_tables_gfni
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%endif
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