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cd888f01a4
To support Intel CET, all indirect branch targets must start with ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to function entries in x86 assembly codes which are indirect branch targets as discovered by running testsuite on Intel CET machine and visual inspection. Verified with $ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux $ make -j8 $ make -j8 check with both nasm and yasm on both CET and non-CET machines. Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337 Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
254 lines
5.1 KiB
NASM
254 lines
5.1 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2017 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; uint32_t adler32_avx2(uint32_t init, const unsigned char *buf, uint64_t len)
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%define LIMIT 5552
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%define BASE 0xFFF1 ; 65521
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%include "reg_sizes.asm"
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default rel
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[bits 64]
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; need to keep free: eax, ecx, edx
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%ifidn __OUTPUT_FORMAT__, elf64
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%define arg1 rdi
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%define arg2 rsi
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%define arg3 rdx
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%define init_d edi
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%define data r9
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%define size r10
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%define s r11
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%define a_d r12d
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%define b_d r8d
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%define end r13
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%define func(x) x: endbranch
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%macro FUNC_SAVE 0
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push r12
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push r13
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%endmacro
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%macro FUNC_RESTORE 0
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pop r13
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pop r12
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%endmacro
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%endif
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%ifidn __OUTPUT_FORMAT__, win64
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%define arg1 rcx
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%define arg2 rdx
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%define arg3 r8
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%define init_d r12d
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%define data r9
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%define size r10
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%define s r11
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%define a_d esi
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%define b_d edi
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%define end r13
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%define stack_size 5*8 ; must be an odd multiple of 8
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%define func(x) proc_frame x
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%macro FUNC_SAVE 0
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alloc_stack stack_size
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save_reg rdi, 0*8
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save_reg rsi, 1*8
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save_reg r12, 2*8
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save_reg r13, 3*8
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end_prolog
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mov init_d, ecx ; initalize init_d from arg1 to keep ecx free
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%endmacro
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%macro FUNC_RESTORE 0
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mov rdi, [rsp + 0*8]
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mov rsi, [rsp + 1*8]
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mov r12, [rsp + 2*8]
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mov r13, [rsp + 3*8]
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add rsp, stack_size
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%endmacro
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%endif
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%define xa xmm0
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%define xb xmm1
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%define xdata0 xmm2
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%define xdata1 xmm3
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%define xsa xmm4
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[bits 64]
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default rel
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section .text
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mk_global adler32_sse, function
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func(adler32_sse)
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FUNC_SAVE
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mov data, arg2
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mov size, arg3
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mov b_d, init_d
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shr b_d, 16
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and init_d, 0xFFFF
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cmp size, 32
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jb .lt64
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movd xa, init_d
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pxor xb, xb
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.sloop1:
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mov s, LIMIT
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cmp s, size
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cmova s, size ; s = min(size, LIMIT)
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lea end, [data + s - 7]
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cmp data, end
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jae .skip_loop_1a
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align 32
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.sloop1a:
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; do 8 adds
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pmovzxbd xdata0, [data]
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pmovzxbd xdata1, [data + 4]
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add data, 8
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paddd xa, xdata0
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paddd xb, xa
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paddd xa, xdata1
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paddd xb, xa
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cmp data, end
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jb .sloop1a
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.skip_loop_1a:
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add end, 7
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test s, 7
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jnz .do_final
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; either we're done, or we just did LIMIT
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sub size, s
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; reduce
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pslld xb, 2 ; b is scaled by 4
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movdqa xsa, xa ; scaled a
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pmulld xsa, [A_SCALE]
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phaddd xa, xa
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phaddd xb, xb
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phaddd xsa, xsa
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phaddd xa, xa
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phaddd xb, xb
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phaddd xsa, xsa
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movd eax, xa
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xor edx, edx
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mov ecx, BASE
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div ecx ; divide edx:eax by ecx, quot->eax, rem->edx
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mov a_d, edx
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psubd xb, xsa
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movd eax, xb
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add eax, b_d
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xor edx, edx
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mov ecx, BASE
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div ecx ; divide edx:eax by ecx, quot->eax, rem->edx
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mov b_d, edx
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test size, size
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jz .finish
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; continue loop
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movd xa, a_d
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pxor xb, xb
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jmp .sloop1
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.finish:
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mov eax, b_d
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shl eax, 16
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or eax, a_d
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jmp .end
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.lt64:
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mov a_d, init_d
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lea end, [data + size]
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test size, size
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jnz .final_loop
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jmp .zero_size
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; handle remaining 1...15 bytes
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.do_final:
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; reduce
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pslld xb, 2 ; b is scaled by 4
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movdqa xsa, xa ; scaled a
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pmulld xsa, [A_SCALE]
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phaddd xa, xa
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phaddd xb, xb
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phaddd xsa, xsa
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phaddd xa, xa
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phaddd xb, xb
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phaddd xsa, xsa
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psubd xb, xsa
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movd a_d, xa
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movd eax, xb
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add b_d, eax
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align 32
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.final_loop:
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movzx eax, byte[data]
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add a_d, eax
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inc data
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add b_d, a_d
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cmp data, end
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jb .final_loop
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.zero_size:
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mov eax, a_d
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xor edx, edx
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mov ecx, BASE
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div ecx ; divide edx:eax by ecx, quot->eax, rem->edx
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mov a_d, edx
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mov eax, b_d
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xor edx, edx
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mov ecx, BASE
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div ecx ; divide edx:eax by ecx, quot->eax, rem->edx
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shl edx, 16
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or edx, a_d
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mov eax, edx
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.end:
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FUNC_RESTORE
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ret
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endproc_frame
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section .data
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align 32
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A_SCALE:
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dq 0x0000000100000000, 0x0000000300000002
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