mirror of
https://github.com/intel/isa-l.git
synced 2024-12-12 17:33:50 +01:00
1187583a97
- It should be fine to enable pmull always on Apple Silicon - macOS 12+ is required for PMULL instruction. - Changed the conditional macro to __APPLE__ - Rewritten dispatcher using sysctlbyname - Use __USER_LABEL_PREFIX__ - Use __TEXT,__const as readonly section - use ASM_DEF_RODATA macro - fix func decl Change-Id: I800593f21085d8187b480c8bb3ab2bd70c4a6974 Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
326 lines
9.5 KiB
ArmAsm
326 lines
9.5 KiB
ArmAsm
/**********************************************************************
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Copyright(c) 2019 Arm Corporation All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Arm Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#include "../include/aarch64_label.h"
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.arch armv8-a+crc
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.text
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.align 2
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#include "lz0a_const_aarch64.h"
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#include "data_struct_aarch64.h"
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#include "huffman_aarch64.h"
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#include "bitbuf2_aarch64.h"
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#include "stdmac_aarch64.h"
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/*
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declare Macros
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*/
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.macro declare_generic_reg name:req,reg:req,default:req
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\name .req \default\reg
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w_\name .req w\reg
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x_\name .req x\reg
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.endm
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.macro convert_dist_to_dist_sym dist:req,tmp0:req,tmp1:req
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mov w_\tmp0, w_\dist
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mov w_\dist, -1
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cmp w_\tmp0, 32768
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bhi .dist2code_done
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sub w_\dist, w_\tmp0, #1
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cmp w_\tmp0, 4
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bls .dist2code_done
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clz w_\tmp1, w_\dist
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mov w_\tmp0, 30
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sub w_\tmp0, w_\tmp0, w_\tmp1
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lsr w_\dist, w_\dist, w_\tmp0
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add w_\dist, w_\dist, w_\tmp0, lsl 1
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.dist2code_done:
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.endm
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.macro convert_length_to_len_sym length:req,length_out:req,tmp0:req
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#ifndef __APPLE__
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adrp x_\tmp0, .len_to_code_tab_lanchor
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add x_\tmp0, x_\tmp0, :lo12:.len_to_code_tab_lanchor
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#else
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adrp x_\tmp0, .len_to_code_tab_lanchor@PAGE
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add x_\tmp0, x_\tmp0, .len_to_code_tab_lanchor@PAGEOFF
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#endif
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ldr w_\length_out, [x_\tmp0, w_\length, uxtw 2]
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add w_\length_out, w_\length_out, 256
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.endm
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ASM_DEF_RODATA
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.align 4
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.len_to_code_tab_lanchor = . + 0
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#ifndef __APPLE__
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.type len_to_code_tab, %object
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.size len_to_code_tab, 1056
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#endif
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len_to_code_tab:
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.word 0x00, 0x00, 0x00
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.word 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08
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.word 0x09, 0x09, 0x0a, 0x0a, 0x0b, 0x0b, 0x0c, 0x0c
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.word 0x0d, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0e
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.word 0x0f, 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10, 0x10
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.word 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11
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.word 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12
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.word 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13
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.word 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14
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.word 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15
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.word 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15
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.word 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16
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.word 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16
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.word 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17
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.word 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17
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.word 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18
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.word 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18
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.word 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19
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.word 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19
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.word 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19
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.word 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19
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.word 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a
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.word 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a
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.word 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a
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.word 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a
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.word 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b
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.word 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b
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.word 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b
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.word 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b
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.word 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c
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.word 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c
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.word 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c
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.word 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1d
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.word 0x00, 0x00, 0x00, 0x00, 0x00
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.text
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.global cdecl(isal_update_histogram_aarch64)
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.arch armv8-a+crc
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#ifndef __APPLE__
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.type isal_update_histogram_aarch64, %function
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#endif
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/*
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void isal_update_histogram_aarch64(uint8_t * start_stream, int length,
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struct isal_huff_histogram *histogram);
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*/
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/* arguments */
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declare_generic_reg start_stream, 0,x
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declare_generic_reg length, 1,x
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declare_generic_reg histogram, 2,x
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declare_generic_reg param0, 0,x
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declare_generic_reg param1, 1,x
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declare_generic_reg param2, 2,x
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/* local variable */
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declare_generic_reg start_stream_saved, 10,x
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declare_generic_reg histogram_saved, 23,x
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declare_generic_reg current, 19,x
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declare_generic_reg last_seen, 20,x
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declare_generic_reg end_stream, 21,x
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declare_generic_reg loop_end_iter, 22,x
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declare_generic_reg dist_histogram, 12,x
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declare_generic_reg lit_len_histogram, 23,x
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declare_generic_reg literal, 8,x
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declare_generic_reg next_hash, 9,x
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declare_generic_reg end, 4,x
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declare_generic_reg dist, 7,x
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declare_generic_reg D, 11,w
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declare_generic_reg match_length, 3,w
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declare_generic_reg tmp0, 5,w
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declare_generic_reg tmp1, 6,w
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/* constant */
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.equ LIT_LEN, 286
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.equ DIST_LEN, 30
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.equ lit_len_offset, 0
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.equ dist_offset, (8*LIT_LEN) // 2288
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.equ hash_offset, (dist_offset + 8*DIST_LEN) // 2528
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.equ hash_table_size, (8*1024*2) // 16384
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cdecl(isal_update_histogram_aarch64):
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cmp w_length, 0
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ble .done
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stp x29, x30, [sp, -64]!
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add x29, sp, 0
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stp x19, x20, [sp, 16]
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stp x21, x22, [sp, 32]
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str x23, [sp, 48]
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add last_seen, histogram, hash_offset
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add end_stream, start_stream, w_length, sxtw
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mov current, start_stream
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sub loop_end_iter, end_stream, #3
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mov histogram_saved, histogram
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mov x0, last_seen
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mov w1, 0
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mov x2, hash_table_size
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bl cdecl(memset)
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cmp current, loop_end_iter
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bcs .loop_end
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mov start_stream_saved, current
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add dist_histogram, histogram_saved, dist_offset
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mov D, 32766
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b .loop
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.align 2
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.loop_2nd_stream:
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and literal, literal, 0xff
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mov current, next_hash
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cmp loop_end_iter, current
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ldr x0, [lit_len_histogram, literal, lsl 3]
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add x0, x0, 1
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str x0, [lit_len_histogram, literal, lsl 3]
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bls .loop_end
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.loop:
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ldr w_literal, [current]
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add next_hash, current, 1
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mov w0, w_literal
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crc32cw w0, wzr, w0
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ubfiz x0, x0, 1, 13
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sub x2, current, start_stream_saved
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ldrh w_dist, [last_seen, x0]
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strh w2, [last_seen, x0]
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sub w2, w2, w_dist
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and w_dist, w2, 65535
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sub w0, w_dist, #1
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cmp w0, D
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bhi .loop_2nd_stream
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sub w2, w_end_stream, w_current
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mov x1, current
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sub x0, current, w_dist, uxth
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compare_max_258_bytes param0,param1,param2,match_length,tmp0,tmp1
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cmp match_length, 3
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bls .loop_2nd_stream
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add end, current, 3
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cmp end, loop_end_iter
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csel end, end, loop_end_iter, ls
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cmp end, next_hash
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bls .skip_inner_loop
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.align 3
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.inner_loop:
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ldr w0, [next_hash]
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crc32cw w0, wzr, w0
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ubfiz x0, x0, 1, 13
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sub x1, next_hash, start_stream_saved
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add next_hash, next_hash, 1
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cmp next_hash, end
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strh w1, [last_seen, x0]
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bne .inner_loop
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.skip_inner_loop:
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convert_dist_to_dist_sym dist, tmp0, tmp1
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uxtw x2, w_dist
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ldr x1, [dist_histogram, x2, lsl 3]
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add x1, x1, 1
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str x1, [dist_histogram, x2, lsl 3]
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convert_length_to_len_sym match_length,tmp1,tmp0
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uxtw x0, w_tmp1
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ldr x1, [lit_len_histogram, x0, lsl 3]
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add x1, x1, 1
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str x1, [lit_len_histogram, x0, lsl 3]
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sub match_length, match_length, #1
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add x3, x3, 1
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add current, current, x3
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cmp loop_end_iter, current
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bhi .loop
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.align 3
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// fold the last for loop
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.loop_end:
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cmp end_stream, current
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bls .loop_fold_end
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mov x0, current
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ldrb w1, [x0], 1
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cmp end_stream, x0
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ldr x0, [lit_len_histogram, x1, lsl 3]
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add x0, x0, 1
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str x0, [lit_len_histogram, x1, lsl 3]
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bls .loop_fold_end
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ldrb w1, [current, 1]
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add x0, current, 2
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cmp end_stream, x0
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ldr x0, [lit_len_histogram, x1, lsl 3]
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add x0, x0, 1
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str x0, [lit_len_histogram, x1, lsl 3]
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bls .loop_fold_end
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ldrb w1, [current, 2]
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add x0, current, 3
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cmp end_stream, x0
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ldr x0, [lit_len_histogram, x1, lsl 3]
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add x0, x0, 1
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str x0, [lit_len_histogram, x1, lsl 3]
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bls .loop_fold_end
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ldrb w1, [current, 3]
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ldr x0, [lit_len_histogram, x1, lsl 3]
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add x0, x0, 1
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str x0, [lit_len_histogram, x1, lsl 3]
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.loop_fold_end:
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ldr x0, [lit_len_histogram, (256*8)]
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add x0, x0, 1
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str x0, [lit_len_histogram, (256*8)]
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ldr x23, [sp, 48]
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ldp x19, x20, [sp, 16]
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ldp x21, x22, [sp, 32]
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ldp x29, x30, [sp], 64
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ret
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.align 2
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.done:
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ret
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#ifndef __APPLE__
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.size isal_update_histogram_aarch64, .-isal_update_histogram_aarch64
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#endif
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