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1c71f9c0ae
Tweak performances with prefetch instructions. Below is the test results: - Neoverse N1: ~30% - Cortex-A72: ~3% - Cortex-A57: ~90% - Others: 50% - 5x Change-Id: I3ab292a953043dbaea98af3c66778f57da3a1331 Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
67 lines
2.4 KiB
ArmAsm
67 lines
2.4 KiB
ArmAsm
/**********************************************************************
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Copyright(c) 2020 Arm Corporation All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Arm Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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.text
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.align 6
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.arch armv8-a+crc
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#include "crc32_aarch64_common.h"
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BUF .req x1
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LEN .req x2
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wCRC .req w0
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data0 .req x4
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data1 .req x5
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data2 .req x6
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data3 .req x7
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wdata .req w3
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.macro crc32_u64 dst,src,data
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crc32x \dst,\src,\data
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.endm
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.macro crc32_u32 dst,src,data
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crc32w \dst,\src,\data
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.endm
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.macro crc32_u16 dst,src,data
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crc32h \dst,\src,\data
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.endm
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.macro crc32_u8 dst,src,data
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crc32b \dst,\src,\data
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.endm
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/**
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* uint32_t crc32_gzip_refl_crc_ext(const unsigned char *BUF,
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* uint64_t LEN,uint32_t wCRC);
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*/
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.global crc32_gzip_refl_crc_ext
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.type crc32_gzip_refl_crc_ext, %function
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crc32_gzip_refl_crc_ext:
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crc32_hw_common crc32
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.size crc32_gzip_refl_crc_ext, .-crc32_gzip_refl_crc_ext
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