mirror of
https://github.com/intel/isa-l.git
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1187583a97
- It should be fine to enable pmull always on Apple Silicon - macOS 12+ is required for PMULL instruction. - Changed the conditional macro to __APPLE__ - Rewritten dispatcher using sysctlbyname - Use __USER_LABEL_PREFIX__ - Use __TEXT,__const as readonly section - use ASM_DEF_RODATA macro - fix func decl Change-Id: I800593f21085d8187b480c8bb3ab2bd70c4a6974 Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
485 lines
12 KiB
ArmAsm
485 lines
12 KiB
ArmAsm
/**************************************************************
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Copyright (c) 2019 Huawei Technologies Co., Ltd.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Huawei Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#include "../include/aarch64_label.h"
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.text
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.global cdecl(gf_5vect_dot_prod_neon)
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#ifndef __APPLE__
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.type gf_5vect_dot_prod_neon, %function
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#endif
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/* arguments */
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x_len .req x0
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x_vec .req x1
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x_tbl .req x2
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x_src .req x3
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x_dest .req x4
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/* returns */
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w_ret .req w0
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/* local variables */
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x_vec_i .req x5
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x_ptr .req x6
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x_pos .req x7
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x_tmp .req x8
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x_dest1 .req x9
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x_dest2 .req x10
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x_dest3 .req x11
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x_dest4 .req x12
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x_dest5 .req x13
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/* vectors */
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v_tmp1 .req v0
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q_tmp1 .req q0
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v_tmp2 .req v1
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q_tmp2 .req q1
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v_mask0f .req v_tmp1
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q_mask0f .req q_tmp1
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v_tmp_lo .req v_tmp1
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v_tmp_hi .req v_tmp2
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v_gft_lo .req v2
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v_gft_hi .req v3
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q_gft_lo .req q2
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q_gft_hi .req q3
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v_p1_0 .req v4
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v_p2_0 .req v5
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v_p3_0 .req v6
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v_p4_0 .req v7
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q_p1_0 .req q4
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q_p2_0 .req q5
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q_p3_0 .req q6
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q_p4_0 .req q7
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v_data_0 .req v8
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v_data_1 .req v9
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v_data_2 .req v10
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v_data_3 .req v11
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q_data_0 .req q8
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q_data_1 .req q9
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q_data_2 .req q10
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q_data_3 .req q11
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v_data_0_lo .req v12
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v_data_1_lo .req v13
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v_data_2_lo .req v14
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v_data_3_lo .req v15
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v_data_0_hi .req v_data_0
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v_data_1_hi .req v_data_1
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v_data_2_hi .req v_data_2
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v_data_3_hi .req v_data_3
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v_p5_0 .req v16
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v_p1_1 .req v17
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v_p2_1 .req v18
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v_p3_1 .req v19
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v_p4_1 .req v20
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v_p5_1 .req v21
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v_p1_2 .req v22
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v_p2_2 .req v23
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v_p3_2 .req v24
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v_p4_2 .req v25
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v_p5_2 .req v26
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v_p1_3 .req v27
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v_p2_3 .req v28
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v_p3_3 .req v29
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v_p4_3 .req v30
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v_p5_3 .req v31
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q_p5_0 .req q16
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q_p1_1 .req q17
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q_p2_1 .req q18
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q_p3_1 .req q19
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q_p4_1 .req q20
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q_p5_1 .req q21
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q_p1_2 .req q22
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q_p2_2 .req q23
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q_p3_2 .req q24
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q_p4_2 .req q25
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q_p5_2 .req q26
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q_p1_3 .req q27
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q_p2_3 .req q28
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q_p3_3 .req q29
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q_p4_3 .req q30
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q_p5_3 .req q31
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v_data .req v_p1_1
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q_data .req q_p1_1
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v_data_lo .req v_p2_1
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v_data_hi .req v_p3_1
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v_gft1_lo .req v_p4_1
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v_gft1_hi .req v_p5_1
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v_gft2_lo .req v_p1_2
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v_gft2_hi .req v_p2_2
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v_gft3_lo .req v_p3_2
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v_gft3_hi .req v_p4_2
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v_gft4_lo .req v_p5_2
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v_gft4_hi .req v_p1_3
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v_gft5_lo .req v_p2_3
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v_gft5_hi .req v_p3_3
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q_gft1_lo .req q_p4_1
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q_gft1_hi .req q_p5_1
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q_gft2_lo .req q_p1_2
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q_gft2_hi .req q_p2_2
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q_gft3_lo .req q_p3_2
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q_gft3_hi .req q_p4_2
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q_gft4_lo .req q_p5_2
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q_gft4_hi .req q_p1_3
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q_gft5_lo .req q_p2_3
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q_gft5_hi .req q_p3_3
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cdecl(gf_5vect_dot_prod_neon):
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/* less than 16 bytes, return_fail */
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cmp x_len, #16
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blt .return_fail
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mov x_pos, #0
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lsl x_vec, x_vec, #3
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ldr x_dest1, [x_dest, #8*0]
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ldr x_dest2, [x_dest, #8*1]
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ldr x_dest3, [x_dest, #8*2]
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ldr x_dest4, [x_dest, #8*3]
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ldr x_dest5, [x_dest, #8*4]
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.Lloop64_init:
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/* less than 64 bytes, goto Lloop16_init */
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cmp x_len, #64
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blt .Lloop16_init
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/* save d8 ~ d15 to stack */
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sub sp, sp, #64
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stp d8, d9, [sp]
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stp d10, d11, [sp, #16]
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stp d12, d13, [sp, #32]
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stp d14, d15, [sp, #48]
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sub x_len, x_len, #64
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.Lloop64:
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movi v_p1_0.16b, #0
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movi v_p1_1.16b, #0
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movi v_p1_2.16b, #0
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movi v_p1_3.16b, #0
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movi v_p2_0.16b, #0
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movi v_p2_1.16b, #0
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movi v_p2_2.16b, #0
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movi v_p2_3.16b, #0
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movi v_p3_0.16b, #0
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movi v_p3_1.16b, #0
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movi v_p3_2.16b, #0
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movi v_p3_3.16b, #0
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movi v_p4_0.16b, #0
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movi v_p4_1.16b, #0
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movi v_p4_2.16b, #0
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movi v_p4_3.16b, #0
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movi v_p5_0.16b, #0
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movi v_p5_1.16b, #0
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movi v_p5_2.16b, #0
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movi v_p5_3.16b, #0
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mov x_vec_i, #0
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.Lloop64_vects:
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ldr x_ptr, [x_src, x_vec_i]
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add x_ptr, x_ptr, x_pos
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ldr q_data_0, [x_ptr], #16
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ldr q_data_1, [x_ptr], #16
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ldr q_data_2, [x_ptr], #16
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ldr q_data_3, [x_ptr], #16
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prfm pldl2keep, [x_ptr]
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movi v_mask0f.16b, #0x0f
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and v_data_0_lo.16b, v_data_0.16b, v_mask0f.16b
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and v_data_1_lo.16b, v_data_1.16b, v_mask0f.16b
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and v_data_2_lo.16b, v_data_2.16b, v_mask0f.16b
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and v_data_3_lo.16b, v_data_3.16b, v_mask0f.16b
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ushr v_data_0_hi.16b, v_data_0.16b, #4
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ushr v_data_1_hi.16b, v_data_1.16b, #4
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ushr v_data_2_hi.16b, v_data_2.16b, #4
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ushr v_data_3_hi.16b, v_data_3.16b, #4
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/* v_p1_x */
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add x_tmp, x_tbl, x_vec_i, lsl #2
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add x_vec_i, x_vec_i, #8
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ldp q_gft_lo, q_gft_hi, [x_tmp]
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prfm pldl3keep, [x_tmp, #32]
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add x_tmp, x_tmp, x_vec, lsl #2
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_0_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_0_hi.16b
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eor v_p1_0.16b, v_tmp_lo.16b, v_p1_0.16b
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eor v_p1_0.16b, v_p1_0.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_1_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_1_hi.16b
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eor v_p1_1.16b, v_tmp_lo.16b, v_p1_1.16b
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eor v_p1_1.16b, v_p1_1.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_2_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_2_hi.16b
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eor v_p1_2.16b, v_tmp_lo.16b, v_p1_2.16b
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eor v_p1_2.16b, v_p1_2.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_3_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_3_hi.16b
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eor v_p1_3.16b, v_tmp_lo.16b, v_p1_3.16b
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eor v_p1_3.16b, v_p1_3.16b, v_tmp_hi.16b
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/* v_p2_x */
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ldp q_gft_lo, q_gft_hi, [x_tmp]
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prfm pldl3keep, [x_tmp, #32]
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add x_tmp, x_tmp, x_vec, lsl #2
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_0_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_0_hi.16b
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eor v_p2_0.16b, v_tmp_lo.16b, v_p2_0.16b
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eor v_p2_0.16b, v_p2_0.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_1_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_1_hi.16b
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eor v_p2_1.16b, v_tmp_lo.16b, v_p2_1.16b
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eor v_p2_1.16b, v_p2_1.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_2_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_2_hi.16b
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eor v_p2_2.16b, v_tmp_lo.16b, v_p2_2.16b
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eor v_p2_2.16b, v_p2_2.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_3_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_3_hi.16b
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eor v_p2_3.16b, v_tmp_lo.16b, v_p2_3.16b
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eor v_p2_3.16b, v_p2_3.16b, v_tmp_hi.16b
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/* v_p3_x */
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ldp q_gft_lo, q_gft_hi, [x_tmp]
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prfm pldl3keep, [x_tmp, #32]
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add x_tmp, x_tmp, x_vec, lsl #2
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_0_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_0_hi.16b
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eor v_p3_0.16b, v_tmp_lo.16b, v_p3_0.16b
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eor v_p3_0.16b, v_p3_0.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_1_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_1_hi.16b
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eor v_p3_1.16b, v_tmp_lo.16b, v_p3_1.16b
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eor v_p3_1.16b, v_p3_1.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_2_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_2_hi.16b
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eor v_p3_2.16b, v_tmp_lo.16b, v_p3_2.16b
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eor v_p3_2.16b, v_p3_2.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_3_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_3_hi.16b
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eor v_p3_3.16b, v_tmp_lo.16b, v_p3_3.16b
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eor v_p3_3.16b, v_p3_3.16b, v_tmp_hi.16b
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/* v_p4_x */
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ldp q_gft_lo, q_gft_hi, [x_tmp]
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prfm pldl3keep, [x_tmp, #32]
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add x_tmp, x_tmp, x_vec, lsl #2
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_0_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_0_hi.16b
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eor v_p4_0.16b, v_tmp_lo.16b, v_p4_0.16b
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eor v_p4_0.16b, v_p4_0.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_1_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_1_hi.16b
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eor v_p4_1.16b, v_tmp_lo.16b, v_p4_1.16b
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eor v_p4_1.16b, v_p4_1.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_2_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_2_hi.16b
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eor v_p4_2.16b, v_tmp_lo.16b, v_p4_2.16b
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eor v_p4_2.16b, v_p4_2.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_3_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_3_hi.16b
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eor v_p4_3.16b, v_tmp_lo.16b, v_p4_3.16b
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eor v_p4_3.16b, v_p4_3.16b, v_tmp_hi.16b
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/* v_p5_x */
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ldp q_gft_lo, q_gft_hi, [x_tmp]
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prfm pldl3keep, [x_tmp, #32]
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_0_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_0_hi.16b
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eor v_p5_0.16b, v_tmp_lo.16b, v_p5_0.16b
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eor v_p5_0.16b, v_p5_0.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_1_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_1_hi.16b
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eor v_p5_1.16b, v_tmp_lo.16b, v_p5_1.16b
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eor v_p5_1.16b, v_p5_1.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_2_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_2_hi.16b
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eor v_p5_2.16b, v_tmp_lo.16b, v_p5_2.16b
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eor v_p5_2.16b, v_p5_2.16b, v_tmp_hi.16b
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tbl v_tmp_lo.16b, {v_gft_lo.16b}, v_data_3_lo.16b
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tbl v_tmp_hi.16b, {v_gft_hi.16b}, v_data_3_hi.16b
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eor v_p5_3.16b, v_tmp_lo.16b, v_p5_3.16b
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eor v_p5_3.16b, v_p5_3.16b, v_tmp_hi.16b
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cmp x_vec_i, x_vec
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blt .Lloop64_vects
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.Lloop64_vects_end:
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add x_ptr, x_dest1, x_pos
|
|
stp q_p1_0, q_p1_1, [x_ptr], #32
|
|
stp q_p1_2, q_p1_3, [x_ptr]
|
|
|
|
add x_ptr, x_dest2, x_pos
|
|
stp q_p2_0, q_p2_1, [x_ptr], #32
|
|
stp q_p2_2, q_p2_3, [x_ptr]
|
|
|
|
add x_ptr, x_dest3, x_pos
|
|
stp q_p3_0, q_p3_1, [x_ptr], #32
|
|
stp q_p3_2, q_p3_3, [x_ptr]
|
|
|
|
add x_ptr, x_dest4, x_pos
|
|
stp q_p4_0, q_p4_1, [x_ptr], #32
|
|
stp q_p4_2, q_p4_3, [x_ptr]
|
|
|
|
add x_ptr, x_dest5, x_pos
|
|
stp q_p5_0, q_p5_1, [x_ptr], #32
|
|
stp q_p5_2, q_p5_3, [x_ptr]
|
|
|
|
add x_pos, x_pos, #64
|
|
cmp x_pos, x_len
|
|
ble .Lloop64
|
|
|
|
.Lloop64_end:
|
|
/* restore d8 ~ d15 */
|
|
ldp d8, d9, [sp]
|
|
ldp d10, d11, [sp, #16]
|
|
ldp d12, d13, [sp, #32]
|
|
ldp d14, d15, [sp, #48]
|
|
add sp, sp, #64
|
|
|
|
add x_len, x_len, #64
|
|
cmp x_pos, x_len
|
|
beq .return_pass
|
|
|
|
.Lloop16_init:
|
|
sub x_len, x_len, #16
|
|
cmp x_pos, x_len
|
|
bgt .lessthan16_init
|
|
|
|
.Lloop16:
|
|
movi v_p1_0.16b, #0
|
|
movi v_p2_0.16b, #0
|
|
movi v_p3_0.16b, #0
|
|
movi v_p4_0.16b, #0
|
|
movi v_p5_0.16b, #0
|
|
mov x_vec_i, #0
|
|
|
|
.Lloop16_vects:
|
|
ldr x_ptr, [x_src, x_vec_i]
|
|
ldr q_data, [x_ptr, x_pos]
|
|
|
|
movi v_mask0f.16b, #0x0f
|
|
and v_data_lo.16b, v_data.16b, v_mask0f.16b
|
|
ushr v_data_hi.16b, v_data.16b, #4
|
|
|
|
add x_tmp, x_tbl, x_vec_i, lsl #2
|
|
add x_vec_i, x_vec_i, #8
|
|
ldp q_gft1_lo, q_gft1_hi, [x_tmp]
|
|
add x_tmp, x_tmp, x_vec, lsl #2
|
|
ldp q_gft2_lo, q_gft2_hi, [x_tmp]
|
|
add x_tmp, x_tmp, x_vec, lsl #2
|
|
ldp q_gft3_lo, q_gft3_hi, [x_tmp]
|
|
add x_tmp, x_tmp, x_vec, lsl #2
|
|
ldp q_gft4_lo, q_gft4_hi, [x_tmp]
|
|
add x_tmp, x_tmp, x_vec, lsl #2
|
|
ldp q_gft5_lo, q_gft5_hi, [x_tmp]
|
|
|
|
tbl v_gft1_lo.16b, {v_gft1_lo.16b}, v_data_lo.16b
|
|
tbl v_gft1_hi.16b, {v_gft1_hi.16b}, v_data_hi.16b
|
|
tbl v_gft2_lo.16b, {v_gft2_lo.16b}, v_data_lo.16b
|
|
tbl v_gft2_hi.16b, {v_gft2_hi.16b}, v_data_hi.16b
|
|
tbl v_gft3_lo.16b, {v_gft3_lo.16b}, v_data_lo.16b
|
|
tbl v_gft3_hi.16b, {v_gft3_hi.16b}, v_data_hi.16b
|
|
tbl v_gft4_lo.16b, {v_gft4_lo.16b}, v_data_lo.16b
|
|
tbl v_gft4_hi.16b, {v_gft4_hi.16b}, v_data_hi.16b
|
|
tbl v_gft5_lo.16b, {v_gft5_lo.16b}, v_data_lo.16b
|
|
tbl v_gft5_hi.16b, {v_gft5_hi.16b}, v_data_hi.16b
|
|
|
|
eor v_p1_0.16b, v_gft1_hi.16b, v_p1_0.16b
|
|
eor v_p1_0.16b, v_p1_0.16b, v_gft1_lo.16b
|
|
eor v_p2_0.16b, v_gft2_hi.16b, v_p2_0.16b
|
|
eor v_p2_0.16b, v_p2_0.16b, v_gft2_lo.16b
|
|
eor v_p3_0.16b, v_gft3_hi.16b, v_p3_0.16b
|
|
eor v_p3_0.16b, v_p3_0.16b, v_gft3_lo.16b
|
|
eor v_p4_0.16b, v_gft4_hi.16b, v_p4_0.16b
|
|
eor v_p4_0.16b, v_p4_0.16b, v_gft4_lo.16b
|
|
eor v_p5_0.16b, v_gft5_hi.16b, v_p5_0.16b
|
|
eor v_p5_0.16b, v_p5_0.16b, v_gft5_lo.16b
|
|
|
|
cmp x_vec_i, x_vec
|
|
bne .Lloop16_vects
|
|
|
|
.Lloop16_vects_end:
|
|
str q_p1_0, [x_dest1, x_pos]
|
|
str q_p2_0, [x_dest2, x_pos]
|
|
str q_p3_0, [x_dest3, x_pos]
|
|
str q_p4_0, [x_dest4, x_pos]
|
|
str q_p5_0, [x_dest5, x_pos]
|
|
add x_pos, x_pos, #16
|
|
cmp x_pos, x_len
|
|
ble .Lloop16
|
|
|
|
.Lloop16_end:
|
|
sub x_tmp, x_pos, x_len
|
|
cmp x_tmp, #16
|
|
beq .return_pass
|
|
|
|
.lessthan16_init:
|
|
mov x_pos, x_len
|
|
b .Lloop16
|
|
|
|
.return_pass:
|
|
mov w_ret, #0
|
|
ret
|
|
|
|
.return_fail:
|
|
mov w_ret, #1
|
|
ret
|