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cd888f01a4
To support Intel CET, all indirect branch targets must start with ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to function entries in x86 assembly codes which are indirect branch targets as discovered by running testsuite on Intel CET machine and visual inspection. Verified with $ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux $ make -j8 $ make -j8 check with both nasm and yasm on both CET and non-CET machines. Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337 Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
133 lines
3.4 KiB
NASM
133 lines
3.4 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2018 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; returns modified node_ptr
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; uint32_t proc_heap(uint64_t *heap, uint32_t heap_size);
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%include "reg_sizes.asm"
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%include "heap_macros.asm"
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%ifidn __OUTPUT_FORMAT__, win64
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%define heap rcx ; pointer, 64-bit
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%define heap_size rdx
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%define arg3 r8
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%define child rsi
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%define tmp32 rdi
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%else
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%define heap rdi
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%define heap_size rsi
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%define arg3 rdx
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%define child rcx
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%define tmp32 rdx
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%endif
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%define node_ptr rax
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%define h1 r8
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%define h2 r9
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%define h3 r10
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%define i r11
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%define tmp2 r12
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[bits 64]
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default rel
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section .text
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global build_huff_tree
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build_huff_tree:
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endbranch
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%ifidn __OUTPUT_FORMAT__, win64
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push rsi
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push rdi
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%endif
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push r12
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mov node_ptr, arg3
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.main_loop:
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; REMOVE_MIN64(heap, heap_size, h1);
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mov h2, [heap + heap_size*8]
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mov h1, [heap + 1*8]
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mov qword [heap + heap_size*8], -1
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dec heap_size
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mov [heap + 1*8], h2
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mov i, 1
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heapify heap, heap_size, i, child, h2, h3, tmp32, tmp2
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mov h2, [heap + 1*8]
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lea h3, [h1 + h2]
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mov [heap + node_ptr*8], h1 %+ w
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mov [heap + node_ptr*8 - 8], h2 %+ w
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and h3, ~0xffff
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or h3, node_ptr
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sub node_ptr, 2
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; replace_min64(heap, heap_size, h3)
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mov [heap + 1*8], h3
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mov i, 1
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heapify heap, heap_size, i, child, h2, h3, tmp32, tmp2
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cmp heap_size, 1
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ja .main_loop
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mov h1, [heap + 1*8]
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mov [heap + node_ptr*8], h1 %+ w
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pop r12
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%ifidn __OUTPUT_FORMAT__, win64
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pop rdi
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pop rsi
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%endif
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ret
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align 32
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global build_heap
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build_heap:
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endbranch
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%ifidn __OUTPUT_FORMAT__, win64
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push rsi
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push rdi
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%endif
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push r12
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mov qword [heap + heap_size*8 + 8], -1
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mov i, heap_size
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shr i, 1
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.loop:
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mov h1, i
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heapify heap, heap_size, h1, child, h2, h3, tmp32, tmp2
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dec i
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jnz .loop
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pop r12
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%ifidn __OUTPUT_FORMAT__, win64
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pop rdi
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pop rsi
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%endif
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ret
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