isa-l/erasure_code/ppc64le
Surendar Chandra 85716fe2fe Correct loop bounds check in aarch64 gf_vect_mul
Prior to this change, a missing loop bounds check in the aarch64
version of gf_vect_mul would cause the routine to return 1 (error)
in the normal case.

This change introduces a check and branch to "return_pass" (success), and
also adds checks of the return code of gf_vect_mul to the supplied unit
test; it was previously ignored.

Change-Id: I9f7fe0014189b24f9600e0473ee02b5316c2da91
Signed-off-by: Surendar Chandra <vsurench@amazon.com>
2022-10-27 15:30:00 -07:00
..
ec_base_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
ec_base_vsx.h enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_2vect_dot_prod_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_2vect_mad_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_3vect_dot_prod_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_3vect_mad_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_4vect_dot_prod_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_4vect_mad_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_5vect_dot_prod_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_5vect_mad_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_6vect_dot_prod_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_6vect_mad_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_vect_dot_prod_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_vect_mad_vsx.c enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00
gf_vect_mul_vsx.c Correct loop bounds check in aarch64 gf_vect_mul 2022-10-27 15:30:00 -07:00
Makefile.am enable VSX SIMD in ISA-L for ppc64le 2020-02-20 09:40:43 -07:00