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banana_f3: rvv: mem_zero_detect_perf_warm: runtime = 3062584 usecs, bandwidth 33784 MB in 3.0626 sec = 11031.32 MB/s c: mem_zero_detect_perf_warm: runtime = 3000354 usecs, bandwidth 1594 MB in 3.0004 sec = 531.34 MB/s Signed-off-by: sunyuechi <sunyuechi@iscas.ac.cn>
50 lines
2.1 KiB
ArmAsm
50 lines
2.1 KiB
ArmAsm
/**********************************************************************
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Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS).
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of ISCAS nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#if HAVE_RVV
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.option arch, +v
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.global mem_zero_detect_rvv
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.type mem_zero_detect_rvv, %function
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mem_zero_detect_rvv:
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1:
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vsetvli t0, a1, e8, m8, ta, ma
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vle8.v v8, (a0)
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vmsne.vi v0, v8, 0
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vfirst.m t1, v0
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bgez t1, 2f
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sub a1, a1, t0
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add a0, a0, t0
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bnez a1, 1b
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li a0, 0
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ret
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2:
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li a0, -1
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ret
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#endif
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