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cd888f01a4
To support Intel CET, all indirect branch targets must start with ENDBR32/ENDBR64. Here is a patch to define endbranch and add it to function entries in x86 assembly codes which are indirect branch targets as discovered by running testsuite on Intel CET machine and visual inspection. Verified with $ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux $ make -j8 $ make -j8 check with both nasm and yasm on both CET and non-CET machines. Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337 Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
177 lines
4.0 KiB
NASM
177 lines
4.0 KiB
NASM
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2018 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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%include "reg_sizes.asm"
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%ifidn __OUTPUT_FORMAT__, elf64
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%define arg0 rdi
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%define arg1 rsi
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%define arg2 rdx
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%define arg3 rcx
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%define arg4 r8
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%define arg5 r9
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%define tmp r11
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%define tmpb r11b
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%define tmp3 arg4
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%define return rax
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%define func(x) x: endbranch
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%define FUNC_SAVE
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%define FUNC_RESTORE
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%endif
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%ifidn __OUTPUT_FORMAT__, win64
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%define arg0 rcx
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%define arg1 rdx
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%define arg2 r8
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%define arg3 r9
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%define tmp r11
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%define tmpb r11b
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%define tmp3 r10
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%define return rax
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%define func(x) proc_frame x
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%macro FUNC_SAVE 0
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end_prolog
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%endmacro
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%macro FUNC_RESTORE 0
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%endmacro
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%endif
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%define src arg0
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%define len arg1
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%define ptr arg2
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%define pos return
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default rel
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[bits 64]
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section .text
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align 16
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mk_global mem_zero_detect_sse, function
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func(mem_zero_detect_sse)
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FUNC_SAVE
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mov pos, 0
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sub len, 4*16
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jle .mem_z_small_block
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.mem_z_loop:
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movdqu xmm0, [src+pos]
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movdqu xmm1, [src+pos+1*16]
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movdqu xmm2, [src+pos+2*16]
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movdqu xmm3, [src+pos+3*16]
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ptest xmm0, xmm0
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jnz .return_fail
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ptest xmm1, xmm1
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jnz .return_fail
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ptest xmm2, xmm2
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jnz .return_fail
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ptest xmm3, xmm3
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jnz .return_fail
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add pos, 4*16
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cmp pos, len
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jl .mem_z_loop
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.mem_z_last_block:
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movdqu xmm0, [src+len]
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movdqu xmm1, [src+len+1*16]
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movdqu xmm2, [src+len+2*16]
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movdqu xmm3, [src+len+3*16]
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ptest xmm0, xmm0
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jnz .return_fail
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ptest xmm1, xmm1
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jnz .return_fail
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ptest xmm2, xmm2
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jnz .return_fail
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ptest xmm3, xmm3
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jnz .return_fail
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.return_pass:
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mov return, 0
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FUNC_RESTORE
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ret
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.mem_z_small_block:
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add len, 4*16
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cmp len, 2*16
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jl .mem_z_lt32
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movdqu xmm0, [src]
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movdqu xmm1, [src+16]
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movdqu xmm2, [src+len-2*16]
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movdqu xmm3, [src+len-1*16]
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ptest xmm0, xmm0
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jnz .return_fail
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ptest xmm1, xmm1
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jnz .return_fail
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ptest xmm2, xmm2
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jnz .return_fail
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ptest xmm3, xmm3
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jnz .return_fail
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jmp .return_pass
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.mem_z_lt32:
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cmp len, 16
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jl .mem_z_lt16
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movdqu xmm0, [src]
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movdqu xmm1, [src+len-16]
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ptest xmm0, xmm0
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jnz .return_fail
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ptest xmm1, xmm1
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jnz .return_fail
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jmp .return_pass
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.mem_z_lt16:
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cmp len, 8
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jl .mem_z_lt8
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mov tmp, [src]
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mov tmp3,[src+len-8]
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or tmp, tmp3
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test tmp, tmp
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jnz .return_fail
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jmp .return_pass
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.mem_z_lt8:
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cmp len, 0
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je .return_pass
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.mem_z_1byte_loop:
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mov tmpb, [src+pos]
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cmp tmpb, 0
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jnz .return_fail
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add pos, 1
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cmp pos, len
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jl .mem_z_1byte_loop
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jmp .return_pass
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.return_fail:
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mov return, 1
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FUNC_RESTORE
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ret
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endproc_frame
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