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371 lines
10 KiB
ArmAsm
371 lines
10 KiB
ArmAsm
/**********************************************************************
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Copyright(c) 2019 Arm Corporation All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Arm Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#include "../include/aarch64_label.h"
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.arch armv8-a+crc
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.text
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.align 2
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#include "lz0a_const_aarch64.h"
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#include "data_struct_aarch64.h"
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#include "huffman_aarch64.h"
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#include "bitbuf2_aarch64.h"
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#include "stdmac_aarch64.h"
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/*
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declare Macros
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*/
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.macro declare_generic_reg name:req,reg:req,default:req
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\name .req \default\reg
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w_\name .req w\reg
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x_\name .req x\reg
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.endm
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.global cdecl(isal_deflate_icf_body_hash_hist_aarch64)
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#ifndef __APPLE__
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.type isal_deflate_icf_body_hash_hist_aarch64, %function
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#endif
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/*
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void isal_deflate_icf_body_hash_hist_base(struct isal_zstream *stream);
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*/
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/* constant */
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/* offset of struct isal_zstream */
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.equ offset_next_in, 0
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.equ offset_avail_in, 8
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.equ offset_total_in, 12
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.equ offset_next_out, 16
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.equ offset_avail_out, 24
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.equ offset_total_out, 28
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.equ offset_hufftables, 32
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.equ offset_level, 40
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.equ offset_level_buf_size, 44
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.equ offset_level_buf, 48
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.equ offset_end_of_stream, 56
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.equ offset_flush, 58
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.equ offset_gzip_flag, 60
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.equ offset_hist_bits, 62
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.equ offset_state, 64
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.equ offset_state_block_end, 72
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.equ offset_state_has_hist, 135
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/* offset of struct level_buf */
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.equ offset_encode_tables, 0
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.equ offset_hist, 2176
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.equ offset_hist_d_hist, 2176
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.equ offset_hist_ll_hist, 2296
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.equ offset_deflate_hdr_count, 4348
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.equ offset_deflate_hdr_extra_bits, 4352
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.equ offset_deflate_hdr, 4356
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.equ offset_icf_buf_next, 4688
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.equ offset_icf_buf_avail_out, 4696
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.equ offset_icf_buf_start, 4704
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.equ offset_hash8k, 4712
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.equ offset_hash_hist, 4712
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/* offset of struct isal_zstate */
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.equ offset_dist_mask, 12
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.equ offset_hash_mask, 16
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/* macros*/
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.equ ISAL_LOOK_AHEAD, 288
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/* arguments */
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declare_generic_reg stream, 0,x
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declare_generic_reg stream_saved, 11,x
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declare_generic_reg param0, 0,x
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declare_generic_reg param1, 1,x
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declare_generic_reg param2, 2,x
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/* local variable */
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declare_generic_reg level_buf, 17,x
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declare_generic_reg avail_in, 13,w
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declare_generic_reg end_in, 13,x
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declare_generic_reg start_in, 19,x
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declare_generic_reg next_in, 9,x
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declare_generic_reg next_in_iter, 14,x
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declare_generic_reg state, 24,x
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declare_generic_reg hist_size, 22,w
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declare_generic_reg hash_mask, 21,w
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declare_generic_reg start_out, 12,x
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declare_generic_reg end_out, 12,x
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declare_generic_reg next_out, 8,x
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declare_generic_reg file_start, 20,x
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declare_generic_reg last_seen, 15,x
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declare_generic_reg total_in, 25,x
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declare_generic_reg NULL_DIST_SYM, 23,w
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declare_generic_reg match_length, 3,x
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declare_generic_reg dist, 7,x
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declare_generic_reg dist_inc, 26,w // dist - 1
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declare_generic_reg literal, 10,x
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declare_generic_reg tmp0, 4,x
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declare_generic_reg tmp1, 5,x
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cdecl(isal_deflate_icf_body_hash_hist_aarch64):
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stp x29, x30, [sp, -80]!
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add x29, sp, 0
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str x24, [sp, 56]
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ldr avail_in, [stream, offset_avail_in]
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cbnz avail_in, .stream_available
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ldr w1, [stream, offset_end_of_stream] // w1 keeps two values of end_of_stream and flush
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cbz w1, .done
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add state, stream, offset_state
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b .state_flush_read_buffer
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.align 2
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.stream_available:
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stp x19, x20, [x29, 16]
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stp x21, x22, [x29, 32]
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str x23, [x29, 48]
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stp x25, x26, [x29, 64]
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ldr level_buf, [stream, offset_level_buf]
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add state, stream, offset_state // 64
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mov stream_saved, stream
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ldr start_in, [stream, offset_next_in] // 0
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ldr w_total_in, [stream, offset_total_in]
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mov x0, offset_hash_hist
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add last_seen, level_buf, x0
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ldr x0, [level_buf, offset_icf_buf_avail_out] // 4696
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ldr start_out, [level_buf, offset_icf_buf_next] // 4688
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mov next_in, start_in
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and x0, x0, -4
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ldp hist_size, hash_mask, [state, offset_dist_mask] // 12
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add end_in, start_in, avail_in, uxtw
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mov next_out, start_out
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add end_out, start_out, x0
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add x0, next_in, ISAL_LOOK_AHEAD // 288
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sub file_start, start_in, w_total_in, uxtw
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mov NULL_DIST_SYM, 30
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add next_in_iter, next_in, 1
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cmp end_in, x0
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bls .while_loop_end
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.align 3
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.while_loop:
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cmp next_out, end_out
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bcs .state_create_hdr
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ldr w_literal, [next_in]
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mov w0, w_literal
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crc32cw w0, wzr, w0
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and w0, w0, hash_mask
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sub x1, next_in, file_start
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lsl x0, x0, 1
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ldrh w_dist, [last_seen, x0]
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strh w1, [last_seen, x0]
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sub w1, w1, w_dist
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and w_dist, w1, 65535
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sub dist_inc, w_dist, #1
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cmp dist_inc, hist_size
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bcc .dist_vs_hist_size
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.while_latter_part:
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and w_literal, w_literal, 255
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mov next_in, next_in_iter
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add next_out, next_out, 4
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add x1, level_buf, w_literal, uxtb 2
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ldr w0, [x1, 2296]
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add w0, w0, 1
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str w0, [x1, 2296]
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ldrh w0, [next_out, -4]
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bfi w0, w_literal, 0, 10
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strh w0, [next_out, -4]
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ldr w0, [next_out, -4]
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bfi w0, NULL_DIST_SYM, 10, 9
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str w0, [next_out, -4]
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ubfx x0, x0, 16, 3
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strh w0, [next_out, -2]
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.while_loop_check:
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add x0, next_in, ISAL_LOOK_AHEAD // 288
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add next_in_iter, next_in, 1
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cmp end_in, x0
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bhi .while_loop
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b .while_loop_end
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.align 2
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.dist_vs_hist_size:
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mov x1, next_in
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mov w2, 258
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sub x0, next_in, w_dist, uxth
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compare_258_bytes param0,param1,match_length,tmp0,tmp1
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and w1, w_match_length, 65535 // 0xffff
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cmp w1, 3
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bls .while_latter_part
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ldr w0, [next_in, 1]
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mov x4, next_in
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add next_in, next_in, w1, uxth
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crc32cw w0, wzr, w0
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and w0, hash_mask, w0
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sub next_in_iter, next_in_iter, file_start
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strh w_next_in_iter, [last_seen, x0, lsl 1]
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ldr w0, [x4, 2]!
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crc32cw w0, wzr, w0
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and w0, hash_mask, w0
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and w_match_length, w_match_length, 65535 // 0xffff
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sub x4, x4, file_start
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// get_len_icf_code
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add w_match_length, w_match_length, 254
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// get_dist_icf_code, first part
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mov w1, 0 // w1 => dist_extra
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strh w4, [last_seen, x0, lsl 1]
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cmp w_dist, 2
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ubfiz x0, match_length, 2, 17
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add x0, level_buf, x0
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bhi .compute_dist_icf_code
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.match_length_end:
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// handle level_buf->hist
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ldr w2, [x0, offset_hist_ll_hist] // 2296, ll_hist
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add x4, level_buf, dist_inc, uxtw 2 // d_hist
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add next_out, next_out, 4
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add w2, w2, 1 // ll_hist
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str w2, [x0, offset_hist_ll_hist] // 2296, ll_hist
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ldr w0, [x4, offset_hist_d_hist] // 2176, d_hist
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add w0, w0, 1 // d_hist
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str w0, [x4, offset_hist_d_hist] // 2176, d_hist
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// write_deflate_icf
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ldrh w0, [next_out, -4]
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bfi w0, w3, 0, 10
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strh w0, [next_out, -4]
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ldr w0, [next_out, -4]
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bfi w0, dist_inc, 10, 9
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str w0, [next_out, -4]
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lsr w0, w0, 16
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bfi w0, w1, 3, 13 // w1 => dist_extra
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strh w0, [next_out, -2]
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b .while_loop_check
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.align 2
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// get_dist_icf_code, 2nd part
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.compute_dist_icf_code:
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clz w1, dist_inc
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mov w2, 30
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sub w2, w2, w1
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mov w1, 1
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lsl w1, w1, w2
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sub w1, w1, #1
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and w1, w1, dist_inc
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lsr dist_inc, dist_inc, w2
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add dist_inc, dist_inc, w2, lsl 1
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and w1, w1, 8191
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b .match_length_end
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.while_loop_end:
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sub x19, next_in, x19
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cmp x19, 0
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ble .skip_igzip_hist2
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mov w0, 1
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strb w0, [stream_saved, offset_state_has_hist] // 135
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.skip_igzip_hist2:
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add w19, w_total_in, w19
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ldr w0, [stream_saved, offset_end_of_stream] // 56
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sub x12, end_out, next_out
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asr x12, x12, 2 // x12 => end_out - next_out
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str next_in, [stream_saved]
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str w19, [stream_saved, offset_total_in] // 12
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sub next_in, end_in, next_in
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str w19, [stream_saved, offset_state_block_end] // 72
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ldp x25, x26, [x29, 64]
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ldr x23, [x29, 48]
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ldp x21, x22, [x29, 32]
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ldp x19, x20, [x29, 16]
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str w9, [stream_saved, offset_avail_in] // 8
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str next_out, [level_buf, offset_icf_buf_next] // 4688
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str x12, [level_buf, offset_icf_buf_avail_out] // 4696, x12 => end_out - next_out
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cbnz w0, .state_flush_read_buffer
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b .done
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.align 2
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.state_create_hdr:
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mov w0, 2
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str w0, [x24, 20]
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sub start_in, next_in, start_in
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cmp start_in, 0
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ble .skip_igzip_hist
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mov w0, 1
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strb w0, [stream_saved, offset_state_has_hist] // 135
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.skip_igzip_hist:
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add w_total_in, w_total_in, w19
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sub x12, end_out, next_out
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asr x12, x12, 2 // x12 => end_out - next_out
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str next_in, [stream_saved]
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sub next_in, end_in, next_in
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str w_total_in, [stream_saved, offset_total_in] // 12
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str w_total_in, [stream_saved, offset_state_block_end] // 72
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ldp x25, x26, [x29, 64]
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ldr x23, [x29, 48]
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ldp x21, x22, [x29, 32]
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ldp x19, x20, [x29, 16]
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str w9, [stream_saved, offset_avail_in] // 8
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str next_out, [level_buf, offset_icf_buf_next] // 4688
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str x12, [level_buf, offset_icf_buf_avail_out] // 4696, x12 => end_out - next_out
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b .done
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.state_flush_read_buffer:
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mov w0, 4
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str w0, [x24, 20]
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.done:
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ldr x24, [sp, 56]
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ldp x29, x30, [sp], 80
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ret
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#ifndef __APPLE__
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.size isal_deflate_icf_body_hash_hist_aarch64, .-isal_deflate_icf_body_hash_hist_aarch64
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#endif
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