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f3bb041799
Change-Id: I556af7976294f31abd72ac49366f7259e3baf399 Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
58 lines
2.4 KiB
C
58 lines
2.4 KiB
C
/**********************************************************************
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Copyright(c) 2019 Arm Corporation All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Arm Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**********************************************************************/
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#ifndef __BITBUF2_AARCH64_H__
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#define __BITBUF2_AARCH64_H__
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#include "options_aarch64.h"
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#ifdef __ASSEMBLY__
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.macro update_bits stream:req,code:req,code_len:req,m_bits:req,m_bit_count:req \
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m_out_buf:req
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lsl x_\code,x_\code,x_\m_bit_count
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orr x_\m_bits,x_\code,x_\m_bits
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add x_\m_bit_count,x_\code_len,x_\m_bit_count
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str x_\m_bits,[x_\m_out_buf]
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and w_\code,w_\m_bit_count,-8
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lsr w_\code_len,w_\m_bit_count,3
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add x_\m_out_buf,x_\m_out_buf,w_\code_len,uxtw
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sub w_\m_bit_count,w_\m_bit_count,w_\code
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lsr x_\m_bits,x_\m_bits,x_\code
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str x_\m_bits,[stream,_internal_state_bitbuf_m_bits]
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str w_\m_bit_count,[stream,_internal_state_bitbuf_m_bit_count]
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str x_\m_out_buf,[stream,_internal_state_bitbuf_m_out_buf]
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.endm
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#endif
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#endif
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