Commit Graph

11 Commits

Author SHA1 Message Date
H.J. Lu
cd888f01a4 x86: Add ENDBR32/ENDBR64 at function entries for Intel CET
To support Intel CET, all indirect branch targets must start with
ENDBR32/ENDBR64.  Here is a patch to define endbranch and add it to
function entries in x86 assembly codes which are indirect branch
targets as discovered by running testsuite on Intel CET machine and
visual inspection.

Verified with

$ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux
$ make -j8
$ make -j8 check

with both nasm and yasm on both CET and non-CET machines.

Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2020-05-26 09:16:49 -07:00
Greg Tucker
ede04f0a1f build: Fix for windows to allow nasm use
Previously windows build could only use yasm because some procedural items such
as proc_start were not supported by nasm.  This adds a few macros and fixes so
nasm can be used to build on windows.

Change-Id: Ia05dc3ff482f33b0f915bb1be3c7df5e4a753b3a
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-03-17 18:05:46 -07:00
Roy Oursler
198b026a55 build: Add multi-binary checking for new arch
Change-Id: I8bb8d9e9ae28987ee583976871ff84ee205bdbdc
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2019-09-14 16:01:28 -07:00
Greg Tucker
2e212f28fa build: Fix for mac nasm lack of symbol types
Change-Id: I9ee86a3e32876d3860477c8365fc459d94a8920e
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2018-11-29 13:54:36 -07:00
Greg Tucker
a1869430c7 build: Fix warnings on mac for objects defining no symbols
Change-Id: I13ef334ae23a3370cbf2a5409974fa0dc9fba7a5
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2018-06-21 14:39:08 -07:00
Xiaodong Liu
3ab8239097 multibinary: move WRT_OPT macro to common header
Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>
2017-08-18 14:24:57 -07:00
Greg Tucker
fc1467deb2 Format only patch from iindent and remove_whitespace
Change-Id: I114bfcfa8750c7ba3a50ad2be9dd9e87cb7a1042
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-06-26 04:10:47 -04:00
Roy Oursler
5a55e3096c igzip: Avx512 version for encdode_df
Change-Id: I1625a3d7e016805791cfd09e31909562f432fd71
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2017-06-21 05:56:05 -04:00
Greg Tucker
61164e105b Add crc unit
New crc unit adds three different polynomials: T10dif, ieee and iscsi.

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2016-05-03 15:02:29 -07:00
Greg Tucker
a5b324d2cd Add avx512 versions of ec_encode_data
- Includes gf_nvect_dot_prod, gf_nvect_mad functions
 - Change ec multibinary to use common macros
 - Autoconf checks for nasm or yasm support and picks if available
 - Leave out compile of any avx512 code if assembler not available

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2016-02-25 17:32:34 -07:00
Greg Tucker
00c1efc109 Initial commit isa-l v2.14.1
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2016-02-24 14:54:34 -07:00