Commit Graph

5 Commits

Author SHA1 Message Date
Taiju Yamada
38279f5e9e Avoid using x18 register
Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
2024-03-25 15:34:01 +00:00
Colin Ian King
1500db751d Fix a handful of spelling mistakes and typos
There are quite a few spelling mistakes and typos in comments and
user facing message literal strings as found using codespell. Fix
these.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2024-02-06 15:03:14 +00:00
Taiju Yamada
1187583a97 Fixes for aarch64 mac
- It should be fine to enable pmull always on Apple Silicon
- macOS 12+ is required for PMULL instruction.
- Changed the conditional macro to __APPLE__
- Rewritten dispatcher using sysctlbyname
- Use __USER_LABEL_PREFIX__
- Use __TEXT,__const as readonly section
- use ASM_DEF_RODATA macro
- fix func decl

Change-Id: I800593f21085d8187b480c8bb3ab2bd70c4a6974
Signed-off-by: Taiju Yamada <tyamada@bi.a.u-tokyo.ac.jp>
2022-10-28 08:27:26 -07:00
Jerry Yu
5d7724898d build: fix wrong use the register name
The third parameter must be 32bit register . Those assmebly
put 64bit register here , it is wrong .

Change-Id: Iebe17516b555a6a9b94ea7baa4778ad4b9dd0878
Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
2019-11-01 18:11:00 +08:00
Zhiyuan Zhu
290456231c igzip: Implement deflate icf body/finish with assembly
Change-Id: I40e4a9be2ae654c881460056de9730176d3d097c
Signed-off-by: Zhiyuan Zhu <zhiyuan.zhu@arm.com>
2019-10-11 09:59:40 -07:00