Commit Graph

5 Commits

Author SHA1 Message Date
Jean-Yves VET
52bb322912 build: fix compilation with CPU not supporting SSE
This patch makes the project compile and run (tests and
performance tests as well) with CPUs which are not
supporting SSE instructions.

Signed-off-by: Jean-Yves Vet <jyvet@ddn.com>
2018-02-23 06:13:10 -05:00
Greg Tucker
fc1467deb2 Format only patch from iindent and remove_whitespace
Change-Id: I114bfcfa8750c7ba3a50ad2be9dd9e87cb7a1042
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-06-26 04:10:47 -04:00
Greg Tucker
5d9cf8cadf ec: Fixes for 32-bit build
Change-Id: Iac362f0d7282716a8502afcec939b0d1877a943f
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-03-30 17:56:07 -07:00
Greg Tucker
a5b324d2cd Add avx512 versions of ec_encode_data
- Includes gf_nvect_dot_prod, gf_nvect_mad functions
 - Change ec multibinary to use common macros
 - Autoconf checks for nasm or yasm support and picks if available
 - Leave out compile of any avx512 code if assembler not available

Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2016-02-25 17:32:34 -07:00
Greg Tucker
00c1efc109 Initial commit isa-l v2.14.1
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2016-02-24 14:54:34 -07:00