1. Add normal and reflected bits order functions for ISO format and
Jones coefficients format.
2. Add a multi-binary macro for crc64 functions.
3. In order to decrease number of repeated test.c and perf.c files,
using crc64_funcs_test.c and cr crc64_funcs_perf.c.
4. Add crc64_example.c to take the demonstration role.
Change-Id: Icb8c14f1a84cd98f58eb12206ca605dea8a2cefb
Signed-off-by: Xiaodong Liu <xiaodong.liu@intel.com>
SSE optimized compression function is using crc32 instruction that is in SSE 4.2
not SSE4.1 as stated. Fixes incorect choice on core 2 duo that is SSE 4.1 only.
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
- Includes gf_nvect_dot_prod, gf_nvect_mad functions
- Change ec multibinary to use common macros
- Autoconf checks for nasm or yasm support and picks if available
- Leave out compile of any avx512 code if assembler not available
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
