7 Commits

Author	SHA1	Message	Date
Marcel Cornu	ae951677ab	raid: reformat using new code style ... Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>	2024-04-22 11:35:03 +02:00
Greg Tucker	9c7e3b9f22	test: Change perf tests to warm by default ... The cold versions of tests depended on a fixed size of last level cache that is too low on some arch and too high for the total available memory on others. Change-Id: Iee98403f9ace02e01b810c296a5fe44b933bfb17 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>	2022-08-03 16:35:55 -07:00
Greg Tucker	cfdd3497d1	perf: Remove unneeded time include ... Timing functions are made os-independent with test.h include. Change-Id: Iab7d6325254d5c32263504efc756dbbe51d77153 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>	2021-06-09 18:33:57 -07:00
Roy Oursler	699bb5bd3f	all: Revamp performance testing to be time based ... Change-Id: I6260d28e4adc974d8db0a1c770e3eb922d87f8e4 Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>	2019-03-07 09:28:04 -07:00
Greg Tucker	fc1467deb2	Format only patch from iindent and remove_whitespace ... Change-Id: I114bfcfa8750c7ba3a50ad2be9dd9e87cb7a1042 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>	2017-06-26 04:10:47 -04:00
Greg Tucker	0a62b7c40d	raid: Add avx512 version of xor ... Change-Id: I8f8e79f3442ef76268f60a8e61d2c36aedb1ccc1 Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>	2017-03-30 20:22:36 -07:00
Greg Tucker	d6c5e9620d	Add raid unit ... New raid unit adds source for optimized xor and P+Q functions. Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>	2016-04-26 15:58:49 -07:00