Greg Tucker
112dd72c01
build: Remove unneeded file types.h
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The file types.h has long been misnamed and overlaps with
functionality in the test helper routines.
Change-Id: I774047d3a0074198b67a6b4e909f1e2ce1938195
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2021-06-10 09:35:43 -07:00
Hong Bo Peng
180c74aefd
enable VSX SIMD in ISA-L for ppc64le
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1) Implement the ErasureCode function in Altivec Intrinsics
2) Coding style update
Change-Id: I2c81d035f4083e9b011dbf3b741f628813b68606
Thanks-to: Daniel Axtens <dja@axtens.net>
Signed-off-by: Hong Bo Peng <penghb@cn.ibm.com>
2020-02-20 09:40:43 -07:00
Yibo Cai
19fb012e81
raid: Add aarch64 NEON implementation
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Change-Id: I6ad471d3b22a87bfa7e216713e04afa990a90edb
Signed-off-by: Yibo Cai <yibo.cai@arm.com>
2019-02-10 13:08:56 -07:00
Yibo Cai
7a44098a98
build: Add aarch64 support
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Change-Id: If9594936a28355d89edd1a331b3b429dffa44184
Signed-off-by: Yibo Cai <yibo.cai@arm.com>
2019-02-10 13:08:56 -07:00
Greg Tucker
fc1467deb2
Format only patch from iindent and remove_whitespace
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Change-Id: I114bfcfa8750c7ba3a50ad2be9dd9e87cb7a1042
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-06-26 04:10:47 -04:00
Greg Tucker
8f1155387c
raid: Add avx512 version of pq_gen
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Change-Id: Ic404e7f3c09c953fe3687355cc3f9728cfd16011
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-03-30 20:22:36 -07:00
Greg Tucker
0a62b7c40d
raid: Add avx512 version of xor
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Change-Id: I8f8e79f3442ef76268f60a8e61d2c36aedb1ccc1
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-03-30 20:22:36 -07:00
Greg Tucker
1268a57a32
raid: Add base function aliases and group src by arch
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Change-Id: If7d987bcebb0ed1293d6836cd038746e7b0bbd85
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-03-30 18:09:32 -07:00
Greg Tucker
d6c5e9620d
Add raid unit
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New raid unit adds source for optimized xor and P+Q functions.
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2016-04-26 15:58:49 -07:00
